drivers/base/regmap/regcache.c

   1 /*
   2  * Register cache access API
   3  *
   4  * Copyright 2011 Wolfson Microelectronics plc
   5  *
   6  * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/bsearch.h>
  14 #include <linux/device.h>
  15 #include <linux/export.h>
  16 #include <linux/slab.h>
  17 #include <linux/sort.h>
  18
  19 #include "trace.h"
  20 #include "internal.h"
  21
  22 static const struct regcache_ops *cache_types[] = {
  23         &regcache_rbtree_ops,
  24         &regcache_lzo_ops,
  25         &regcache_flat_ops,
  26 };
  27
  28 static int regcache_hw_init(struct regmap *map)
  29 {
  30         int i, j;
  31         int ret;
  32         int count;
  33         unsigned int reg, val;
  34         void *tmp_buf;
  35
  36         if (!map->num_reg_defaults_raw)
  37                 return -EINVAL;
  38
  39         /* calculate the size of reg_defaults */
  40         for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++)
  41                 if (regmap_readable(map, i * map->reg_stride) &&
  42                     !regmap_volatile(map, i * map->reg_stride))
  43                         count++;
  44
  45         /* all registers are unreadable or volatile, so just bypass */
  46         if (!count) {
  47                 map->cache_bypass = true;
  48                 return 0;
  49         }
  50
  51         map->num_reg_defaults = count;
  52         map->reg_defaults = kmalloc_array(count, sizeof(struct reg_default),
  53                                           GFP_KERNEL);
  54         if (!map->reg_defaults)
  55                 return -ENOMEM;
  56
  57         if (!map->reg_defaults_raw) {
  58                 bool cache_bypass = map->cache_bypass;
  59                 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
  60
  61                 /* Bypass the cache access till data read from HW */
  62                 map->cache_bypass = true;
  63                 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
  64                 if (!tmp_buf) {
  65                         ret = -ENOMEM;
  66                         goto err_free;
  67                 }
  68                 ret = regmap_raw_read(map, 0, tmp_buf,
  69                                       map->cache_size_raw);
  70                 map->cache_bypass = cache_bypass;
  71                 if (ret == 0) {
  72                         map->reg_defaults_raw = tmp_buf;
  73                         map->cache_free = 1;
  74                 } else {
  75                         kfree(tmp_buf);
  76                 }
  77         }
  78
  79         /* fill the reg_defaults */
  80         for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
  81                 reg = i * map->reg_stride;
  82
  83                 if (!regmap_readable(map, reg))
  84                         continue;
  85
  86                 if (regmap_volatile(map, reg))
  87                         continue;
  88
  89                 if (map->reg_defaults_raw) {
  90                         val = regcache_get_val(map, map->reg_defaults_raw, i);
  91                 } else {
  92                         bool cache_bypass = map->cache_bypass;
  93
  94                         map->cache_bypass = true;
  95                         ret = regmap_read(map, reg, &val);
  96                         map->cache_bypass = cache_bypass;
  97                         if (ret != 0) {
  98                                 dev_err(map->dev, "Failed to read %d: %d\n",
  99                                         reg, ret);
 100                                 goto err_free;
 101                         }
 102                 }
 103
 104                 map->reg_defaults[j].reg = reg;
 105                 map->reg_defaults[j].def = val;
 106                 j++;
 107         }
 108
 109         return 0;
 110
 111 err_free:
 112         kfree(map->reg_defaults);
 113
 114         return ret;
 115 }
 116
 117 int regcache_init(struct regmap *map, const struct regmap_config *config)
 118 {
 119         int ret;
 120         int i;
 121         void *tmp_buf;
 122
 123         if (map->cache_type == REGCACHE_NONE) {
 124                 if (config->reg_defaults || config->num_reg_defaults_raw)
 125                         dev_warn(map->dev,
 126                                  "No cache used with register defaults set!\n");
 127
 128                 map->cache_bypass = true;
 129                 return 0;
 130         }
 131
 132         if (config->reg_defaults && !config->num_reg_defaults) {
 133                 dev_err(map->dev,
 134                          "Register defaults are set without the number!\n");
 135                 return -EINVAL;
 136         }
 137
 138         for (i = 0; i < config->num_reg_defaults; i++)
 139                 if (config->reg_defaults[i].reg % map->reg_stride)
 140                         return -EINVAL;
 141
 142         for (i = 0; i < ARRAY_SIZE(cache_types); i++)
 143                 if (cache_types[i]->type == map->cache_type)
 144                         break;
 145
 146         if (i == ARRAY_SIZE(cache_types)) {
 147                 dev_err(map->dev, "Could not match compress type: %d\n",
 148                         map->cache_type);
 149                 return -EINVAL;
 150         }
 151
 152         map->num_reg_defaults = config->num_reg_defaults;
 153         map->num_reg_defaults_raw = config->num_reg_defaults_raw;
 154         map->reg_defaults_raw = config->reg_defaults_raw;
 155         map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
 156         map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
 157
 158         map->cache = NULL;
 159         map->cache_ops = cache_types[i];
 160
 161         if (!map->cache_ops->read ||
 162             !map->cache_ops->write ||
 163             !map->cache_ops->name)
 164                 return -EINVAL;
 165
 166         /* We still need to ensure that the reg_defaults
 167          * won't vanish from under us.  We'll need to make
 168          * a copy of it.
 169          */
 170         if (config->reg_defaults) {
 171                 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
 172                                   sizeof(struct reg_default), GFP_KERNEL);
 173                 if (!tmp_buf)
 174                         return -ENOMEM;
 175                 map->reg_defaults = tmp_buf;
 176         } else if (map->num_reg_defaults_raw) {
 177                 /* Some devices such as PMICs don't have cache defaults,
 178                  * we cope with this by reading back the HW registers and
 179                  * crafting the cache defaults by hand.
 180                  */
 181                 ret = regcache_hw_init(map);
 182                 if (ret < 0)
 183                         return ret;
 184                 if (map->cache_bypass)
 185                         return 0;
 186         }
 187
 188         if (!map->max_register)
 189                 map->max_register = map->num_reg_defaults_raw;
 190
 191         if (map->cache_ops->init) {
 192                 dev_dbg(map->dev, "Initializing %s cache\n",
 193                         map->cache_ops->name);
 194                 ret = map->cache_ops->init(map);
 195                 if (ret)
 196                         goto err_free;
 197         }
 198         return 0;
 199
 200 err_free:
 201         kfree(map->reg_defaults);
 202         if (map->cache_free)
 203                 kfree(map->reg_defaults_raw);
 204
 205         return ret;
 206 }
 207
 208 void regcache_exit(struct regmap *map)
 209 {
 210         if (map->cache_type == REGCACHE_NONE)
 211                 return;
 212
 213         BUG_ON(!map->cache_ops);
 214
 215         kfree(map->reg_defaults);
 216         if (map->cache_free)
 217                 kfree(map->reg_defaults_raw);
 218
 219         if (map->cache_ops->exit) {
 220                 dev_dbg(map->dev, "Destroying %s cache\n",
 221                         map->cache_ops->name);
 222                 map->cache_ops->exit(map);
 223         }
 224 }
 225
 226 /**
 227  * regcache_read: Fetch the value of a given register from the cache.
 228  *
 229  * @map: map to configure.
 230  * @reg: The register index.
 231  * @value: The value to be returned.
 232  *
 233  * Return a negative value on failure, 0 on success.
 234  */
 235 int regcache_read(struct regmap *map,
 236                   unsigned int reg, unsigned int *value)
 237 {
 238         int ret;
 239
 240         if (map->cache_type == REGCACHE_NONE)
 241                 return -ENOSYS;
 242
 243         BUG_ON(!map->cache_ops);
 244
 245         if (!regmap_volatile(map, reg)) {
 246                 ret = map->cache_ops->read(map, reg, value);
 247
 248                 if (ret == 0)
 249                         trace_regmap_reg_read_cache(map, reg, *value);
 250
 251                 return ret;
 252         }
 253
 254         return -EINVAL;
 255 }
 256
 257 /**
 258  * regcache_write: Set the value of a given register in the cache.
 259  *
 260  * @map: map to configure.
 261  * @reg: The register index.
 262  * @value: The new register value.
 263  *
 264  * Return a negative value on failure, 0 on success.
 265  */
 266 int regcache_write(struct regmap *map,
 267                    unsigned int reg, unsigned int value)
 268 {
 269         if (map->cache_type == REGCACHE_NONE)
 270                 return 0;
 271
 272         BUG_ON(!map->cache_ops);
 273
 274         if (!regmap_volatile(map, reg))
 275                 return map->cache_ops->write(map, reg, value);
 276
 277         return 0;
 278 }
 279
 280 static bool regcache_reg_needs_sync(struct regmap *map, unsigned int reg,
 281                                     unsigned int val)
 282 {
 283         int ret;
 284
 285         /* If we don't know the chip just got reset, then sync everything. */
 286         if (!map->no_sync_defaults)
 287                 return true;
 288
 289         /* Is this the hardware default?  If so skip. */
 290         ret = regcache_lookup_reg(map, reg);
 291         if (ret >= 0 && val == map->reg_defaults[ret].def)
 292                 return false;
 293         return true;
 294 }
 295
 296 static int regcache_default_sync(struct regmap *map, unsigned int min,
 297                                  unsigned int max)
 298 {
 299         unsigned int reg;
 300
 301         for (reg = min; reg <= max; reg += map->reg_stride) {
 302                 unsigned int val;
 303                 int ret;
 304
 305                 if (regmap_volatile(map, reg) ||
 306                     !regmap_writeable(map, reg))
 307                         continue;
 308
 309                 ret = regcache_read(map, reg, &val);
 310                 if (ret)
 311                         return ret;
 312
 313                 if (!regcache_reg_needs_sync(map, reg, val))
 314                         continue;
 315
 316                 map->cache_bypass = true;
 317                 ret = _regmap_write(map, reg, val);
 318                 map->cache_bypass = false;
 319                 if (ret) {
 320                         dev_err(map->dev, "Unable to sync register %#x. %d\n",
 321                                 reg, ret);
 322                         return ret;
 323                 }
 324                 dev_dbg(map->dev, "Synced register %#x, value %#x\n", reg, val);
 325         }
 326
 327         return 0;
 328 }
 329
 330 /**
 331  * regcache_sync: Sync the register cache with the hardware.
 332  *
 333  * @map: map to configure.
 334  *
 335  * Any registers that should not be synced should be marked as
 336  * volatile.  In general drivers can choose not to use the provided
 337  * syncing functionality if they so require.
 338  *
 339  * Return a negative value on failure, 0 on success.
 340  */
 341 int regcache_sync(struct regmap *map)
 342 {
 343         int ret = 0;
 344         unsigned int i;
 345         const char *name;
 346         bool bypass;
 347
 348         BUG_ON(!map->cache_ops);
 349
 350         map->lock(map->lock_arg);
 351         /* Remember the initial bypass state */
 352         bypass = map->cache_bypass;
 353         dev_dbg(map->dev, "Syncing %s cache\n",
 354                 map->cache_ops->name);
 355         name = map->cache_ops->name;
 356         trace_regcache_sync(map, name, "start");
 357
 358         if (!map->cache_dirty)
 359                 goto out;
 360
 361         map->async = true;
 362
 363         /* Apply any patch first */
 364         map->cache_bypass = true;
 365         for (i = 0; i < map->patch_regs; i++) {
 366                 ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
 367                 if (ret != 0) {
 368                         dev_err(map->dev, "Failed to write %x = %x: %d\n",
 369                                 map->patch[i].reg, map->patch[i].def, ret);
 370                         goto out;
 371                 }
 372         }
 373         map->cache_bypass = false;
 374
 375         if (map->cache_ops->sync)
 376                 ret = map->cache_ops->sync(map, 0, map->max_register);
 377         else
 378                 ret = regcache_default_sync(map, 0, map->max_register);
 379
 380         if (ret == 0)
 381                 map->cache_dirty = false;
 382
 383 out:
 384         /* Restore the bypass state */
 385         map->async = false;
 386         map->cache_bypass = bypass;
 387         map->no_sync_defaults = false;
 388         map->unlock(map->lock_arg);
 389
 390         regmap_async_complete(map);
 391
 392         trace_regcache_sync(map, name, "stop");
 393
 394         return ret;
 395 }
 396 EXPORT_SYMBOL_GPL(regcache_sync);
 397
 398 /**
 399  * regcache_sync_region: Sync part  of the register cache with the hardware.
 400  *
 401  * @map: map to sync.
 402  * @min: first register to sync
 403  * @max: last register to sync
 404  *
 405  * Write all non-default register values in the specified region to
 406  * the hardware.
 407  *
 408  * Return a negative value on failure, 0 on success.
 409  */
 410 int regcache_sync_region(struct regmap *map, unsigned int min,
 411                          unsigned int max)
 412 {
 413         int ret = 0;
 414         const char *name;
 415         bool bypass;
 416
 417         BUG_ON(!map->cache_ops);
 418
 419         map->lock(map->lock_arg);
 420
 421         /* Remember the initial bypass state */
 422         bypass = map->cache_bypass;
 423
 424         name = map->cache_ops->name;
 425         dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
 426
 427         trace_regcache_sync(map, name, "start region");
 428
 429         if (!map->cache_dirty)
 430                 goto out;
 431
 432         map->async = true;
 433
 434         if (map->cache_ops->sync)
 435                 ret = map->cache_ops->sync(map, min, max);
 436         else
 437                 ret = regcache_default_sync(map, min, max);
 438
 439 out:
 440         /* Restore the bypass state */
 441         map->cache_bypass = bypass;
 442         map->async = false;
 443         map->no_sync_defaults = false;
 444         map->unlock(map->lock_arg);
 445
 446         regmap_async_complete(map);
 447
 448         trace_regcache_sync(map, name, "stop region");
 449
 450         return ret;
 451 }
 452 EXPORT_SYMBOL_GPL(regcache_sync_region);
 453
 454 /**
 455  * regcache_drop_region: Discard part of the register cache
 456  *
 457  * @map: map to operate on
 458  * @min: first register to discard
 459  * @max: last register to discard
 460  *
 461  * Discard part of the register cache.
 462  *
 463  * Return a negative value on failure, 0 on success.
 464  */
 465 int regcache_drop_region(struct regmap *map, unsigned int min,
 466                          unsigned int max)
 467 {
 468         int ret = 0;
 469
 470         if (!map->cache_ops || !map->cache_ops->drop)
 471                 return -EINVAL;
 472
 473         map->lock(map->lock_arg);
 474
 475         trace_regcache_drop_region(map, min, max);
 476
 477         ret = map->cache_ops->drop(map, min, max);
 478
 479         map->unlock(map->lock_arg);
 480
 481         return ret;
 482 }
 483 EXPORT_SYMBOL_GPL(regcache_drop_region);
 484
 485 /**
 486  * regcache_cache_only: Put a register map into cache only mode
 487  *
 488  * @map: map to configure
 489  * @cache_only: flag if changes should be written to the hardware
 490  *
 491  * When a register map is marked as cache only writes to the register
 492  * map API will only update the register cache, they will not cause
 493  * any hardware changes.  This is useful for allowing portions of
 494  * drivers to act as though the device were functioning as normal when
 495  * it is disabled for power saving reasons.
 496  */
 497 void regcache_cache_only(struct regmap *map, bool enable)
 498 {
 499         map->lock(map->lock_arg);
 500         WARN_ON(map->cache_bypass && enable);
 501         map->cache_only = enable;
 502         trace_regmap_cache_only(map, enable);
 503         map->unlock(map->lock_arg);
 504 }
 505 EXPORT_SYMBOL_GPL(regcache_cache_only);
 506
 507 /**
 508  * regcache_mark_dirty: Indicate that HW registers were reset to default values
 509  *
 510  * @map: map to mark
 511  *
 512  * Inform regcache that the device has been powered down or reset, so that
 513  * on resume, regcache_sync() knows to write out all non-default values
 514  * stored in the cache.
 515  *
 516  * If this function is not called, regcache_sync() will assume that
 517  * the hardware state still matches the cache state, modulo any writes that
 518  * happened when cache_only was true.
 519  */
 520 void regcache_mark_dirty(struct regmap *map)
 521 {
 522         map->lock(map->lock_arg);
 523         map->cache_dirty = true;
 524         map->no_sync_defaults = true;
 525         map->unlock(map->lock_arg);
 526 }
 527 EXPORT_SYMBOL_GPL(regcache_mark_dirty);
 528
 529 /**
 530  * regcache_cache_bypass: Put a register map into cache bypass mode
 531  *
 532  * @map: map to configure
 533  * @cache_bypass: flag if changes should not be written to the cache
 534  *
 535  * When a register map is marked with the cache bypass option, writes
 536  * to the register map API will only update the hardware and not the
 537  * the cache directly.  This is useful when syncing the cache back to
 538  * the hardware.
 539  */
 540 void regcache_cache_bypass(struct regmap *map, bool enable)
 541 {
 542         map->lock(map->lock_arg);
 543         WARN_ON(map->cache_only && enable);
 544         map->cache_bypass = enable;
 545         trace_regmap_cache_bypass(map, enable);
 546         map->unlock(map->lock_arg);
 547 }
 548 EXPORT_SYMBOL_GPL(regcache_cache_bypass);
 549
 550 bool regcache_set_val(struct regmap *map, void *base, unsigned int idx,
 551                       unsigned int val)
 552 {
 553         if (regcache_get_val(map, base, idx) == val)
 554                 return true;
 555
 556         /* Use device native format if possible */
 557         if (map->format.format_val) {
 558                 map->format.format_val(base + (map->cache_word_size * idx),
 559                                        val, 0);
 560                 return false;
 561         }
 562
 563         switch (map->cache_word_size) {
 564         case 1: {
 565                 u8 *cache = base;
 566
 567                 cache[idx] = val;
 568                 break;
 569         }
 570         case 2: {
 571                 u16 *cache = base;
 572
 573                 cache[idx] = val;
 574                 break;
 575         }
 576         case 4: {
 577                 u32 *cache = base;
 578
 579                 cache[idx] = val;
 580                 break;
 581         }
 582 #ifdef CONFIG_64BIT
 583         case 8: {
 584                 u64 *cache = base;
 585
 586                 cache[idx] = val;
 587                 break;
 588         }
 589 #endif
 590         default:
 591                 BUG();
 592         }
 593         return false;
 594 }
 595
 596 unsigned int regcache_get_val(struct regmap *map, const void *base,
 597                               unsigned int idx)
 598 {
 599         if (!base)
 600                 return -EINVAL;
 601
 602         /* Use device native format if possible */
 603         if (map->format.parse_val)
 604                 return map->format.parse_val(regcache_get_val_addr(map, base,
 605                                                                    idx));
 606
 607         switch (map->cache_word_size) {
 608         case 1: {
 609                 const u8 *cache = base;
 610
 611                 return cache[idx];
 612         }
 613         case 2: {
 614                 const u16 *cache = base;
 615
 616                 return cache[idx];
 617         }
 618         case 4: {
 619                 const u32 *cache = base;
 620
 621                 return cache[idx];
 622         }
 623 #ifdef CONFIG_64BIT
 624         case 8: {
 625                 const u64 *cache = base;
 626
 627                 return cache[idx];
 628         }
 629 #endif
 630         default:
 631                 BUG();
 632         }
 633         /* unreachable */
 634         return -1;
 635 }
 636
 637 static int regcache_default_cmp(const void *a, const void *b)
 638 {
 639         const struct reg_default *_a = a;
 640         const struct reg_default *_b = b;
 641
 642         return _a->reg - _b->reg;
 643 }
 644
 645 int regcache_lookup_reg(struct regmap *map, unsigned int reg)
 646 {
 647         struct reg_default key;
 648         struct reg_default *r;
 649
 650         key.reg = reg;
 651         key.def = 0;
 652
 653         r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
 654                     sizeof(struct reg_default), regcache_default_cmp);
 655
 656         if (r)
 657                 return r - map->reg_defaults;
 658         else
 659                 return -ENOENT;
 660 }
 661
 662 static bool regcache_reg_present(unsigned long *cache_present, unsigned int idx)
 663 {
 664         if (!cache_present)
 665                 return true;
 666
 667         return test_bit(idx, cache_present);
 668 }
 669
 670 static int regcache_sync_block_single(struct regmap *map, void *block,
 671                                       unsigned long *cache_present,
 672                                       unsigned int block_base,
 673                                       unsigned int start, unsigned int end)
 674 {
 675         unsigned int i, regtmp, val;
 676         int ret;
 677
 678         for (i = start; i < end; i++) {
 679                 regtmp = block_base + (i * map->reg_stride);
 680
 681                 if (!regcache_reg_present(cache_present, i) ||
 682                     !regmap_writeable(map, regtmp))
 683                         continue;
 684
 685                 val = regcache_get_val(map, block, i);
 686                 if (!regcache_reg_needs_sync(map, regtmp, val))
 687                         continue;
 688
 689                 map->cache_bypass = true;
 690
 691                 ret = _regmap_write(map, regtmp, val);
 692
 693                 map->cache_bypass = false;
 694                 if (ret != 0) {
 695                         dev_err(map->dev, "Unable to sync register %#x. %d\n",
 696                                 regtmp, ret);
 697                         return ret;
 698                 }
 699                 dev_dbg(map->dev, "Synced register %#x, value %#x\n",
 700                         regtmp, val);
 701         }
 702
 703         return 0;
 704 }
 705
 706 static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
 707                                          unsigned int base, unsigned int cur)
 708 {
 709         size_t val_bytes = map->format.val_bytes;
 710         int ret, count;
 711
 712         if (*data == NULL)
 713                 return 0;
 714
 715         count = (cur - base) / map->reg_stride;
 716
 717         dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",
 718                 count * val_bytes, count, base, cur - map->reg_stride);
 719
 720         map->cache_bypass = true;
 721
 722         ret = _regmap_raw_write(map, base, *data, count * val_bytes);
 723         if (ret)
 724                 dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n",
 725                         base, cur - map->reg_stride, ret);
 726
 727         map->cache_bypass = false;
 728
 729         *data = NULL;
 730
 731         return ret;
 732 }
 733
 734 static int regcache_sync_block_raw(struct regmap *map, void *block,
 735                             unsigned long *cache_present,
 736                             unsigned int block_base, unsigned int start,
 737                             unsigned int end)
 738 {
 739         unsigned int i, val;
 740         unsigned int regtmp = 0;
 741         unsigned int base = 0;
 742         const void *data = NULL;
 743         int ret;
 744
 745         for (i = start; i < end; i++) {
 746                 regtmp = block_base + (i * map->reg_stride);
 747
 748                 if (!regcache_reg_present(cache_present, i) ||
 749                     !regmap_writeable(map, regtmp)) {
 750                         ret = regcache_sync_block_raw_flush(map, &data,
 751                                                             base, regtmp);
 752                         if (ret != 0)
 753                                 return ret;
 754                         continue;
 755                 }
 756
 757                 val = regcache_get_val(map, block, i);
 758                 if (!regcache_reg_needs_sync(map, regtmp, val)) {
 759                         ret = regcache_sync_block_raw_flush(map, &data,
 760                                                             base, regtmp);
 761                         if (ret != 0)
 762                                 return ret;
 763                         continue;
 764                 }
 765
 766                 if (!data) {
 767                         data = regcache_get_val_addr(map, block, i);
 768                         base = regtmp;
 769                 }
 770         }
 771
 772         return regcache_sync_block_raw_flush(map, &data, base, regtmp +
 773                         map->reg_stride);
 774 }
 775
 776 int regcache_sync_block(struct regmap *map, void *block,
 777                         unsigned long *cache_present,
 778                         unsigned int block_base, unsigned int start,
 779                         unsigned int end)
 780 {
 781         if (regmap_can_raw_write(map) && !map->use_single_write)
 782                 return regcache_sync_block_raw(map, block, cache_present,
 783                                                block_base, start, end);
 784         else
 785                 return regcache_sync_block_single(map, block, cache_present,
 786                                                   block_base, start, end);
 787 }