3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
12 * Wu Fengguang <wfg@linux.intel.com>
15 * Wu Fengguang <wfg@linux.intel.com>
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <linux/pm_runtime.h>
37 #include <sound/core.h>
38 #include <sound/jack.h>
39 #include <sound/asoundef.h>
40 #include <sound/tlv.h>
41 #include <sound/hdaudio.h>
42 #include <sound/hda_i915.h>
43 #include <sound/hda_chmap.h>
44 #include "hda_codec.h"
45 #include "hda_local.h"
48 static bool static_hdmi_pcm
;
49 module_param(static_hdmi_pcm
, bool, 0644);
50 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
52 #define is_haswell(codec) ((codec)->core.vendor_id == 0x80862807)
53 #define is_broadwell(codec) ((codec)->core.vendor_id == 0x80862808)
54 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
55 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
56 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
57 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
58 || is_skylake(codec) || is_broxton(codec) \
59 || is_kabylake(codec))
61 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
62 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
63 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
65 struct hdmi_spec_per_cvt
{
68 unsigned int channels_min
;
69 unsigned int channels_max
;
75 /* max. connections to a widget */
76 #define HDA_MAX_CONNECTIONS 32
78 struct hdmi_spec_per_pin
{
80 /* pin idx, different device entries on the same pin use the same idx */
83 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
87 struct hda_codec
*codec
;
88 struct hdmi_eld sink_eld
;
90 struct delayed_work work
;
91 struct hdmi_pcm
*pcm
; /* pointer to spec->pcm_rec[n] dynamically*/
92 int pcm_idx
; /* which pcm is attached. -1 means no pcm is attached */
94 bool setup
; /* the stream has been set up by prepare callback */
95 int channels
; /* current number of channels */
97 bool chmap_set
; /* channel-map override by ALSA API? */
98 unsigned char chmap
[8]; /* ALSA API channel-map */
99 #ifdef CONFIG_SND_PROC_FS
100 struct snd_info_entry
*proc_entry
;
104 /* operations used by generic code that can be overridden by patches */
106 int (*pin_get_eld
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
107 unsigned char *buf
, int *eld_size
);
109 void (*pin_setup_infoframe
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
110 int ca
, int active_channels
, int conn_type
);
112 /* enable/disable HBR (HD passthrough) */
113 int (*pin_hbr_setup
)(struct hda_codec
*codec
, hda_nid_t pin_nid
, bool hbr
);
115 int (*setup_stream
)(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
116 hda_nid_t pin_nid
, u32 stream_tag
, int format
);
118 void (*pin_cvt_fixup
)(struct hda_codec
*codec
,
119 struct hdmi_spec_per_pin
*per_pin
,
125 struct snd_jack
*jack
;
126 struct snd_kcontrol
*eld_ctl
;
131 struct snd_array cvts
; /* struct hdmi_spec_per_cvt */
132 hda_nid_t cvt_nids
[4]; /* only for haswell fix */
135 struct snd_array pins
; /* struct hdmi_spec_per_pin */
136 struct hdmi_pcm pcm_rec
[16];
137 struct mutex pcm_lock
;
138 /* pcm_bitmap means which pcms have been assigned to pins*/
139 unsigned long pcm_bitmap
;
140 int pcm_used
; /* counter of pcm_rec[] */
141 /* bitmap shows whether the pcm is opened in user space
142 * bit 0 means the first playback PCM (PCM3);
143 * bit 1 means the second playback PCM, and so on.
145 unsigned long pcm_in_use
;
147 struct hdmi_eld temp_eld
;
153 * Non-generic VIA/NVIDIA specific
155 struct hda_multi_out multiout
;
156 struct hda_pcm_stream pcm_playback
;
158 /* i915/powerwell (Haswell+/Valleyview+) specific */
159 bool use_acomp_notifier
; /* use i915 eld_notify callback for hotplug */
160 struct i915_audio_component_audio_ops i915_audio_ops
;
161 bool i915_bound
; /* was i915 bound in this driver? */
163 struct hdac_chmap chmap
;
166 #ifdef CONFIG_SND_HDA_I915
167 static inline bool codec_has_acomp(struct hda_codec
*codec
)
169 struct hdmi_spec
*spec
= codec
->spec
;
170 return spec
->use_acomp_notifier
;
173 #define codec_has_acomp(codec) false
176 struct hdmi_audio_infoframe
{
183 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
187 u8 LFEPBL01_LSV36_DM_INH7
;
190 struct dp_audio_infoframe
{
193 u8 ver
; /* 0x11 << 2 */
195 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
199 u8 LFEPBL01_LSV36_DM_INH7
;
202 union audio_infoframe
{
203 struct hdmi_audio_infoframe hdmi
;
204 struct dp_audio_infoframe dp
;
212 #define get_pin(spec, idx) \
213 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
214 #define get_cvt(spec, idx) \
215 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
216 /* obtain hdmi_pcm object assigned to idx */
217 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
218 /* obtain hda_pcm object assigned to idx */
219 #define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
221 static int pin_nid_to_pin_index(struct hda_codec
*codec
, hda_nid_t pin_nid
)
223 struct hdmi_spec
*spec
= codec
->spec
;
226 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
227 if (get_pin(spec
, pin_idx
)->pin_nid
== pin_nid
)
230 codec_warn(codec
, "HDMI: pin nid %d not registered\n", pin_nid
);
234 static int hinfo_to_pcm_index(struct hda_codec
*codec
,
235 struct hda_pcm_stream
*hinfo
)
237 struct hdmi_spec
*spec
= codec
->spec
;
240 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++)
241 if (get_pcm_rec(spec
, pcm_idx
)->stream
== hinfo
)
244 codec_warn(codec
, "HDMI: hinfo %p not registered\n", hinfo
);
248 static int hinfo_to_pin_index(struct hda_codec
*codec
,
249 struct hda_pcm_stream
*hinfo
)
251 struct hdmi_spec
*spec
= codec
->spec
;
252 struct hdmi_spec_per_pin
*per_pin
;
255 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
256 per_pin
= get_pin(spec
, pin_idx
);
258 per_pin
->pcm
->pcm
->stream
== hinfo
)
262 codec_dbg(codec
, "HDMI: hinfo %p not registered\n", hinfo
);
266 static struct hdmi_spec_per_pin
*pcm_idx_to_pin(struct hdmi_spec
*spec
,
270 struct hdmi_spec_per_pin
*per_pin
;
272 for (i
= 0; i
< spec
->num_pins
; i
++) {
273 per_pin
= get_pin(spec
, i
);
274 if (per_pin
->pcm_idx
== pcm_idx
)
280 static int cvt_nid_to_cvt_index(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
282 struct hdmi_spec
*spec
= codec
->spec
;
285 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
286 if (get_cvt(spec
, cvt_idx
)->cvt_nid
== cvt_nid
)
289 codec_warn(codec
, "HDMI: cvt nid %d not registered\n", cvt_nid
);
293 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
294 struct snd_ctl_elem_info
*uinfo
)
296 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
297 struct hdmi_spec
*spec
= codec
->spec
;
298 struct hdmi_spec_per_pin
*per_pin
;
299 struct hdmi_eld
*eld
;
302 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
304 pcm_idx
= kcontrol
->private_value
;
305 mutex_lock(&spec
->pcm_lock
);
306 per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
308 /* no pin is bound to the pcm */
310 mutex_unlock(&spec
->pcm_lock
);
313 eld
= &per_pin
->sink_eld
;
314 uinfo
->count
= eld
->eld_valid
? eld
->eld_size
: 0;
315 mutex_unlock(&spec
->pcm_lock
);
320 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
321 struct snd_ctl_elem_value
*ucontrol
)
323 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
324 struct hdmi_spec
*spec
= codec
->spec
;
325 struct hdmi_spec_per_pin
*per_pin
;
326 struct hdmi_eld
*eld
;
329 pcm_idx
= kcontrol
->private_value
;
330 mutex_lock(&spec
->pcm_lock
);
331 per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
333 /* no pin is bound to the pcm */
334 memset(ucontrol
->value
.bytes
.data
, 0,
335 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
336 mutex_unlock(&spec
->pcm_lock
);
339 eld
= &per_pin
->sink_eld
;
341 if (eld
->eld_size
> ARRAY_SIZE(ucontrol
->value
.bytes
.data
) ||
342 eld
->eld_size
> ELD_MAX_SIZE
) {
343 mutex_unlock(&spec
->pcm_lock
);
348 memset(ucontrol
->value
.bytes
.data
, 0,
349 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
351 memcpy(ucontrol
->value
.bytes
.data
, eld
->eld_buffer
,
353 mutex_unlock(&spec
->pcm_lock
);
358 static struct snd_kcontrol_new eld_bytes_ctl
= {
359 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
360 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
362 .info
= hdmi_eld_ctl_info
,
363 .get
= hdmi_eld_ctl_get
,
366 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pcm_idx
,
369 struct snd_kcontrol
*kctl
;
370 struct hdmi_spec
*spec
= codec
->spec
;
373 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
376 kctl
->private_value
= pcm_idx
;
377 kctl
->id
.device
= device
;
379 /* no pin nid is associated with the kctl now
380 * tbd: associate pin nid to eld ctl later
382 err
= snd_hda_ctl_add(codec
, 0, kctl
);
386 get_hdmi_pcm(spec
, pcm_idx
)->eld_ctl
= kctl
;
391 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
392 int *packet_index
, int *byte_index
)
396 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
397 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
399 *packet_index
= val
>> 5;
400 *byte_index
= val
& 0x1f;
404 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
405 int packet_index
, int byte_index
)
409 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
411 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
414 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
417 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
420 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
422 struct hdmi_spec
*spec
= codec
->spec
;
426 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
427 snd_hda_codec_write(codec
, pin_nid
, 0,
428 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
430 if (spec
->dyn_pin_out
)
431 /* Disable pin out until stream is active */
434 /* Enable pin out: some machines with GM965 gets broken output
435 * when the pin is disabled or changed while using with HDMI
439 snd_hda_codec_write(codec
, pin_nid
, 0,
440 AC_VERB_SET_PIN_WIDGET_CONTROL
, pin_out
);
447 #ifdef CONFIG_SND_PROC_FS
448 static void print_eld_info(struct snd_info_entry
*entry
,
449 struct snd_info_buffer
*buffer
)
451 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
453 mutex_lock(&per_pin
->lock
);
454 snd_hdmi_print_eld_info(&per_pin
->sink_eld
, buffer
);
455 mutex_unlock(&per_pin
->lock
);
458 static void write_eld_info(struct snd_info_entry
*entry
,
459 struct snd_info_buffer
*buffer
)
461 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
463 mutex_lock(&per_pin
->lock
);
464 snd_hdmi_write_eld_info(&per_pin
->sink_eld
, buffer
);
465 mutex_unlock(&per_pin
->lock
);
468 static int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
, int index
)
471 struct hda_codec
*codec
= per_pin
->codec
;
472 struct snd_info_entry
*entry
;
475 snprintf(name
, sizeof(name
), "eld#%d.%d", codec
->addr
, index
);
476 err
= snd_card_proc_new(codec
->card
, name
, &entry
);
480 snd_info_set_text_ops(entry
, per_pin
, print_eld_info
);
481 entry
->c
.text
.write
= write_eld_info
;
482 entry
->mode
|= S_IWUSR
;
483 per_pin
->proc_entry
= entry
;
488 static void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
490 if (!per_pin
->codec
->bus
->shutdown
) {
491 snd_info_free_entry(per_pin
->proc_entry
);
492 per_pin
->proc_entry
= NULL
;
496 static inline int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
,
501 static inline void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
507 * Audio InfoFrame routines
511 * Enable Audio InfoFrame Transmission
513 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
516 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
517 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
522 * Disable Audio InfoFrame Transmission
524 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
527 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
528 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
532 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
534 #ifdef CONFIG_SND_DEBUG_VERBOSE
538 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
539 codec_dbg(codec
, "HDMI: ELD buf size is %d\n", size
);
541 for (i
= 0; i
< 8; i
++) {
542 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
543 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
544 codec_dbg(codec
, "HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
549 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
555 for (i
= 0; i
< 8; i
++) {
556 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
557 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
561 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
562 for (j
= 1; j
< 1000; j
++) {
563 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
564 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
566 codec_dbg(codec
, "dip index %d: %d != %d\n",
568 if (bi
== 0) /* byte index wrapped around */
572 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
578 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
580 u8
*bytes
= (u8
*)hdmi_ai
;
584 hdmi_ai
->checksum
= 0;
586 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
589 hdmi_ai
->checksum
= -sum
;
592 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
598 hdmi_debug_dip_size(codec
, pin_nid
);
599 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
601 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
602 for (i
= 0; i
< size
; i
++)
603 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
606 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
612 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
616 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
617 for (i
= 0; i
< size
; i
++) {
618 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
619 AC_VERB_GET_HDMI_DIP_DATA
, 0);
627 static void hdmi_pin_setup_infoframe(struct hda_codec
*codec
,
629 int ca
, int active_channels
,
632 union audio_infoframe ai
;
634 memset(&ai
, 0, sizeof(ai
));
635 if (conn_type
== 0) { /* HDMI */
636 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
638 hdmi_ai
->type
= 0x84;
641 hdmi_ai
->CC02_CT47
= active_channels
- 1;
643 hdmi_checksum_audio_infoframe(hdmi_ai
);
644 } else if (conn_type
== 1) { /* DisplayPort */
645 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
649 dp_ai
->ver
= 0x11 << 2;
650 dp_ai
->CC02_CT47
= active_channels
- 1;
653 codec_dbg(codec
, "HDMI: unknown connection type at pin %d\n",
659 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
660 * sizeof(*dp_ai) to avoid partial match/update problems when
661 * the user switches between HDMI/DP monitors.
663 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
666 "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
668 active_channels
, ca
);
669 hdmi_stop_infoframe_trans(codec
, pin_nid
);
670 hdmi_fill_audio_infoframe(codec
, pin_nid
,
671 ai
.bytes
, sizeof(ai
));
672 hdmi_start_infoframe_trans(codec
, pin_nid
);
676 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
,
677 struct hdmi_spec_per_pin
*per_pin
,
680 struct hdmi_spec
*spec
= codec
->spec
;
681 struct hdac_chmap
*chmap
= &spec
->chmap
;
682 hda_nid_t pin_nid
= per_pin
->pin_nid
;
683 int channels
= per_pin
->channels
;
685 struct hdmi_eld
*eld
;
691 /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
692 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
693 snd_hda_codec_write(codec
, pin_nid
, 0,
694 AC_VERB_SET_AMP_GAIN_MUTE
,
697 eld
= &per_pin
->sink_eld
;
699 ca
= snd_hdac_channel_allocation(&codec
->core
,
700 eld
->info
.spk_alloc
, channels
,
701 per_pin
->chmap_set
, non_pcm
, per_pin
->chmap
);
703 active_channels
= snd_hdac_get_active_channels(ca
);
705 chmap
->ops
.set_channel_count(&codec
->core
, per_pin
->cvt_nid
,
709 * always configure channel mapping, it may have been changed by the
710 * user in the meantime
712 snd_hdac_setup_channel_mapping(&spec
->chmap
,
713 pin_nid
, non_pcm
, ca
, channels
,
714 per_pin
->chmap
, per_pin
->chmap_set
);
716 spec
->ops
.pin_setup_infoframe(codec
, pin_nid
, ca
, active_channels
,
717 eld
->info
.conn_type
);
719 per_pin
->non_pcm
= non_pcm
;
726 static bool hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
728 static void check_presence_and_report(struct hda_codec
*codec
, hda_nid_t nid
)
730 struct hdmi_spec
*spec
= codec
->spec
;
731 int pin_idx
= pin_nid_to_pin_index(codec
, nid
);
735 mutex_lock(&spec
->pcm_lock
);
736 if (hdmi_present_sense(get_pin(spec
, pin_idx
), 1))
737 snd_hda_jack_report_sync(codec
);
738 mutex_unlock(&spec
->pcm_lock
);
741 static void jack_callback(struct hda_codec
*codec
,
742 struct hda_jack_callback
*jack
)
744 check_presence_and_report(codec
, jack
->nid
);
747 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
749 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
750 struct hda_jack_tbl
*jack
;
751 int dev_entry
= (res
& AC_UNSOL_RES_DE
) >> AC_UNSOL_RES_DE_SHIFT
;
753 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
);
756 jack
->jack_dirty
= 1;
759 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
760 codec
->addr
, jack
->nid
, dev_entry
, !!(res
& AC_UNSOL_RES_IA
),
761 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
763 check_presence_and_report(codec
, jack
->nid
);
766 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
768 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
769 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
770 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
771 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
774 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
789 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
791 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
792 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
794 if (!snd_hda_jack_tbl_get_from_tag(codec
, tag
)) {
795 codec_dbg(codec
, "Unexpected HDMI event tag 0x%x\n", tag
);
800 hdmi_intrinsic_event(codec
, res
);
802 hdmi_non_intrinsic_event(codec
, res
);
805 static void haswell_verify_D0(struct hda_codec
*codec
,
806 hda_nid_t cvt_nid
, hda_nid_t nid
)
810 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
811 * thus pins could only choose converter 0 for use. Make sure the
812 * converters are in correct power state */
813 if (!snd_hda_check_power_state(codec
, cvt_nid
, AC_PWRST_D0
))
814 snd_hda_codec_write(codec
, cvt_nid
, 0, AC_VERB_SET_POWER_STATE
, AC_PWRST_D0
);
816 if (!snd_hda_check_power_state(codec
, nid
, AC_PWRST_D0
)) {
817 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_POWER_STATE
,
820 pwr
= snd_hda_codec_read(codec
, nid
, 0, AC_VERB_GET_POWER_STATE
, 0);
821 pwr
= (pwr
& AC_PWRST_ACTUAL
) >> AC_PWRST_ACTUAL_SHIFT
;
822 codec_dbg(codec
, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid
, pwr
);
830 /* HBR should be Non-PCM, 8 channels */
831 #define is_hbr_format(format) \
832 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
834 static int hdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
837 int pinctl
, new_pinctl
;
839 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
840 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
841 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
844 return hbr
? -EINVAL
: 0;
846 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
848 new_pinctl
|= AC_PINCTL_EPT_HBR
;
850 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
853 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
855 pinctl
== new_pinctl
? "" : "new-",
858 if (pinctl
!= new_pinctl
)
859 snd_hda_codec_write(codec
, pin_nid
, 0,
860 AC_VERB_SET_PIN_WIDGET_CONTROL
,
868 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
869 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
871 struct hdmi_spec
*spec
= codec
->spec
;
874 err
= spec
->ops
.pin_hbr_setup(codec
, pin_nid
, is_hbr_format(format
));
877 codec_dbg(codec
, "hdmi_setup_stream: HBR is not supported\n");
881 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
885 /* Try to find an available converter
886 * If pin_idx is less then zero, just try to find an available converter.
887 * Otherwise, try to find an available converter and get the cvt mux index
890 static int hdmi_choose_cvt(struct hda_codec
*codec
,
891 int pin_idx
, int *cvt_id
)
893 struct hdmi_spec
*spec
= codec
->spec
;
894 struct hdmi_spec_per_pin
*per_pin
;
895 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
896 int cvt_idx
, mux_idx
= 0;
898 /* pin_idx < 0 means no pin will be bound to the converter */
902 per_pin
= get_pin(spec
, pin_idx
);
904 /* Dynamically assign converter to stream */
905 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
906 per_cvt
= get_cvt(spec
, cvt_idx
);
908 /* Must not already be assigned */
909 if (per_cvt
->assigned
)
913 /* Must be in pin's mux's list of converters */
914 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
915 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
917 /* Not in mux list */
918 if (mux_idx
== per_pin
->num_mux_nids
)
923 /* No free converters */
924 if (cvt_idx
== spec
->num_cvts
)
928 per_pin
->mux_idx
= mux_idx
;
936 /* Assure the pin select the right convetor */
937 static void intel_verify_pin_cvt_connect(struct hda_codec
*codec
,
938 struct hdmi_spec_per_pin
*per_pin
)
940 hda_nid_t pin_nid
= per_pin
->pin_nid
;
943 mux_idx
= per_pin
->mux_idx
;
944 curr
= snd_hda_codec_read(codec
, pin_nid
, 0,
945 AC_VERB_GET_CONNECT_SEL
, 0);
947 snd_hda_codec_write_cache(codec
, pin_nid
, 0,
948 AC_VERB_SET_CONNECT_SEL
,
952 /* get the mux index for the converter of the pins
953 * converter's mux index is the same for all pins on Intel platform
955 static int intel_cvt_id_to_mux_idx(struct hdmi_spec
*spec
,
960 for (i
= 0; i
< spec
->num_cvts
; i
++)
961 if (spec
->cvt_nids
[i
] == cvt_nid
)
966 /* Intel HDMI workaround to fix audio routing issue:
967 * For some Intel display codecs, pins share the same connection list.
968 * So a conveter can be selected by multiple pins and playback on any of these
969 * pins will generate sound on the external display, because audio flows from
970 * the same converter to the display pipeline. Also muting one pin may make
971 * other pins have no sound output.
972 * So this function assures that an assigned converter for a pin is not selected
975 static void intel_not_share_assigned_cvt(struct hda_codec
*codec
,
976 hda_nid_t pin_nid
, int mux_idx
)
978 struct hdmi_spec
*spec
= codec
->spec
;
981 struct hdmi_spec_per_cvt
*per_cvt
;
983 /* configure all pins, including "no physical connection" ones */
984 for_each_hda_codec_node(nid
, codec
) {
985 unsigned int wid_caps
= get_wcaps(codec
, nid
);
986 unsigned int wid_type
= get_wcaps_type(wid_caps
);
988 if (wid_type
!= AC_WID_PIN
)
994 curr
= snd_hda_codec_read(codec
, nid
, 0,
995 AC_VERB_GET_CONNECT_SEL
, 0);
999 /* choose an unassigned converter. The conveters in the
1000 * connection list are in the same order as in the codec.
1002 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1003 per_cvt
= get_cvt(spec
, cvt_idx
);
1004 if (!per_cvt
->assigned
) {
1006 "choose cvt %d for pin nid %d\n",
1008 snd_hda_codec_write_cache(codec
, nid
, 0,
1009 AC_VERB_SET_CONNECT_SEL
,
1017 /* A wrapper of intel_not_share_asigned_cvt() */
1018 static void intel_not_share_assigned_cvt_nid(struct hda_codec
*codec
,
1019 hda_nid_t pin_nid
, hda_nid_t cvt_nid
)
1022 struct hdmi_spec
*spec
= codec
->spec
;
1024 /* On Intel platform, the mapping of converter nid to
1025 * mux index of the pins are always the same.
1026 * The pin nid may be 0, this means all pins will not
1027 * share the converter.
1029 mux_idx
= intel_cvt_id_to_mux_idx(spec
, cvt_nid
);
1031 intel_not_share_assigned_cvt(codec
, pin_nid
, mux_idx
);
1034 /* skeleton caller of pin_cvt_fixup ops */
1035 static void pin_cvt_fixup(struct hda_codec
*codec
,
1036 struct hdmi_spec_per_pin
*per_pin
,
1039 struct hdmi_spec
*spec
= codec
->spec
;
1041 if (spec
->ops
.pin_cvt_fixup
)
1042 spec
->ops
.pin_cvt_fixup(codec
, per_pin
, cvt_nid
);
1045 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1046 * in dyn_pcm_assign mode.
1048 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream
*hinfo
,
1049 struct hda_codec
*codec
,
1050 struct snd_pcm_substream
*substream
)
1052 struct hdmi_spec
*spec
= codec
->spec
;
1053 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1054 int cvt_idx
, pcm_idx
;
1055 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1058 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1062 err
= hdmi_choose_cvt(codec
, -1, &cvt_idx
);
1066 per_cvt
= get_cvt(spec
, cvt_idx
);
1067 per_cvt
->assigned
= 1;
1068 hinfo
->nid
= per_cvt
->cvt_nid
;
1070 pin_cvt_fixup(codec
, NULL
, per_cvt
->cvt_nid
);
1072 set_bit(pcm_idx
, &spec
->pcm_in_use
);
1073 /* todo: setup spdif ctls assign */
1075 /* Initially set the converter's capabilities */
1076 hinfo
->channels_min
= per_cvt
->channels_min
;
1077 hinfo
->channels_max
= per_cvt
->channels_max
;
1078 hinfo
->rates
= per_cvt
->rates
;
1079 hinfo
->formats
= per_cvt
->formats
;
1080 hinfo
->maxbps
= per_cvt
->maxbps
;
1082 /* Store the updated parameters */
1083 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1084 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1085 runtime
->hw
.formats
= hinfo
->formats
;
1086 runtime
->hw
.rates
= hinfo
->rates
;
1088 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1089 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1096 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
1097 struct hda_codec
*codec
,
1098 struct snd_pcm_substream
*substream
)
1100 struct hdmi_spec
*spec
= codec
->spec
;
1101 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1102 int pin_idx
, cvt_idx
, pcm_idx
;
1103 struct hdmi_spec_per_pin
*per_pin
;
1104 struct hdmi_eld
*eld
;
1105 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1108 /* Validate hinfo */
1109 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1113 mutex_lock(&spec
->pcm_lock
);
1114 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1115 if (!spec
->dyn_pcm_assign
) {
1116 if (snd_BUG_ON(pin_idx
< 0)) {
1117 mutex_unlock(&spec
->pcm_lock
);
1121 /* no pin is assigned to the PCM
1122 * PA need pcm open successfully when probe
1125 err
= hdmi_pcm_open_no_pin(hinfo
, codec
, substream
);
1126 mutex_unlock(&spec
->pcm_lock
);
1131 err
= hdmi_choose_cvt(codec
, pin_idx
, &cvt_idx
);
1133 mutex_unlock(&spec
->pcm_lock
);
1137 per_cvt
= get_cvt(spec
, cvt_idx
);
1138 /* Claim converter */
1139 per_cvt
->assigned
= 1;
1141 set_bit(pcm_idx
, &spec
->pcm_in_use
);
1142 per_pin
= get_pin(spec
, pin_idx
);
1143 per_pin
->cvt_nid
= per_cvt
->cvt_nid
;
1144 hinfo
->nid
= per_cvt
->cvt_nid
;
1146 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1147 AC_VERB_SET_CONNECT_SEL
,
1150 /* configure unused pins to choose other converters */
1151 pin_cvt_fixup(codec
, per_pin
, 0);
1153 snd_hda_spdif_ctls_assign(codec
, pcm_idx
, per_cvt
->cvt_nid
);
1155 /* Initially set the converter's capabilities */
1156 hinfo
->channels_min
= per_cvt
->channels_min
;
1157 hinfo
->channels_max
= per_cvt
->channels_max
;
1158 hinfo
->rates
= per_cvt
->rates
;
1159 hinfo
->formats
= per_cvt
->formats
;
1160 hinfo
->maxbps
= per_cvt
->maxbps
;
1162 eld
= &per_pin
->sink_eld
;
1163 /* Restrict capabilities by ELD if this isn't disabled */
1164 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
1165 snd_hdmi_eld_update_pcm_info(&eld
->info
, hinfo
);
1166 if (hinfo
->channels_min
> hinfo
->channels_max
||
1167 !hinfo
->rates
|| !hinfo
->formats
) {
1168 per_cvt
->assigned
= 0;
1170 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
1171 mutex_unlock(&spec
->pcm_lock
);
1176 mutex_unlock(&spec
->pcm_lock
);
1177 /* Store the updated parameters */
1178 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1179 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1180 runtime
->hw
.formats
= hinfo
->formats
;
1181 runtime
->hw
.rates
= hinfo
->rates
;
1183 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1184 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1189 * HDA/HDMI auto parsing
1191 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
1193 struct hdmi_spec
*spec
= codec
->spec
;
1194 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1195 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1197 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
1199 "HDMI: pin %d wcaps %#x does not support connection list\n",
1200 pin_nid
, get_wcaps(codec
, pin_nid
));
1204 per_pin
->num_mux_nids
= snd_hda_get_connections(codec
, pin_nid
,
1206 HDA_MAX_CONNECTIONS
);
1211 static int hdmi_find_pcm_slot(struct hdmi_spec
*spec
,
1212 struct hdmi_spec_per_pin
*per_pin
)
1216 /* try the prefer PCM */
1217 if (!test_bit(per_pin
->pin_nid_idx
, &spec
->pcm_bitmap
))
1218 return per_pin
->pin_nid_idx
;
1220 /* have a second try; check the "reserved area" over num_pins */
1221 for (i
= spec
->num_pins
; i
< spec
->pcm_used
; i
++) {
1222 if (!test_bit(i
, &spec
->pcm_bitmap
))
1226 /* the last try; check the empty slots in pins */
1227 for (i
= 0; i
< spec
->num_pins
; i
++) {
1228 if (!test_bit(i
, &spec
->pcm_bitmap
))
1234 static void hdmi_attach_hda_pcm(struct hdmi_spec
*spec
,
1235 struct hdmi_spec_per_pin
*per_pin
)
1239 /* pcm already be attached to the pin */
1242 idx
= hdmi_find_pcm_slot(spec
, per_pin
);
1245 per_pin
->pcm_idx
= idx
;
1246 per_pin
->pcm
= get_hdmi_pcm(spec
, idx
);
1247 set_bit(idx
, &spec
->pcm_bitmap
);
1250 static void hdmi_detach_hda_pcm(struct hdmi_spec
*spec
,
1251 struct hdmi_spec_per_pin
*per_pin
)
1255 /* pcm already be detached from the pin */
1258 idx
= per_pin
->pcm_idx
;
1259 per_pin
->pcm_idx
= -1;
1260 per_pin
->pcm
= NULL
;
1261 if (idx
>= 0 && idx
< spec
->pcm_used
)
1262 clear_bit(idx
, &spec
->pcm_bitmap
);
1265 static int hdmi_get_pin_cvt_mux(struct hdmi_spec
*spec
,
1266 struct hdmi_spec_per_pin
*per_pin
, hda_nid_t cvt_nid
)
1270 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
1271 if (per_pin
->mux_nids
[mux_idx
] == cvt_nid
)
1276 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
);
1278 static void hdmi_pcm_setup_pin(struct hdmi_spec
*spec
,
1279 struct hdmi_spec_per_pin
*per_pin
)
1281 struct hda_codec
*codec
= per_pin
->codec
;
1282 struct hda_pcm
*pcm
;
1283 struct hda_pcm_stream
*hinfo
;
1284 struct snd_pcm_substream
*substream
;
1288 if (per_pin
->pcm_idx
>= 0 && per_pin
->pcm_idx
< spec
->pcm_used
)
1289 pcm
= get_pcm_rec(spec
, per_pin
->pcm_idx
);
1292 if (!test_bit(per_pin
->pcm_idx
, &spec
->pcm_in_use
))
1295 /* hdmi audio only uses playback and one substream */
1296 hinfo
= pcm
->stream
;
1297 substream
= pcm
->pcm
->streams
[0].substream
;
1299 per_pin
->cvt_nid
= hinfo
->nid
;
1301 mux_idx
= hdmi_get_pin_cvt_mux(spec
, per_pin
, hinfo
->nid
);
1302 if (mux_idx
< per_pin
->num_mux_nids
)
1303 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1304 AC_VERB_SET_CONNECT_SEL
,
1306 snd_hda_spdif_ctls_assign(codec
, per_pin
->pcm_idx
, hinfo
->nid
);
1308 non_pcm
= check_non_pcm_per_cvt(codec
, hinfo
->nid
);
1309 if (substream
->runtime
)
1310 per_pin
->channels
= substream
->runtime
->channels
;
1311 per_pin
->setup
= true;
1312 per_pin
->mux_idx
= mux_idx
;
1314 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1317 static void hdmi_pcm_reset_pin(struct hdmi_spec
*spec
,
1318 struct hdmi_spec_per_pin
*per_pin
)
1320 if (per_pin
->pcm_idx
>= 0 && per_pin
->pcm_idx
< spec
->pcm_used
)
1321 snd_hda_spdif_ctls_unassign(per_pin
->codec
, per_pin
->pcm_idx
);
1323 per_pin
->chmap_set
= false;
1324 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1326 per_pin
->setup
= false;
1327 per_pin
->channels
= 0;
1330 /* update per_pin ELD from the given new ELD;
1331 * setup info frame and notification accordingly
1333 static void update_eld(struct hda_codec
*codec
,
1334 struct hdmi_spec_per_pin
*per_pin
,
1335 struct hdmi_eld
*eld
)
1337 struct hdmi_eld
*pin_eld
= &per_pin
->sink_eld
;
1338 struct hdmi_spec
*spec
= codec
->spec
;
1339 bool old_eld_valid
= pin_eld
->eld_valid
;
1343 /* for monitor disconnection, save pcm_idx firstly */
1344 pcm_idx
= per_pin
->pcm_idx
;
1345 if (spec
->dyn_pcm_assign
) {
1346 if (eld
->eld_valid
) {
1347 hdmi_attach_hda_pcm(spec
, per_pin
);
1348 hdmi_pcm_setup_pin(spec
, per_pin
);
1350 hdmi_pcm_reset_pin(spec
, per_pin
);
1351 hdmi_detach_hda_pcm(spec
, per_pin
);
1354 /* if pcm_idx == -1, it means this is in monitor connection event
1355 * we can get the correct pcm_idx now.
1358 pcm_idx
= per_pin
->pcm_idx
;
1361 snd_hdmi_show_eld(codec
, &eld
->info
);
1363 eld_changed
= (pin_eld
->eld_valid
!= eld
->eld_valid
);
1364 if (eld
->eld_valid
&& pin_eld
->eld_valid
)
1365 if (pin_eld
->eld_size
!= eld
->eld_size
||
1366 memcmp(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1367 eld
->eld_size
) != 0)
1370 pin_eld
->monitor_present
= eld
->monitor_present
;
1371 pin_eld
->eld_valid
= eld
->eld_valid
;
1372 pin_eld
->eld_size
= eld
->eld_size
;
1374 memcpy(pin_eld
->eld_buffer
, eld
->eld_buffer
, eld
->eld_size
);
1375 pin_eld
->info
= eld
->info
;
1378 * Re-setup pin and infoframe. This is needed e.g. when
1379 * - sink is first plugged-in
1380 * - transcoder can change during stream playback on Haswell
1381 * and this can make HW reset converter selection on a pin.
1383 if (eld
->eld_valid
&& !old_eld_valid
&& per_pin
->setup
) {
1384 pin_cvt_fixup(codec
, per_pin
, 0);
1385 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
1388 if (eld_changed
&& pcm_idx
>= 0)
1389 snd_ctl_notify(codec
->card
,
1390 SNDRV_CTL_EVENT_MASK_VALUE
|
1391 SNDRV_CTL_EVENT_MASK_INFO
,
1392 &get_hdmi_pcm(spec
, pcm_idx
)->eld_ctl
->id
);
1395 /* update ELD and jack state via HD-audio verbs */
1396 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin
*per_pin
,
1399 struct hda_jack_tbl
*jack
;
1400 struct hda_codec
*codec
= per_pin
->codec
;
1401 struct hdmi_spec
*spec
= codec
->spec
;
1402 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1403 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1405 * Always execute a GetPinSense verb here, even when called from
1406 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1407 * response's PD bit is not the real PD value, but indicates that
1408 * the real PD value changed. An older version of the HD-audio
1409 * specification worked this way. Hence, we just ignore the data in
1410 * the unsolicited response to avoid custom WARs.
1414 bool do_repoll
= false;
1416 present
= snd_hda_pin_sense(codec
, pin_nid
);
1418 mutex_lock(&per_pin
->lock
);
1419 eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
1420 if (eld
->monitor_present
)
1421 eld
->eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
1423 eld
->eld_valid
= false;
1426 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1427 codec
->addr
, pin_nid
, eld
->monitor_present
, eld
->eld_valid
);
1429 if (eld
->eld_valid
) {
1430 if (spec
->ops
.pin_get_eld(codec
, pin_nid
, eld
->eld_buffer
,
1431 &eld
->eld_size
) < 0)
1432 eld
->eld_valid
= false;
1434 if (snd_hdmi_parse_eld(codec
, &eld
->info
, eld
->eld_buffer
,
1436 eld
->eld_valid
= false;
1438 if (!eld
->eld_valid
&& repoll
)
1443 schedule_delayed_work(&per_pin
->work
, msecs_to_jiffies(300));
1445 update_eld(codec
, per_pin
, eld
);
1447 ret
= !repoll
|| !eld
->monitor_present
|| eld
->eld_valid
;
1449 jack
= snd_hda_jack_tbl_get(codec
, pin_nid
);
1451 jack
->block_report
= !ret
;
1452 jack
->pin_sense
= (eld
->monitor_present
&& eld
->eld_valid
) ?
1453 AC_PINSENSE_PRESENCE
: 0;
1455 mutex_unlock(&per_pin
->lock
);
1459 static struct snd_jack
*pin_idx_to_jack(struct hda_codec
*codec
,
1460 struct hdmi_spec_per_pin
*per_pin
)
1462 struct hdmi_spec
*spec
= codec
->spec
;
1463 struct snd_jack
*jack
= NULL
;
1464 struct hda_jack_tbl
*jack_tbl
;
1466 /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1467 * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1468 * NULL even after snd_hda_jack_tbl_clear() is called to
1469 * free snd_jack. This may cause access invalid memory
1470 * when calling snd_jack_report
1472 if (per_pin
->pcm_idx
>= 0 && spec
->dyn_pcm_assign
)
1473 jack
= spec
->pcm_rec
[per_pin
->pcm_idx
].jack
;
1474 else if (!spec
->dyn_pcm_assign
) {
1475 jack_tbl
= snd_hda_jack_tbl_get(codec
, per_pin
->pin_nid
);
1477 jack
= jack_tbl
->jack
;
1482 /* update ELD and jack state via audio component */
1483 static void sync_eld_via_acomp(struct hda_codec
*codec
,
1484 struct hdmi_spec_per_pin
*per_pin
)
1486 struct hdmi_spec
*spec
= codec
->spec
;
1487 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1488 struct snd_jack
*jack
= NULL
;
1491 mutex_lock(&per_pin
->lock
);
1492 eld
->monitor_present
= false;
1493 size
= snd_hdac_acomp_get_eld(&codec
->core
, per_pin
->pin_nid
,
1494 &eld
->monitor_present
, eld
->eld_buffer
,
1497 size
= min(size
, ELD_MAX_SIZE
);
1498 if (snd_hdmi_parse_eld(codec
, &eld
->info
,
1499 eld
->eld_buffer
, size
) < 0)
1504 eld
->eld_valid
= true;
1505 eld
->eld_size
= size
;
1507 eld
->eld_valid
= false;
1511 /* pcm_idx >=0 before update_eld() means it is in monitor
1512 * disconnected event. Jack must be fetched before update_eld()
1514 jack
= pin_idx_to_jack(codec
, per_pin
);
1515 update_eld(codec
, per_pin
, eld
);
1517 jack
= pin_idx_to_jack(codec
, per_pin
);
1520 snd_jack_report(jack
,
1521 eld
->monitor_present
? SND_JACK_AVOUT
: 0);
1523 mutex_unlock(&per_pin
->lock
);
1526 static bool hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
1528 struct hda_codec
*codec
= per_pin
->codec
;
1531 /* no temporary power up/down needed for component notifier */
1532 if (!codec_has_acomp(codec
)) {
1533 ret
= snd_hda_power_up_pm(codec
);
1534 if (ret
< 0 && pm_runtime_suspended(hda_codec_dev(codec
))) {
1535 snd_hda_power_down_pm(codec
);
1540 if (codec_has_acomp(codec
)) {
1541 sync_eld_via_acomp(codec
, per_pin
);
1542 ret
= false; /* don't call snd_hda_jack_report_sync() */
1544 ret
= hdmi_present_sense_via_verbs(per_pin
, repoll
);
1547 if (!codec_has_acomp(codec
))
1548 snd_hda_power_down_pm(codec
);
1553 static void hdmi_repoll_eld(struct work_struct
*work
)
1555 struct hdmi_spec_per_pin
*per_pin
=
1556 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1557 struct hda_codec
*codec
= per_pin
->codec
;
1558 struct hdmi_spec
*spec
= codec
->spec
;
1559 struct hda_jack_tbl
*jack
;
1561 jack
= snd_hda_jack_tbl_get(codec
, per_pin
->pin_nid
);
1563 jack
->jack_dirty
= 1;
1565 if (per_pin
->repoll_count
++ > 6)
1566 per_pin
->repoll_count
= 0;
1568 mutex_lock(&spec
->pcm_lock
);
1569 if (hdmi_present_sense(per_pin
, per_pin
->repoll_count
))
1570 snd_hda_jack_report_sync(per_pin
->codec
);
1571 mutex_unlock(&spec
->pcm_lock
);
1574 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
1577 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1579 struct hdmi_spec
*spec
= codec
->spec
;
1580 unsigned int caps
, config
;
1582 struct hdmi_spec_per_pin
*per_pin
;
1585 caps
= snd_hda_query_pin_caps(codec
, pin_nid
);
1586 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1589 config
= snd_hda_codec_get_pincfg(codec
, pin_nid
);
1590 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1593 if (is_haswell_plus(codec
))
1594 intel_haswell_fixup_connect_list(codec
, pin_nid
);
1596 pin_idx
= spec
->num_pins
;
1597 per_pin
= snd_array_new(&spec
->pins
);
1601 per_pin
->pin_nid
= pin_nid
;
1602 per_pin
->non_pcm
= false;
1603 if (spec
->dyn_pcm_assign
)
1604 per_pin
->pcm_idx
= -1;
1606 per_pin
->pcm
= get_hdmi_pcm(spec
, pin_idx
);
1607 per_pin
->pcm_idx
= pin_idx
;
1609 per_pin
->pin_nid_idx
= pin_idx
;
1611 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1620 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1622 struct hdmi_spec
*spec
= codec
->spec
;
1623 struct hdmi_spec_per_cvt
*per_cvt
;
1627 chans
= get_wcaps(codec
, cvt_nid
);
1628 chans
= get_wcaps_channels(chans
);
1630 per_cvt
= snd_array_new(&spec
->cvts
);
1634 per_cvt
->cvt_nid
= cvt_nid
;
1635 per_cvt
->channels_min
= 2;
1637 per_cvt
->channels_max
= chans
;
1638 if (chans
> spec
->chmap
.channels_max
)
1639 spec
->chmap
.channels_max
= chans
;
1642 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1649 if (spec
->num_cvts
< ARRAY_SIZE(spec
->cvt_nids
))
1650 spec
->cvt_nids
[spec
->num_cvts
] = cvt_nid
;
1656 static int hdmi_parse_codec(struct hda_codec
*codec
)
1661 nodes
= snd_hda_get_sub_nodes(codec
, codec
->core
.afg
, &nid
);
1662 if (!nid
|| nodes
< 0) {
1663 codec_warn(codec
, "HDMI: failed to get afg sub nodes\n");
1667 for (i
= 0; i
< nodes
; i
++, nid
++) {
1671 caps
= get_wcaps(codec
, nid
);
1672 type
= get_wcaps_type(caps
);
1674 if (!(caps
& AC_WCAP_DIGITAL
))
1678 case AC_WID_AUD_OUT
:
1679 hdmi_add_cvt(codec
, nid
);
1682 hdmi_add_pin(codec
, nid
);
1692 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1694 struct hda_spdif_out
*spdif
;
1697 mutex_lock(&codec
->spdif_mutex
);
1698 spdif
= snd_hda_spdif_out_of_nid(codec
, cvt_nid
);
1699 /* Add sanity check to pass klockwork check.
1700 * This should never happen.
1702 if (WARN_ON(spdif
== NULL
))
1704 non_pcm
= !!(spdif
->status
& IEC958_AES0_NONAUDIO
);
1705 mutex_unlock(&codec
->spdif_mutex
);
1713 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1714 struct hda_codec
*codec
,
1715 unsigned int stream_tag
,
1716 unsigned int format
,
1717 struct snd_pcm_substream
*substream
)
1719 hda_nid_t cvt_nid
= hinfo
->nid
;
1720 struct hdmi_spec
*spec
= codec
->spec
;
1722 struct hdmi_spec_per_pin
*per_pin
;
1724 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1729 mutex_lock(&spec
->pcm_lock
);
1730 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1731 if (spec
->dyn_pcm_assign
&& pin_idx
< 0) {
1732 /* when dyn_pcm_assign and pcm is not bound to a pin
1733 * skip pin setup and return 0 to make audio playback
1736 pin_cvt_fixup(codec
, NULL
, cvt_nid
);
1737 snd_hda_codec_setup_stream(codec
, cvt_nid
,
1738 stream_tag
, 0, format
);
1739 mutex_unlock(&spec
->pcm_lock
);
1743 if (snd_BUG_ON(pin_idx
< 0)) {
1744 mutex_unlock(&spec
->pcm_lock
);
1747 per_pin
= get_pin(spec
, pin_idx
);
1748 pin_nid
= per_pin
->pin_nid
;
1750 /* Verify pin:cvt selections to avoid silent audio after S3.
1751 * After S3, the audio driver restores pin:cvt selections
1752 * but this can happen before gfx is ready and such selection
1753 * is overlooked by HW. Thus multiple pins can share a same
1754 * default convertor and mute control will affect each other,
1755 * which can cause a resumed audio playback become silent
1758 pin_cvt_fixup(codec
, per_pin
, 0);
1760 /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1761 /* Todo: add DP1.2 MST audio support later */
1762 if (codec_has_acomp(codec
))
1763 snd_hdac_sync_audio_rate(&codec
->core
, pin_nid
, runtime
->rate
);
1765 non_pcm
= check_non_pcm_per_cvt(codec
, cvt_nid
);
1766 mutex_lock(&per_pin
->lock
);
1767 per_pin
->channels
= substream
->runtime
->channels
;
1768 per_pin
->setup
= true;
1770 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1771 mutex_unlock(&per_pin
->lock
);
1772 if (spec
->dyn_pin_out
) {
1773 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
1774 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1775 snd_hda_codec_write(codec
, pin_nid
, 0,
1776 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1780 err
= spec
->ops
.setup_stream(codec
, cvt_nid
, pin_nid
,
1781 stream_tag
, format
);
1782 mutex_unlock(&spec
->pcm_lock
);
1786 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1787 struct hda_codec
*codec
,
1788 struct snd_pcm_substream
*substream
)
1790 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1794 static int hdmi_pcm_close(struct hda_pcm_stream
*hinfo
,
1795 struct hda_codec
*codec
,
1796 struct snd_pcm_substream
*substream
)
1798 struct hdmi_spec
*spec
= codec
->spec
;
1799 int cvt_idx
, pin_idx
, pcm_idx
;
1800 struct hdmi_spec_per_cvt
*per_cvt
;
1801 struct hdmi_spec_per_pin
*per_pin
;
1805 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1806 if (snd_BUG_ON(pcm_idx
< 0))
1808 cvt_idx
= cvt_nid_to_cvt_index(codec
, hinfo
->nid
);
1809 if (snd_BUG_ON(cvt_idx
< 0))
1811 per_cvt
= get_cvt(spec
, cvt_idx
);
1813 snd_BUG_ON(!per_cvt
->assigned
);
1814 per_cvt
->assigned
= 0;
1817 mutex_lock(&spec
->pcm_lock
);
1818 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
1819 clear_bit(pcm_idx
, &spec
->pcm_in_use
);
1820 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1821 if (spec
->dyn_pcm_assign
&& pin_idx
< 0) {
1822 mutex_unlock(&spec
->pcm_lock
);
1826 if (snd_BUG_ON(pin_idx
< 0)) {
1827 mutex_unlock(&spec
->pcm_lock
);
1830 per_pin
= get_pin(spec
, pin_idx
);
1832 if (spec
->dyn_pin_out
) {
1833 pinctl
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
1834 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1835 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
1836 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1840 mutex_lock(&per_pin
->lock
);
1841 per_pin
->chmap_set
= false;
1842 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1844 per_pin
->setup
= false;
1845 per_pin
->channels
= 0;
1846 mutex_unlock(&per_pin
->lock
);
1847 mutex_unlock(&spec
->pcm_lock
);
1853 static const struct hda_pcm_ops generic_ops
= {
1854 .open
= hdmi_pcm_open
,
1855 .close
= hdmi_pcm_close
,
1856 .prepare
= generic_hdmi_playback_pcm_prepare
,
1857 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
1860 static int hdmi_get_spk_alloc(struct hdac_device
*hdac
, int pcm_idx
)
1862 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
1863 struct hdmi_spec
*spec
= codec
->spec
;
1864 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
1869 return per_pin
->sink_eld
.info
.spk_alloc
;
1872 static void hdmi_get_chmap(struct hdac_device
*hdac
, int pcm_idx
,
1873 unsigned char *chmap
)
1875 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
1876 struct hdmi_spec
*spec
= codec
->spec
;
1877 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
1879 /* chmap is already set to 0 in caller */
1883 memcpy(chmap
, per_pin
->chmap
, ARRAY_SIZE(per_pin
->chmap
));
1886 static void hdmi_set_chmap(struct hdac_device
*hdac
, int pcm_idx
,
1887 unsigned char *chmap
, int prepared
)
1889 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
1890 struct hdmi_spec
*spec
= codec
->spec
;
1891 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
1895 mutex_lock(&per_pin
->lock
);
1896 per_pin
->chmap_set
= true;
1897 memcpy(per_pin
->chmap
, chmap
, ARRAY_SIZE(per_pin
->chmap
));
1899 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
1900 mutex_unlock(&per_pin
->lock
);
1903 static bool is_hdmi_pcm_attached(struct hdac_device
*hdac
, int pcm_idx
)
1905 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
1906 struct hdmi_spec
*spec
= codec
->spec
;
1907 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
1909 return per_pin
? true:false;
1912 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
1914 struct hdmi_spec
*spec
= codec
->spec
;
1917 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1918 struct hda_pcm
*info
;
1919 struct hda_pcm_stream
*pstr
;
1921 info
= snd_hda_codec_pcm_new(codec
, "HDMI %d", pin_idx
);
1925 spec
->pcm_rec
[pin_idx
].pcm
= info
;
1927 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
1928 info
->own_chmap
= true;
1930 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
1931 pstr
->substreams
= 1;
1932 pstr
->ops
= generic_ops
;
1933 /* other pstr fields are set in open */
1939 static void free_hdmi_jack_priv(struct snd_jack
*jack
)
1941 struct hdmi_pcm
*pcm
= jack
->private_data
;
1946 static int add_hdmi_jack_kctl(struct hda_codec
*codec
,
1947 struct hdmi_spec
*spec
,
1951 struct snd_jack
*jack
;
1954 err
= snd_jack_new(codec
->card
, name
, SND_JACK_AVOUT
, &jack
,
1959 spec
->pcm_rec
[pcm_idx
].jack
= jack
;
1960 jack
->private_data
= &spec
->pcm_rec
[pcm_idx
];
1961 jack
->private_free
= free_hdmi_jack_priv
;
1965 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pcm_idx
)
1967 char hdmi_str
[32] = "HDMI/DP";
1968 struct hdmi_spec
*spec
= codec
->spec
;
1969 struct hdmi_spec_per_pin
*per_pin
;
1970 struct hda_jack_tbl
*jack
;
1971 int pcmdev
= get_pcm_rec(spec
, pcm_idx
)->device
;
1976 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
1978 if (spec
->dyn_pcm_assign
)
1979 return add_hdmi_jack_kctl(codec
, spec
, pcm_idx
, hdmi_str
);
1981 /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
1982 /* if !dyn_pcm_assign, it must be non-MST mode.
1983 * This means pcms and pins are statically mapped.
1984 * And pcm_idx is pin_idx.
1986 per_pin
= get_pin(spec
, pcm_idx
);
1987 phantom_jack
= !is_jack_detectable(codec
, per_pin
->pin_nid
);
1989 strncat(hdmi_str
, " Phantom",
1990 sizeof(hdmi_str
) - strlen(hdmi_str
) - 1);
1991 ret
= snd_hda_jack_add_kctl(codec
, per_pin
->pin_nid
, hdmi_str
,
1995 jack
= snd_hda_jack_tbl_get(codec
, per_pin
->pin_nid
);
1998 /* assign jack->jack to pcm_rec[].jack to
1999 * align with dyn_pcm_assign mode
2001 spec
->pcm_rec
[pcm_idx
].jack
= jack
->jack
;
2005 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
2007 struct hdmi_spec
*spec
= codec
->spec
;
2009 int pin_idx
, pcm_idx
;
2012 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2013 err
= generic_hdmi_build_jack(codec
, pcm_idx
);
2017 /* create the spdif for each pcm
2018 * pin will be bound when monitor is connected
2020 if (spec
->dyn_pcm_assign
)
2021 err
= snd_hda_create_dig_out_ctls(codec
,
2022 0, spec
->cvt_nids
[0],
2025 struct hdmi_spec_per_pin
*per_pin
=
2026 get_pin(spec
, pcm_idx
);
2027 err
= snd_hda_create_dig_out_ctls(codec
,
2029 per_pin
->mux_nids
[0],
2034 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
2036 /* add control for ELD Bytes */
2037 err
= hdmi_create_eld_ctl(codec
, pcm_idx
,
2038 get_pcm_rec(spec
, pcm_idx
)->device
);
2043 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2044 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2046 hdmi_present_sense(per_pin
, 0);
2049 /* add channel maps */
2050 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2051 struct hda_pcm
*pcm
;
2053 pcm
= get_pcm_rec(spec
, pcm_idx
);
2054 if (!pcm
|| !pcm
->pcm
)
2056 err
= snd_hdac_add_chmap_ctls(pcm
->pcm
, pcm_idx
, &spec
->chmap
);
2064 static int generic_hdmi_init_per_pins(struct hda_codec
*codec
)
2066 struct hdmi_spec
*spec
= codec
->spec
;
2069 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2070 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2072 per_pin
->codec
= codec
;
2073 mutex_init(&per_pin
->lock
);
2074 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
2075 eld_proc_new(per_pin
, pin_idx
);
2080 static int generic_hdmi_init(struct hda_codec
*codec
)
2082 struct hdmi_spec
*spec
= codec
->spec
;
2085 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2086 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2087 hda_nid_t pin_nid
= per_pin
->pin_nid
;
2089 hdmi_init_pin(codec
, pin_nid
);
2090 if (!codec_has_acomp(codec
))
2091 snd_hda_jack_detect_enable_callback(codec
, pin_nid
,
2092 codec
->jackpoll_interval
> 0 ?
2093 jack_callback
: NULL
);
2098 static void hdmi_array_init(struct hdmi_spec
*spec
, int nums
)
2100 snd_array_init(&spec
->pins
, sizeof(struct hdmi_spec_per_pin
), nums
);
2101 snd_array_init(&spec
->cvts
, sizeof(struct hdmi_spec_per_cvt
), nums
);
2104 static void hdmi_array_free(struct hdmi_spec
*spec
)
2106 snd_array_free(&spec
->pins
);
2107 snd_array_free(&spec
->cvts
);
2110 static void generic_spec_free(struct hda_codec
*codec
)
2112 struct hdmi_spec
*spec
= codec
->spec
;
2115 if (spec
->i915_bound
)
2116 snd_hdac_i915_exit(&codec
->bus
->core
);
2117 hdmi_array_free(spec
);
2121 codec
->dp_mst
= false;
2124 static void generic_hdmi_free(struct hda_codec
*codec
)
2126 struct hdmi_spec
*spec
= codec
->spec
;
2127 int pin_idx
, pcm_idx
;
2129 if (codec_has_acomp(codec
))
2130 snd_hdac_i915_register_notifier(NULL
);
2132 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2133 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2134 cancel_delayed_work_sync(&per_pin
->work
);
2135 eld_proc_free(per_pin
);
2138 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2139 if (spec
->pcm_rec
[pcm_idx
].jack
== NULL
)
2141 if (spec
->dyn_pcm_assign
)
2142 snd_device_free(codec
->card
,
2143 spec
->pcm_rec
[pcm_idx
].jack
);
2145 spec
->pcm_rec
[pcm_idx
].jack
= NULL
;
2148 generic_spec_free(codec
);
2152 static int generic_hdmi_resume(struct hda_codec
*codec
)
2154 struct hdmi_spec
*spec
= codec
->spec
;
2157 codec
->patch_ops
.init(codec
);
2158 regcache_sync(codec
->core
.regmap
);
2160 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2161 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2162 hdmi_present_sense(per_pin
, 1);
2168 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
2169 .init
= generic_hdmi_init
,
2170 .free
= generic_hdmi_free
,
2171 .build_pcms
= generic_hdmi_build_pcms
,
2172 .build_controls
= generic_hdmi_build_controls
,
2173 .unsol_event
= hdmi_unsol_event
,
2175 .resume
= generic_hdmi_resume
,
2179 static const struct hdmi_ops generic_standard_hdmi_ops
= {
2180 .pin_get_eld
= snd_hdmi_get_eld
,
2181 .pin_setup_infoframe
= hdmi_pin_setup_infoframe
,
2182 .pin_hbr_setup
= hdmi_pin_hbr_setup
,
2183 .setup_stream
= hdmi_setup_stream
,
2186 /* allocate codec->spec and assign/initialize generic parser ops */
2187 static int alloc_generic_hdmi(struct hda_codec
*codec
)
2189 struct hdmi_spec
*spec
;
2191 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2195 spec
->ops
= generic_standard_hdmi_ops
;
2196 mutex_init(&spec
->pcm_lock
);
2197 snd_hdac_register_chmap_ops(&codec
->core
, &spec
->chmap
);
2199 spec
->chmap
.ops
.get_chmap
= hdmi_get_chmap
;
2200 spec
->chmap
.ops
.set_chmap
= hdmi_set_chmap
;
2201 spec
->chmap
.ops
.is_pcm_attached
= is_hdmi_pcm_attached
;
2202 spec
->chmap
.ops
.get_spk_alloc
= hdmi_get_spk_alloc
,
2205 hdmi_array_init(spec
, 4);
2207 codec
->patch_ops
= generic_hdmi_patch_ops
;
2212 /* generic HDMI parser */
2213 static int patch_generic_hdmi(struct hda_codec
*codec
)
2217 err
= alloc_generic_hdmi(codec
);
2221 err
= hdmi_parse_codec(codec
);
2223 generic_spec_free(codec
);
2227 generic_hdmi_init_per_pins(codec
);
2232 * Intel codec parsers and helpers
2235 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
2238 struct hdmi_spec
*spec
= codec
->spec
;
2242 nconns
= snd_hda_get_connections(codec
, nid
, conns
, ARRAY_SIZE(conns
));
2243 if (nconns
== spec
->num_cvts
&&
2244 !memcmp(conns
, spec
->cvt_nids
, spec
->num_cvts
* sizeof(hda_nid_t
)))
2247 /* override pins connection list */
2248 codec_dbg(codec
, "hdmi: haswell: override pin connection 0x%x\n", nid
);
2249 snd_hda_override_conn_list(codec
, nid
, spec
->num_cvts
, spec
->cvt_nids
);
2252 #define INTEL_VENDOR_NID 0x08
2253 #define INTEL_GET_VENDOR_VERB 0xf81
2254 #define INTEL_SET_VENDOR_VERB 0x781
2255 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2256 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2258 static void intel_haswell_enable_all_pins(struct hda_codec
*codec
,
2261 unsigned int vendor_param
;
2263 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2264 INTEL_GET_VENDOR_VERB
, 0);
2265 if (vendor_param
== -1 || vendor_param
& INTEL_EN_ALL_PIN_CVTS
)
2268 vendor_param
|= INTEL_EN_ALL_PIN_CVTS
;
2269 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2270 INTEL_SET_VENDOR_VERB
, vendor_param
);
2271 if (vendor_param
== -1)
2275 snd_hda_codec_update_widgets(codec
);
2278 static void intel_haswell_fixup_enable_dp12(struct hda_codec
*codec
)
2280 unsigned int vendor_param
;
2282 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2283 INTEL_GET_VENDOR_VERB
, 0);
2284 if (vendor_param
== -1 || vendor_param
& INTEL_EN_DP12
)
2287 /* enable DP1.2 mode */
2288 vendor_param
|= INTEL_EN_DP12
;
2289 snd_hdac_regmap_add_vendor_verb(&codec
->core
, INTEL_SET_VENDOR_VERB
);
2290 snd_hda_codec_write_cache(codec
, INTEL_VENDOR_NID
, 0,
2291 INTEL_SET_VENDOR_VERB
, vendor_param
);
2294 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2295 * Otherwise you may get severe h/w communication errors.
2297 static void haswell_set_power_state(struct hda_codec
*codec
, hda_nid_t fg
,
2298 unsigned int power_state
)
2300 if (power_state
== AC_PWRST_D0
) {
2301 intel_haswell_enable_all_pins(codec
, false);
2302 intel_haswell_fixup_enable_dp12(codec
);
2305 snd_hda_codec_read(codec
, fg
, 0, AC_VERB_SET_POWER_STATE
, power_state
);
2306 snd_hda_codec_set_power_to_all(codec
, fg
, power_state
);
2309 static void intel_pin_eld_notify(void *audio_ptr
, int port
)
2311 struct hda_codec
*codec
= audio_ptr
;
2314 /* we assume only from port-B to port-D */
2315 if (port
< 1 || port
> 3)
2318 switch (codec
->core
.vendor_id
) {
2319 case 0x80860054: /* ILK */
2320 case 0x80862804: /* ILK */
2321 case 0x80862882: /* VLV */
2322 pin_nid
= port
+ 0x03;
2325 pin_nid
= port
+ 0x04;
2329 /* skip notification during system suspend (but not in runtime PM);
2330 * the state will be updated at resume
2332 if (snd_power_get_state(codec
->card
) != SNDRV_CTL_POWER_D0
)
2334 /* ditto during suspend/resume process itself */
2335 if (atomic_read(&(codec
)->core
.in_pm
))
2338 snd_hdac_i915_set_bclk(&codec
->bus
->core
);
2339 check_presence_and_report(codec
, pin_nid
);
2342 /* register i915 component pin_eld_notify callback */
2343 static void register_i915_notifier(struct hda_codec
*codec
)
2345 struct hdmi_spec
*spec
= codec
->spec
;
2347 spec
->use_acomp_notifier
= true;
2348 spec
->i915_audio_ops
.audio_ptr
= codec
;
2349 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2350 * will call pin_eld_notify with using audio_ptr pointer
2351 * We need make sure audio_ptr is really setup
2354 spec
->i915_audio_ops
.pin_eld_notify
= intel_pin_eld_notify
;
2355 snd_hdac_i915_register_notifier(&spec
->i915_audio_ops
);
2358 /* setup_stream ops override for HSW+ */
2359 static int i915_hsw_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
2360 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
2362 haswell_verify_D0(codec
, cvt_nid
, pin_nid
);
2363 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
2366 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2367 static void i915_pin_cvt_fixup(struct hda_codec
*codec
,
2368 struct hdmi_spec_per_pin
*per_pin
,
2372 intel_verify_pin_cvt_connect(codec
, per_pin
);
2373 intel_not_share_assigned_cvt(codec
, per_pin
->pin_nid
,
2376 intel_not_share_assigned_cvt_nid(codec
, 0, cvt_nid
);
2380 /* Intel Haswell and onwards; audio component with eld notifier */
2381 static int patch_i915_hsw_hdmi(struct hda_codec
*codec
)
2383 struct hdmi_spec
*spec
;
2386 /* HSW+ requires i915 binding */
2387 if (!codec
->bus
->core
.audio_component
) {
2388 codec_info(codec
, "No i915 binding for Intel HDMI/DP codec\n");
2392 err
= alloc_generic_hdmi(codec
);
2397 intel_haswell_enable_all_pins(codec
, true);
2398 intel_haswell_fixup_enable_dp12(codec
);
2400 /* For Haswell/Broadwell, the controller is also in the power well and
2401 * can cover the codec power request, and so need not set this flag.
2403 if (!is_haswell(codec
) && !is_broadwell(codec
))
2404 codec
->core
.link_power_control
= 1;
2406 codec
->patch_ops
.set_power_state
= haswell_set_power_state
;
2407 codec
->dp_mst
= true;
2408 codec
->depop_delay
= 0;
2409 codec
->auto_runtime_pm
= 1;
2411 spec
->ops
.setup_stream
= i915_hsw_setup_stream
;
2412 spec
->ops
.pin_cvt_fixup
= i915_pin_cvt_fixup
;
2414 err
= hdmi_parse_codec(codec
);
2416 generic_spec_free(codec
);
2420 generic_hdmi_init_per_pins(codec
);
2421 register_i915_notifier(codec
);
2425 /* Intel Baytrail and Braswell; with eld notifier */
2426 static int patch_i915_byt_hdmi(struct hda_codec
*codec
)
2428 struct hdmi_spec
*spec
;
2431 /* requires i915 binding */
2432 if (!codec
->bus
->core
.audio_component
) {
2433 codec_info(codec
, "No i915 binding for Intel HDMI/DP codec\n");
2437 err
= alloc_generic_hdmi(codec
);
2442 /* For Valleyview/Cherryview, only the display codec is in the display
2443 * power well and can use link_power ops to request/release the power.
2445 codec
->core
.link_power_control
= 1;
2447 codec
->depop_delay
= 0;
2448 codec
->auto_runtime_pm
= 1;
2450 spec
->ops
.pin_cvt_fixup
= i915_pin_cvt_fixup
;
2452 err
= hdmi_parse_codec(codec
);
2454 generic_spec_free(codec
);
2458 generic_hdmi_init_per_pins(codec
);
2459 register_i915_notifier(codec
);
2463 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2464 static int patch_i915_cpt_hdmi(struct hda_codec
*codec
)
2466 struct hdmi_spec
*spec
;
2469 /* no i915 component should have been bound before this */
2470 if (WARN_ON(codec
->bus
->core
.audio_component
))
2473 err
= alloc_generic_hdmi(codec
);
2478 /* Try to bind with i915 now */
2479 err
= snd_hdac_i915_init(&codec
->bus
->core
);
2482 spec
->i915_bound
= true;
2484 err
= hdmi_parse_codec(codec
);
2488 generic_hdmi_init_per_pins(codec
);
2489 register_i915_notifier(codec
);
2493 generic_spec_free(codec
);
2498 * Shared non-generic implementations
2501 static int simple_playback_build_pcms(struct hda_codec
*codec
)
2503 struct hdmi_spec
*spec
= codec
->spec
;
2504 struct hda_pcm
*info
;
2506 struct hda_pcm_stream
*pstr
;
2507 struct hdmi_spec_per_cvt
*per_cvt
;
2509 per_cvt
= get_cvt(spec
, 0);
2510 chans
= get_wcaps(codec
, per_cvt
->cvt_nid
);
2511 chans
= get_wcaps_channels(chans
);
2513 info
= snd_hda_codec_pcm_new(codec
, "HDMI 0");
2516 spec
->pcm_rec
[0].pcm
= info
;
2517 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2518 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2519 *pstr
= spec
->pcm_playback
;
2520 pstr
->nid
= per_cvt
->cvt_nid
;
2521 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
2522 pstr
->channels_max
= chans
;
2527 /* unsolicited event for jack sensing */
2528 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
2531 snd_hda_jack_set_dirty_all(codec
);
2532 snd_hda_jack_report_sync(codec
);
2535 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2536 * as long as spec->pins[] is set correctly
2538 #define simple_hdmi_build_jack generic_hdmi_build_jack
2540 static int simple_playback_build_controls(struct hda_codec
*codec
)
2542 struct hdmi_spec
*spec
= codec
->spec
;
2543 struct hdmi_spec_per_cvt
*per_cvt
;
2546 per_cvt
= get_cvt(spec
, 0);
2547 err
= snd_hda_create_dig_out_ctls(codec
, per_cvt
->cvt_nid
,
2552 return simple_hdmi_build_jack(codec
, 0);
2555 static int simple_playback_init(struct hda_codec
*codec
)
2557 struct hdmi_spec
*spec
= codec
->spec
;
2558 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, 0);
2559 hda_nid_t pin
= per_pin
->pin_nid
;
2561 snd_hda_codec_write(codec
, pin
, 0,
2562 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
2563 /* some codecs require to unmute the pin */
2564 if (get_wcaps(codec
, pin
) & AC_WCAP_OUT_AMP
)
2565 snd_hda_codec_write(codec
, pin
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
2567 snd_hda_jack_detect_enable(codec
, pin
);
2571 static void simple_playback_free(struct hda_codec
*codec
)
2573 struct hdmi_spec
*spec
= codec
->spec
;
2575 hdmi_array_free(spec
);
2580 * Nvidia specific implementations
2583 #define Nv_VERB_SET_Channel_Allocation 0xF79
2584 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2585 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2586 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2588 #define nvhdmi_master_con_nid_7x 0x04
2589 #define nvhdmi_master_pin_nid_7x 0x05
2591 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
2592 /*front, rear, clfe, rear_surr */
2596 static const struct hda_verb nvhdmi_basic_init_7x_2ch
[] = {
2597 /* set audio protect on */
2598 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2599 /* enable digital output on pin widget */
2600 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2604 static const struct hda_verb nvhdmi_basic_init_7x_8ch
[] = {
2605 /* set audio protect on */
2606 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2607 /* enable digital output on pin widget */
2608 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2609 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2610 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2611 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2612 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2616 #ifdef LIMITED_RATE_FMT_SUPPORT
2617 /* support only the safe format and rate */
2618 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2619 #define SUPPORTED_MAXBPS 16
2620 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2622 /* support all rates and formats */
2623 #define SUPPORTED_RATES \
2624 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2625 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2626 SNDRV_PCM_RATE_192000)
2627 #define SUPPORTED_MAXBPS 24
2628 #define SUPPORTED_FORMATS \
2629 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2632 static int nvhdmi_7x_init_2ch(struct hda_codec
*codec
)
2634 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_2ch
);
2638 static int nvhdmi_7x_init_8ch(struct hda_codec
*codec
)
2640 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_8ch
);
2644 static unsigned int channels_2_6_8
[] = {
2648 static unsigned int channels_2_8
[] = {
2652 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
2653 .count
= ARRAY_SIZE(channels_2_6_8
),
2654 .list
= channels_2_6_8
,
2658 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
2659 .count
= ARRAY_SIZE(channels_2_8
),
2660 .list
= channels_2_8
,
2664 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
2665 struct hda_codec
*codec
,
2666 struct snd_pcm_substream
*substream
)
2668 struct hdmi_spec
*spec
= codec
->spec
;
2669 struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
2671 switch (codec
->preset
->vendor_id
) {
2676 hw_constraints_channels
= &hw_constraints_2_8_channels
;
2679 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
2685 if (hw_constraints_channels
!= NULL
) {
2686 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
2687 SNDRV_PCM_HW_PARAM_CHANNELS
,
2688 hw_constraints_channels
);
2690 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
2691 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
2694 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
2697 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
2698 struct hda_codec
*codec
,
2699 struct snd_pcm_substream
*substream
)
2701 struct hdmi_spec
*spec
= codec
->spec
;
2702 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2705 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2706 struct hda_codec
*codec
,
2707 unsigned int stream_tag
,
2708 unsigned int format
,
2709 struct snd_pcm_substream
*substream
)
2711 struct hdmi_spec
*spec
= codec
->spec
;
2712 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
2713 stream_tag
, format
, substream
);
2716 static const struct hda_pcm_stream simple_pcm_playback
= {
2721 .open
= simple_playback_pcm_open
,
2722 .close
= simple_playback_pcm_close
,
2723 .prepare
= simple_playback_pcm_prepare
2727 static const struct hda_codec_ops simple_hdmi_patch_ops
= {
2728 .build_controls
= simple_playback_build_controls
,
2729 .build_pcms
= simple_playback_build_pcms
,
2730 .init
= simple_playback_init
,
2731 .free
= simple_playback_free
,
2732 .unsol_event
= simple_hdmi_unsol_event
,
2735 static int patch_simple_hdmi(struct hda_codec
*codec
,
2736 hda_nid_t cvt_nid
, hda_nid_t pin_nid
)
2738 struct hdmi_spec
*spec
;
2739 struct hdmi_spec_per_cvt
*per_cvt
;
2740 struct hdmi_spec_per_pin
*per_pin
;
2742 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2747 hdmi_array_init(spec
, 1);
2749 spec
->multiout
.num_dacs
= 0; /* no analog */
2750 spec
->multiout
.max_channels
= 2;
2751 spec
->multiout
.dig_out_nid
= cvt_nid
;
2754 per_pin
= snd_array_new(&spec
->pins
);
2755 per_cvt
= snd_array_new(&spec
->cvts
);
2756 if (!per_pin
|| !per_cvt
) {
2757 simple_playback_free(codec
);
2760 per_cvt
->cvt_nid
= cvt_nid
;
2761 per_pin
->pin_nid
= pin_nid
;
2762 spec
->pcm_playback
= simple_pcm_playback
;
2764 codec
->patch_ops
= simple_hdmi_patch_ops
;
2769 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
2772 unsigned int chanmask
;
2773 int chan
= channels
? (channels
- 1) : 1;
2792 /* Set the audio infoframe channel allocation and checksum fields. The
2793 * channel count is computed implicitly by the hardware. */
2794 snd_hda_codec_write(codec
, 0x1, 0,
2795 Nv_VERB_SET_Channel_Allocation
, chanmask
);
2797 snd_hda_codec_write(codec
, 0x1, 0,
2798 Nv_VERB_SET_Info_Frame_Checksum
,
2799 (0x71 - chan
- chanmask
));
2802 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
2803 struct hda_codec
*codec
,
2804 struct snd_pcm_substream
*substream
)
2806 struct hdmi_spec
*spec
= codec
->spec
;
2809 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
2810 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
2811 for (i
= 0; i
< 4; i
++) {
2812 /* set the stream id */
2813 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2814 AC_VERB_SET_CHANNEL_STREAMID
, 0);
2815 /* set the stream format */
2816 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2817 AC_VERB_SET_STREAM_FORMAT
, 0);
2820 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2821 * streams are disabled. */
2822 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2824 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2827 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2828 struct hda_codec
*codec
,
2829 unsigned int stream_tag
,
2830 unsigned int format
,
2831 struct snd_pcm_substream
*substream
)
2834 unsigned int dataDCC2
, channel_id
;
2836 struct hdmi_spec
*spec
= codec
->spec
;
2837 struct hda_spdif_out
*spdif
;
2838 struct hdmi_spec_per_cvt
*per_cvt
;
2840 mutex_lock(&codec
->spdif_mutex
);
2841 per_cvt
= get_cvt(spec
, 0);
2842 spdif
= snd_hda_spdif_out_of_nid(codec
, per_cvt
->cvt_nid
);
2844 chs
= substream
->runtime
->channels
;
2848 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2849 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
2850 snd_hda_codec_write(codec
,
2851 nvhdmi_master_con_nid_7x
,
2853 AC_VERB_SET_DIGI_CONVERT_1
,
2854 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2856 /* set the stream id */
2857 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2858 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
2860 /* set the stream format */
2861 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2862 AC_VERB_SET_STREAM_FORMAT
, format
);
2864 /* turn on again (if needed) */
2865 /* enable and set the channel status audio/data flag */
2866 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2867 snd_hda_codec_write(codec
,
2868 nvhdmi_master_con_nid_7x
,
2870 AC_VERB_SET_DIGI_CONVERT_1
,
2871 spdif
->ctls
& 0xff);
2872 snd_hda_codec_write(codec
,
2873 nvhdmi_master_con_nid_7x
,
2875 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2878 for (i
= 0; i
< 4; i
++) {
2884 /* turn off SPDIF once;
2885 *otherwise the IEC958 bits won't be updated
2887 if (codec
->spdif_status_reset
&&
2888 (spdif
->ctls
& AC_DIG1_ENABLE
))
2889 snd_hda_codec_write(codec
,
2890 nvhdmi_con_nids_7x
[i
],
2892 AC_VERB_SET_DIGI_CONVERT_1
,
2893 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2894 /* set the stream id */
2895 snd_hda_codec_write(codec
,
2896 nvhdmi_con_nids_7x
[i
],
2898 AC_VERB_SET_CHANNEL_STREAMID
,
2899 (stream_tag
<< 4) | channel_id
);
2900 /* set the stream format */
2901 snd_hda_codec_write(codec
,
2902 nvhdmi_con_nids_7x
[i
],
2904 AC_VERB_SET_STREAM_FORMAT
,
2906 /* turn on again (if needed) */
2907 /* enable and set the channel status audio/data flag */
2908 if (codec
->spdif_status_reset
&&
2909 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2910 snd_hda_codec_write(codec
,
2911 nvhdmi_con_nids_7x
[i
],
2913 AC_VERB_SET_DIGI_CONVERT_1
,
2914 spdif
->ctls
& 0xff);
2915 snd_hda_codec_write(codec
,
2916 nvhdmi_con_nids_7x
[i
],
2918 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2922 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
2924 mutex_unlock(&codec
->spdif_mutex
);
2928 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
2932 .nid
= nvhdmi_master_con_nid_7x
,
2933 .rates
= SUPPORTED_RATES
,
2934 .maxbps
= SUPPORTED_MAXBPS
,
2935 .formats
= SUPPORTED_FORMATS
,
2937 .open
= simple_playback_pcm_open
,
2938 .close
= nvhdmi_8ch_7x_pcm_close
,
2939 .prepare
= nvhdmi_8ch_7x_pcm_prepare
2943 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
2945 struct hdmi_spec
*spec
;
2946 int err
= patch_simple_hdmi(codec
, nvhdmi_master_con_nid_7x
,
2947 nvhdmi_master_pin_nid_7x
);
2951 codec
->patch_ops
.init
= nvhdmi_7x_init_2ch
;
2952 /* override the PCM rates, etc, as the codec doesn't give full list */
2954 spec
->pcm_playback
.rates
= SUPPORTED_RATES
;
2955 spec
->pcm_playback
.maxbps
= SUPPORTED_MAXBPS
;
2956 spec
->pcm_playback
.formats
= SUPPORTED_FORMATS
;
2960 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec
*codec
)
2962 struct hdmi_spec
*spec
= codec
->spec
;
2963 int err
= simple_playback_build_pcms(codec
);
2965 struct hda_pcm
*info
= get_pcm_rec(spec
, 0);
2966 info
->own_chmap
= true;
2971 static int nvhdmi_7x_8ch_build_controls(struct hda_codec
*codec
)
2973 struct hdmi_spec
*spec
= codec
->spec
;
2974 struct hda_pcm
*info
;
2975 struct snd_pcm_chmap
*chmap
;
2978 err
= simple_playback_build_controls(codec
);
2982 /* add channel maps */
2983 info
= get_pcm_rec(spec
, 0);
2984 err
= snd_pcm_add_chmap_ctls(info
->pcm
,
2985 SNDRV_PCM_STREAM_PLAYBACK
,
2986 snd_pcm_alt_chmaps
, 8, 0, &chmap
);
2989 switch (codec
->preset
->vendor_id
) {
2994 chmap
->channel_mask
= (1U << 2) | (1U << 8);
2997 chmap
->channel_mask
= (1U << 2) | (1U << 6) | (1U << 8);
3002 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
3004 struct hdmi_spec
*spec
;
3005 int err
= patch_nvhdmi_2ch(codec
);
3009 spec
->multiout
.max_channels
= 8;
3010 spec
->pcm_playback
= nvhdmi_pcm_playback_8ch_7x
;
3011 codec
->patch_ops
.init
= nvhdmi_7x_init_8ch
;
3012 codec
->patch_ops
.build_pcms
= nvhdmi_7x_8ch_build_pcms
;
3013 codec
->patch_ops
.build_controls
= nvhdmi_7x_8ch_build_controls
;
3015 /* Initialize the audio infoframe channel mask and checksum to something
3017 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
3023 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3027 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap
*chmap
,
3028 struct hdac_cea_channel_speaker_allocation
*cap
, int channels
)
3030 if (cap
->ca_index
== 0x00 && channels
== 2)
3031 return SNDRV_CTL_TLVT_CHMAP_FIXED
;
3033 /* If the speaker allocation matches the channel count, it is OK. */
3034 if (cap
->channels
!= channels
)
3037 /* all channels are remappable freely */
3038 return SNDRV_CTL_TLVT_CHMAP_VAR
;
3041 static int nvhdmi_chmap_validate(struct hdac_chmap
*chmap
,
3042 int ca
, int chs
, unsigned char *map
)
3044 if (ca
== 0x00 && (map
[0] != SNDRV_CHMAP_FL
|| map
[1] != SNDRV_CHMAP_FR
))
3050 static int patch_nvhdmi(struct hda_codec
*codec
)
3052 struct hdmi_spec
*spec
;
3055 err
= patch_generic_hdmi(codec
);
3060 spec
->dyn_pin_out
= true;
3062 spec
->chmap
.ops
.chmap_cea_alloc_validate_get_type
=
3063 nvhdmi_chmap_cea_alloc_validate_get_type
;
3064 spec
->chmap
.ops
.chmap_validate
= nvhdmi_chmap_validate
;
3070 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3071 * accessed using vendor-defined verbs. These registers can be used for
3072 * interoperability between the HDA and HDMI drivers.
3075 /* Audio Function Group node */
3076 #define NVIDIA_AFG_NID 0x01
3079 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3080 * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3081 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3082 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3083 * additional bit (at position 30) to signal the validity of the format.
3085 * | 31 | 30 | 29 16 | 15 0 |
3086 * +---------+-------+--------+--------+
3087 * | TRIGGER | VALID | UNUSED | FORMAT |
3088 * +-----------------------------------|
3090 * Note that for the trigger bit to take effect it needs to change value
3091 * (i.e. it needs to be toggled).
3093 #define NVIDIA_GET_SCRATCH0 0xfa6
3094 #define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3095 #define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3096 #define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3097 #define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3098 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3099 #define NVIDIA_SCRATCH_VALID (1 << 6)
3101 #define NVIDIA_GET_SCRATCH1 0xfab
3102 #define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3103 #define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3104 #define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3105 #define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3108 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3109 * the format is invalidated so that the HDMI codec can be disabled.
3111 static void tegra_hdmi_set_format(struct hda_codec
*codec
, unsigned int format
)
3115 /* bits [31:30] contain the trigger and valid bits */
3116 value
= snd_hda_codec_read(codec
, NVIDIA_AFG_NID
, 0,
3117 NVIDIA_GET_SCRATCH0
, 0);
3118 value
= (value
>> 24) & 0xff;
3120 /* bits [15:0] are used to store the HDA format */
3121 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3122 NVIDIA_SET_SCRATCH0_BYTE0
,
3123 (format
>> 0) & 0xff);
3124 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3125 NVIDIA_SET_SCRATCH0_BYTE1
,
3126 (format
>> 8) & 0xff);
3128 /* bits [16:24] are unused */
3129 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3130 NVIDIA_SET_SCRATCH0_BYTE2
, 0);
3133 * Bit 30 signals that the data is valid and hence that HDMI audio can
3137 value
&= ~NVIDIA_SCRATCH_VALID
;
3139 value
|= NVIDIA_SCRATCH_VALID
;
3142 * Whenever the trigger bit is toggled, an interrupt is raised in the
3143 * HDMI codec. The HDMI driver will use that as trigger to update its
3146 value
^= NVIDIA_SCRATCH_TRIGGER
;
3148 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3149 NVIDIA_SET_SCRATCH0_BYTE3
, value
);
3152 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream
*hinfo
,
3153 struct hda_codec
*codec
,
3154 unsigned int stream_tag
,
3155 unsigned int format
,
3156 struct snd_pcm_substream
*substream
)
3160 err
= generic_hdmi_playback_pcm_prepare(hinfo
, codec
, stream_tag
,
3165 /* notify the HDMI codec of the format change */
3166 tegra_hdmi_set_format(codec
, format
);
3171 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
3172 struct hda_codec
*codec
,
3173 struct snd_pcm_substream
*substream
)
3175 /* invalidate the format in the HDMI codec */
3176 tegra_hdmi_set_format(codec
, 0);
3178 return generic_hdmi_playback_pcm_cleanup(hinfo
, codec
, substream
);
3181 static struct hda_pcm
*hda_find_pcm_by_type(struct hda_codec
*codec
, int type
)
3183 struct hdmi_spec
*spec
= codec
->spec
;
3186 for (i
= 0; i
< spec
->num_pins
; i
++) {
3187 struct hda_pcm
*pcm
= get_pcm_rec(spec
, i
);
3189 if (pcm
->pcm_type
== type
)
3196 static int tegra_hdmi_build_pcms(struct hda_codec
*codec
)
3198 struct hda_pcm_stream
*stream
;
3199 struct hda_pcm
*pcm
;
3202 err
= generic_hdmi_build_pcms(codec
);
3206 pcm
= hda_find_pcm_by_type(codec
, HDA_PCM_TYPE_HDMI
);
3211 * Override ->prepare() and ->cleanup() operations to notify the HDMI
3212 * codec about format changes.
3214 stream
= &pcm
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
3215 stream
->ops
.prepare
= tegra_hdmi_pcm_prepare
;
3216 stream
->ops
.cleanup
= tegra_hdmi_pcm_cleanup
;
3221 static int patch_tegra_hdmi(struct hda_codec
*codec
)
3225 err
= patch_generic_hdmi(codec
);
3229 codec
->patch_ops
.build_pcms
= tegra_hdmi_build_pcms
;
3235 * ATI/AMD-specific implementations
3238 #define is_amdhdmi_rev3_or_later(codec) \
3239 ((codec)->core.vendor_id == 0x1002aa01 && \
3240 ((codec)->core.revision_id & 0xff00) >= 0x0300)
3241 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3243 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3244 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3245 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
3246 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
3247 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
3248 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
3249 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
3250 #define ATI_VERB_SET_HBR_CONTROL 0x77c
3251 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
3252 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
3253 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
3254 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
3255 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3256 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3257 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3258 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3259 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3260 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3261 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
3262 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
3263 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3264 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3265 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3266 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3267 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3269 /* AMD specific HDA cvt verbs */
3270 #define ATI_VERB_SET_RAMP_RATE 0x770
3271 #define ATI_VERB_GET_RAMP_RATE 0xf70
3273 #define ATI_OUT_ENABLE 0x1
3275 #define ATI_MULTICHANNEL_MODE_PAIRED 0
3276 #define ATI_MULTICHANNEL_MODE_SINGLE 1
3278 #define ATI_HBR_CAPABLE 0x01
3279 #define ATI_HBR_ENABLE 0x10
3281 static int atihdmi_pin_get_eld(struct hda_codec
*codec
, hda_nid_t nid
,
3282 unsigned char *buf
, int *eld_size
)
3284 /* call hda_eld.c ATI/AMD-specific function */
3285 return snd_hdmi_get_eld_ati(codec
, nid
, buf
, eld_size
,
3286 is_amdhdmi_rev3_or_later(codec
));
3289 static void atihdmi_pin_setup_infoframe(struct hda_codec
*codec
, hda_nid_t pin_nid
, int ca
,
3290 int active_channels
, int conn_type
)
3292 snd_hda_codec_write(codec
, pin_nid
, 0, ATI_VERB_SET_CHANNEL_ALLOCATION
, ca
);
3295 static int atihdmi_paired_swap_fc_lfe(int pos
)
3298 * ATI/AMD have automatic FC/LFE swap built-in
3299 * when in pairwise mapping mode.
3303 /* see channel_allocations[].speakers[] */
3312 static int atihdmi_paired_chmap_validate(struct hdac_chmap
*chmap
,
3313 int ca
, int chs
, unsigned char *map
)
3315 struct hdac_cea_channel_speaker_allocation
*cap
;
3318 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3320 cap
= snd_hdac_get_ch_alloc_from_ca(ca
);
3321 for (i
= 0; i
< chs
; ++i
) {
3322 int mask
= snd_hdac_chmap_to_spk_mask(map
[i
]);
3324 bool companion_ok
= false;
3329 for (j
= 0 + i
% 2; j
< 8; j
+= 2) {
3330 int chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
);
3331 if (cap
->speakers
[chan_idx
] == mask
) {
3332 /* channel is in a supported position */
3335 if (i
% 2 == 0 && i
+ 1 < chs
) {
3336 /* even channel, check the odd companion */
3337 int comp_chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
+ 1);
3338 int comp_mask_req
= snd_hdac_chmap_to_spk_mask(map
[i
+1]);
3339 int comp_mask_act
= cap
->speakers
[comp_chan_idx
];
3341 if (comp_mask_req
== comp_mask_act
)
3342 companion_ok
= true;
3354 i
++; /* companion channel already checked */
3360 static int atihdmi_pin_set_slot_channel(struct hdac_device
*hdac
,
3361 hda_nid_t pin_nid
, int hdmi_slot
, int stream_channel
)
3363 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
3365 int ati_channel_setup
= 0;
3370 if (!has_amd_full_remap_support(codec
)) {
3371 hdmi_slot
= atihdmi_paired_swap_fc_lfe(hdmi_slot
);
3373 /* In case this is an odd slot but without stream channel, do not
3374 * disable the slot since the corresponding even slot could have a
3375 * channel. In case neither have a channel, the slot pair will be
3376 * disabled when this function is called for the even slot. */
3377 if (hdmi_slot
% 2 != 0 && stream_channel
== 0xf)
3380 hdmi_slot
-= hdmi_slot
% 2;
3382 if (stream_channel
!= 0xf)
3383 stream_channel
-= stream_channel
% 2;
3386 verb
= ATI_VERB_SET_MULTICHANNEL_01
+ hdmi_slot
/2 + (hdmi_slot
% 2) * 0x00e;
3388 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3390 if (stream_channel
!= 0xf)
3391 ati_channel_setup
= (stream_channel
<< 4) | ATI_OUT_ENABLE
;
3393 return snd_hda_codec_write(codec
, pin_nid
, 0, verb
, ati_channel_setup
);
3396 static int atihdmi_pin_get_slot_channel(struct hdac_device
*hdac
,
3397 hda_nid_t pin_nid
, int asp_slot
)
3399 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
3400 bool was_odd
= false;
3401 int ati_asp_slot
= asp_slot
;
3403 int ati_channel_setup
;
3408 if (!has_amd_full_remap_support(codec
)) {
3409 ati_asp_slot
= atihdmi_paired_swap_fc_lfe(asp_slot
);
3410 if (ati_asp_slot
% 2 != 0) {
3416 verb
= ATI_VERB_GET_MULTICHANNEL_01
+ ati_asp_slot
/2 + (ati_asp_slot
% 2) * 0x00e;
3418 ati_channel_setup
= snd_hda_codec_read(codec
, pin_nid
, 0, verb
, 0);
3420 if (!(ati_channel_setup
& ATI_OUT_ENABLE
))
3423 return ((ati_channel_setup
& 0xf0) >> 4) + !!was_odd
;
3426 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3427 struct hdac_chmap
*chmap
,
3428 struct hdac_cea_channel_speaker_allocation
*cap
,
3434 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3435 * we need to take that into account (a single channel may take 2
3436 * channel slots if we need to carry a silent channel next to it).
3437 * On Rev3+ AMD codecs this function is not used.
3441 /* We only produce even-numbered channel count TLVs */
3442 if ((channels
% 2) != 0)
3445 for (c
= 0; c
< 7; c
+= 2) {
3446 if (cap
->speakers
[c
] || cap
->speakers
[c
+1])
3450 if (chanpairs
* 2 != channels
)
3453 return SNDRV_CTL_TLVT_CHMAP_PAIRED
;
3456 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap
*hchmap
,
3457 struct hdac_cea_channel_speaker_allocation
*cap
,
3458 unsigned int *chmap
, int channels
)
3460 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3464 for (c
= 7; c
>= 0; c
--) {
3465 int chan
= 7 - atihdmi_paired_swap_fc_lfe(7 - c
);
3466 int spk
= cap
->speakers
[chan
];
3468 /* add N/A channel if the companion channel is occupied */
3469 if (cap
->speakers
[chan
+ (chan
% 2 ? -1 : 1)])
3470 chmap
[count
++] = SNDRV_CHMAP_NA
;
3475 chmap
[count
++] = snd_hdac_spk_to_chmap(spk
);
3478 WARN_ON(count
!= channels
);
3481 static int atihdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
3484 int hbr_ctl
, hbr_ctl_new
;
3486 hbr_ctl
= snd_hda_codec_read(codec
, pin_nid
, 0, ATI_VERB_GET_HBR_CONTROL
, 0);
3487 if (hbr_ctl
>= 0 && (hbr_ctl
& ATI_HBR_CAPABLE
)) {
3489 hbr_ctl_new
= hbr_ctl
| ATI_HBR_ENABLE
;
3491 hbr_ctl_new
= hbr_ctl
& ~ATI_HBR_ENABLE
;
3494 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3496 hbr_ctl
== hbr_ctl_new
? "" : "new-",
3499 if (hbr_ctl
!= hbr_ctl_new
)
3500 snd_hda_codec_write(codec
, pin_nid
, 0,
3501 ATI_VERB_SET_HBR_CONTROL
,
3510 static int atihdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
3511 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
3514 if (is_amdhdmi_rev3_or_later(codec
)) {
3515 int ramp_rate
= 180; /* default as per AMD spec */
3516 /* disable ramp-up/down for non-pcm as per AMD spec */
3517 if (format
& AC_FMT_TYPE_NON_PCM
)
3520 snd_hda_codec_write(codec
, cvt_nid
, 0, ATI_VERB_SET_RAMP_RATE
, ramp_rate
);
3523 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
3527 static int atihdmi_init(struct hda_codec
*codec
)
3529 struct hdmi_spec
*spec
= codec
->spec
;
3532 err
= generic_hdmi_init(codec
);
3537 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
3538 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
3540 /* make sure downmix information in infoframe is zero */
3541 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0, ATI_VERB_SET_DOWNMIX_INFO
, 0);
3543 /* enable channel-wise remap mode if supported */
3544 if (has_amd_full_remap_support(codec
))
3545 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
3546 ATI_VERB_SET_MULTICHANNEL_MODE
,
3547 ATI_MULTICHANNEL_MODE_SINGLE
);
3553 static int patch_atihdmi(struct hda_codec
*codec
)
3555 struct hdmi_spec
*spec
;
3556 struct hdmi_spec_per_cvt
*per_cvt
;
3559 err
= patch_generic_hdmi(codec
);
3564 codec
->patch_ops
.init
= atihdmi_init
;
3568 spec
->ops
.pin_get_eld
= atihdmi_pin_get_eld
;
3569 spec
->ops
.pin_setup_infoframe
= atihdmi_pin_setup_infoframe
;
3570 spec
->ops
.pin_hbr_setup
= atihdmi_pin_hbr_setup
;
3571 spec
->ops
.setup_stream
= atihdmi_setup_stream
;
3573 spec
->chmap
.ops
.pin_get_slot_channel
= atihdmi_pin_get_slot_channel
;
3574 spec
->chmap
.ops
.pin_set_slot_channel
= atihdmi_pin_set_slot_channel
;
3576 if (!has_amd_full_remap_support(codec
)) {
3577 /* override to ATI/AMD-specific versions with pairwise mapping */
3578 spec
->chmap
.ops
.chmap_cea_alloc_validate_get_type
=
3579 atihdmi_paired_chmap_cea_alloc_validate_get_type
;
3580 spec
->chmap
.ops
.cea_alloc_to_tlv_chmap
=
3581 atihdmi_paired_cea_alloc_to_tlv_chmap
;
3582 spec
->chmap
.ops
.chmap_validate
= atihdmi_paired_chmap_validate
;
3585 /* ATI/AMD converters do not advertise all of their capabilities */
3586 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
3587 per_cvt
= get_cvt(spec
, cvt_idx
);
3588 per_cvt
->channels_max
= max(per_cvt
->channels_max
, 8u);
3589 per_cvt
->rates
|= SUPPORTED_RATES
;
3590 per_cvt
->formats
|= SUPPORTED_FORMATS
;
3591 per_cvt
->maxbps
= max(per_cvt
->maxbps
, 24u);
3594 spec
->chmap
.channels_max
= max(spec
->chmap
.channels_max
, 8u);
3599 /* VIA HDMI Implementation */
3600 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3601 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3603 static int patch_via_hdmi(struct hda_codec
*codec
)
3605 return patch_simple_hdmi(codec
, VIAHDMI_CVT_NID
, VIAHDMI_PIN_NID
);
3611 static const struct hda_device_id snd_hda_id_hdmi
[] = {
3612 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi
),
3613 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi
),
3614 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi
),
3615 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi
),
3616 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi
),
3617 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi
),
3618 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi
),
3619 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI", patch_nvhdmi_2ch
),
3620 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3621 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3622 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI", patch_nvhdmi_8ch_7x
),
3623 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3624 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3625 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x
),
3626 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP", patch_nvhdmi
),
3627 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP", patch_nvhdmi
),
3628 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi
),
3629 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi
),
3630 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi
),
3631 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi
),
3632 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi
),
3633 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi
),
3634 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi
),
3635 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi
),
3636 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi
),
3637 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi
),
3638 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi
),
3639 /* 17 is known to be absent */
3640 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi
),
3641 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi
),
3642 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi
),
3643 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi
),
3644 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi
),
3645 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi
),
3646 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi
),
3647 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi
),
3648 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi
),
3649 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi
),
3650 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi
),
3651 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi
),
3652 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi
),
3653 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi
),
3654 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP", patch_nvhdmi
),
3655 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP", patch_nvhdmi
),
3656 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi
),
3657 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP", patch_nvhdmi
),
3658 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi
),
3659 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP", patch_nvhdmi
),
3660 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP", patch_nvhdmi
),
3661 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch
),
3662 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi
),
3663 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi
),
3664 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi
),
3665 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP", patch_nvhdmi
),
3666 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP", patch_nvhdmi
),
3667 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP", patch_nvhdmi
),
3668 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP", patch_nvhdmi
),
3669 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP", patch_nvhdmi
),
3670 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi
),
3671 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP", patch_nvhdmi
),
3672 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi
),
3673 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP", patch_nvhdmi
),
3674 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi
),
3675 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi
),
3676 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP", patch_nvhdmi
),
3677 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP", patch_nvhdmi
),
3678 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP", patch_nvhdmi
),
3679 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP", patch_nvhdmi
),
3680 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP", patch_nvhdmi
),
3681 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP", patch_nvhdmi
),
3682 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP", patch_nvhdmi
),
3683 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi
),
3684 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi
),
3685 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi
),
3686 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch
),
3687 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch
),
3688 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi
),
3689 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi
),
3690 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi
),
3691 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi
),
3692 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi
),
3693 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi
),
3694 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi
),
3695 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi
),
3696 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi
),
3697 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi
),
3698 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi
),
3699 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi
),
3700 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi
),
3701 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi
),
3702 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi
),
3703 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi
),
3704 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_hsw_hdmi
),
3705 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi
),
3706 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi
),
3707 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi
),
3708 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi
),
3709 /* special ID for generic HDMI */
3710 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI
, "Generic HDMI", patch_generic_hdmi
),
3713 MODULE_DEVICE_TABLE(hdaudio
, snd_hda_id_hdmi
);
3715 MODULE_LICENSE("GPL");
3716 MODULE_DESCRIPTION("HDMI HD-audio codec");
3717 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3718 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3719 MODULE_ALIAS("snd-hda-codec-atihdmi");
3721 static struct hda_codec_driver hdmi_driver
= {
3722 .id
= snd_hda_id_hdmi
,
3725 module_hda_codec_driver(hdmi_driver
);