writeback: safer lock nesting
[linux/fpc-iii.git] / include / dt-bindings / power / tegra186-powergate.h
blob388d6e228dc82fa958a14337b5c7e7f48f994108
1 /*
2 * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
18 #define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
20 #define TEGRA186_POWER_DOMAIN_AUD 0
21 #define TEGRA186_POWER_DOMAIN_DFD 1
22 #define TEGRA186_POWER_DOMAIN_DISP 2
23 #define TEGRA186_POWER_DOMAIN_DISPB 3
24 #define TEGRA186_POWER_DOMAIN_DISPC 4
25 #define TEGRA186_POWER_DOMAIN_ISPA 5
26 #define TEGRA186_POWER_DOMAIN_NVDEC 6
27 #define TEGRA186_POWER_DOMAIN_NVJPG 7
28 #define TEGRA186_POWER_DOMAIN_MPE 8
29 #define TEGRA186_POWER_DOMAIN_PCX 9
30 #define TEGRA186_POWER_DOMAIN_SAX 10
31 #define TEGRA186_POWER_DOMAIN_VE 11
32 #define TEGRA186_POWER_DOMAIN_VIC 12
33 #define TEGRA186_POWER_DOMAIN_XUSBA 13
34 #define TEGRA186_POWER_DOMAIN_XUSBB 14
35 #define TEGRA186_POWER_DOMAIN_XUSBC 15
36 #define TEGRA186_POWER_DOMAIN_GPU 43
37 #define TEGRA186_POWER_DOMAIN_MAX 44
39 #endif