2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * Gated clock implementation
12 #include <linux/clk-provider.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/string.h>
20 * DOC: basic gatable clock which can gate and ungate it's ouput
22 * Traits of this clock:
23 * prepare - clk_(un)prepare only ensures parent is (un)prepared
24 * enable - clk_enable and clk_disable are functional & control gating
25 * rate - inherits rate from parent. No clk_set_rate support
26 * parent - fixed parent. No clk_set_parent support
29 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
32 * It works on following logic:
34 * For enabling clock, enable = 1
35 * set2dis = 1 -> clear bit -> set = 0
36 * set2dis = 0 -> set bit -> set = 1
38 * For disabling clock, enable = 0
39 * set2dis = 1 -> set bit -> set = 1
40 * set2dis = 0 -> clear bit -> set = 0
42 * So, result is always: enable xor set2dis.
44 static void clk_gate_endisable(struct clk_hw
*hw
, int enable
)
46 struct clk_gate
*gate
= to_clk_gate(hw
);
47 int set
= gate
->flags
& CLK_GATE_SET_TO_DISABLE
? 1 : 0;
48 unsigned long flags
= 0;
54 spin_lock_irqsave(gate
->lock
, flags
);
56 reg
= readl(gate
->reg
);
59 reg
|= BIT(gate
->bit_idx
);
61 reg
&= ~BIT(gate
->bit_idx
);
63 writel(reg
, gate
->reg
);
66 spin_unlock_irqrestore(gate
->lock
, flags
);
69 static int clk_gate_enable(struct clk_hw
*hw
)
71 clk_gate_endisable(hw
, 1);
76 static void clk_gate_disable(struct clk_hw
*hw
)
78 clk_gate_endisable(hw
, 0);
81 static int clk_gate_is_enabled(struct clk_hw
*hw
)
84 struct clk_gate
*gate
= to_clk_gate(hw
);
86 reg
= readl(gate
->reg
);
88 /* if a set bit disables this clk, flip it before masking */
89 if (gate
->flags
& CLK_GATE_SET_TO_DISABLE
)
90 reg
^= BIT(gate
->bit_idx
);
92 reg
&= BIT(gate
->bit_idx
);
97 const struct clk_ops clk_gate_ops
= {
98 .enable
= clk_gate_enable
,
99 .disable
= clk_gate_disable
,
100 .is_enabled
= clk_gate_is_enabled
,
102 EXPORT_SYMBOL_GPL(clk_gate_ops
);
105 * clk_register_gate - register a gate clock with the clock framework
106 * @dev: device that is registering this clock
107 * @name: name of this clock
108 * @parent_name: name of this clock's parent
109 * @flags: framework-specific flags for this clock
110 * @reg: register address to control gating of this clock
111 * @bit_idx: which bit in the register controls gating of this clock
112 * @clk_gate_flags: gate-specific flags for this clock
113 * @lock: shared register lock for this clock
115 struct clk
*clk_register_gate(struct device
*dev
, const char *name
,
116 const char *parent_name
, unsigned long flags
,
117 void __iomem
*reg
, u8 bit_idx
,
118 u8 clk_gate_flags
, spinlock_t
*lock
)
120 struct clk_gate
*gate
;
122 struct clk_init_data init
;
124 /* allocate the gate */
125 gate
= kzalloc(sizeof(struct clk_gate
), GFP_KERNEL
);
127 pr_err("%s: could not allocate gated clk\n", __func__
);
128 return ERR_PTR(-ENOMEM
);
132 init
.ops
= &clk_gate_ops
;
133 init
.flags
= flags
| CLK_IS_BASIC
;
134 init
.parent_names
= (parent_name
? &parent_name
: NULL
);
135 init
.num_parents
= (parent_name
? 1 : 0);
137 /* struct clk_gate assignments */
139 gate
->bit_idx
= bit_idx
;
140 gate
->flags
= clk_gate_flags
;
142 gate
->hw
.init
= &init
;
144 clk
= clk_register(dev
, &gate
->hw
);