2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2005-2006 Silicon Graphics, Inc. All Rights Reserved.
9 /* This file contains the master driver module for use by SGI IOC4 subdrivers.
11 * It allocates any resources shared between multiple subdevices, and
12 * provides accessor functions (where needed) and the like for those
13 * resources. It also provides a mechanism for the subdevice modules
14 * to support loading and unloading.
16 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
17 * alias, serial port and UART registers) are handled by the subdevice
20 * This is all necessary because IOC4 is not implemented as a multi-function
21 * PCI device, but an amalgamation of disparate registers for several
22 * types of device (ATA, serial, external interrupts). The normal
23 * resource management in the kernel doesn't have quite the right interfaces
24 * to handle this situation (e.g. multiple modules can't claim the same
25 * PCI ID), thus this IOC4 master module.
28 #include <linux/errno.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/ioc4.h>
32 #include <linux/ktime.h>
33 #include <linux/mutex.h>
34 #include <linux/time.h>
41 /* Tweakable values */
43 /* PCI bus speed detection/calibration */
44 #define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
45 #define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
46 #define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
47 #define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
48 #define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
49 #define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
51 /************************
52 * Submodule management *
53 ************************/
55 static DEFINE_MUTEX(ioc4_mutex
);
57 static LIST_HEAD(ioc4_devices
);
58 static LIST_HEAD(ioc4_submodules
);
60 /* Register an IOC4 submodule */
62 ioc4_register_submodule(struct ioc4_submodule
*is
)
64 struct ioc4_driver_data
*idd
;
66 mutex_lock(&ioc4_mutex
);
67 list_add(&is
->is_list
, &ioc4_submodules
);
69 /* Initialize submodule for each IOC4 */
73 list_for_each_entry(idd
, &ioc4_devices
, idd_list
) {
74 if (is
->is_probe(idd
)) {
76 "%s: IOC4 submodule %s probe failed "
78 __func__
, module_name(is
->is_owner
),
79 pci_name(idd
->idd_pdev
));
83 mutex_unlock(&ioc4_mutex
);
87 /* Unregister an IOC4 submodule */
89 ioc4_unregister_submodule(struct ioc4_submodule
*is
)
91 struct ioc4_driver_data
*idd
;
93 mutex_lock(&ioc4_mutex
);
94 list_del(&is
->is_list
);
96 /* Remove submodule for each IOC4 */
100 list_for_each_entry(idd
, &ioc4_devices
, idd_list
) {
101 if (is
->is_remove(idd
)) {
103 "%s: IOC4 submodule %s remove failed "
105 __func__
, module_name(is
->is_owner
),
106 pci_name(idd
->idd_pdev
));
110 mutex_unlock(&ioc4_mutex
);
113 /*********************
114 * Device management *
115 *********************/
117 #define IOC4_CALIBRATE_LOW_LIMIT \
118 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
119 #define IOC4_CALIBRATE_HIGH_LIMIT \
120 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
121 #define IOC4_CALIBRATE_DEFAULT \
122 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
124 #define IOC4_CALIBRATE_END \
125 (IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
127 #define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
129 /* Determines external interrupt output clock period of the PCI bus an
130 * IOC4 is attached to. This value can be used to determine the PCI
133 * IOC4 has a design feature that various internal timers are derived from
134 * the PCI bus clock. This causes IOC4 device drivers to need to take the
135 * bus speed into account when setting various register values (e.g. INT_OUT
136 * register COUNT field, UART divisors, etc). Since this information is
137 * needed by several subdrivers, it is determined by the main IOC4 driver,
138 * even though the following code utilizes external interrupt registers
139 * to perform the speed calculation.
141 static void __devinit
142 ioc4_clock_calibrate(struct ioc4_driver_data
*idd
)
144 union ioc4_int_out int_out
;
145 union ioc4_gpcr gpcr
;
146 unsigned int state
, last_state
= 1;
147 struct timespec start_ts
, end_ts
;
148 uint64_t start
, end
, period
;
149 unsigned int count
= 0;
153 gpcr
.fields
.dir
= IOC4_GPCR_DIR_0
;
154 gpcr
.fields
.int_out_en
= 1;
155 writel(gpcr
.raw
, &idd
->idd_misc_regs
->gpcr_s
.raw
);
157 /* Reset to power-on state */
158 writel(0, &idd
->idd_misc_regs
->int_out
.raw
);
161 /* Set up square wave */
163 int_out
.fields
.count
= IOC4_CALIBRATE_COUNT
;
164 int_out
.fields
.mode
= IOC4_INT_OUT_MODE_TOGGLE
;
165 int_out
.fields
.diag
= 0;
166 writel(int_out
.raw
, &idd
->idd_misc_regs
->int_out
.raw
);
169 /* Check square wave period averaged over some number of cycles */
171 int_out
.raw
= readl(&idd
->idd_misc_regs
->int_out
.raw
);
172 state
= int_out
.fields
.int_out
;
173 if (!last_state
&& state
) {
175 if (count
== IOC4_CALIBRATE_END
) {
176 ktime_get_ts(&end_ts
);
178 } else if (count
== IOC4_CALIBRATE_DISCARD
)
179 ktime_get_ts(&start_ts
);
184 /* Calculation rearranged to preserve intermediate precision.
186 * 1. "end - start" gives us the measurement period over all
187 * the square wave cycles.
188 * 2. Divide by number of square wave cycles to get the period
189 * of a square wave cycle.
190 * 3. Divide by 2*(int_out.fields.count+1), which is the formula
191 * by which the IOC4 generates the square wave, to get the
192 * period of an IOC4 INT_OUT count.
194 end
= end_ts
.tv_sec
* NSEC_PER_SEC
+ end_ts
.tv_nsec
;
195 start
= start_ts
.tv_sec
* NSEC_PER_SEC
+ start_ts
.tv_nsec
;
196 period
= (end
- start
) /
197 (IOC4_CALIBRATE_CYCLES
* 2 * (IOC4_CALIBRATE_COUNT
+ 1));
199 /* Bounds check the result. */
200 if (period
> IOC4_CALIBRATE_LOW_LIMIT
||
201 period
< IOC4_CALIBRATE_HIGH_LIMIT
) {
203 "IOC4 %s: Clock calibration failed. Assuming"
204 "PCI clock is %d ns.\n",
205 pci_name(idd
->idd_pdev
),
206 IOC4_CALIBRATE_DEFAULT
/ IOC4_EXTINT_COUNT_DIVISOR
);
207 period
= IOC4_CALIBRATE_DEFAULT
;
211 do_div(ns
, IOC4_EXTINT_COUNT_DIVISOR
);
213 "IOC4 %s: PCI clock is %llu ns.\n",
214 pci_name(idd
->idd_pdev
), (unsigned long long)ns
);
217 /* Remember results. We store the extint clock period rather
218 * than the PCI clock period so that greater precision is
219 * retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
222 idd
->count_period
= period
;
225 /* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
226 * Each brings out different combinations of IOC4 signals, thus.
227 * the IOC4 subdrivers need to know to which we're attached.
229 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
230 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
231 * If neither is present, it's a PCI-RT.
233 static unsigned int __devinit
234 ioc4_variant(struct ioc4_driver_data
*idd
)
236 struct pci_dev
*pdev
= NULL
;
239 /* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
241 pdev
= pci_get_device(PCI_VENDOR_ID_QLOGIC
,
242 PCI_DEVICE_ID_QLOGIC_ISP12160
, pdev
);
244 idd
->idd_pdev
->bus
->number
== pdev
->bus
->number
&&
245 3 == PCI_SLOT(pdev
->devfn
))
247 } while (pdev
&& !found
);
250 return IOC4_VARIANT_IO9
;
253 /* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
256 pdev
= pci_get_device(PCI_VENDOR_ID_VITESSE
,
257 PCI_DEVICE_ID_VITESSE_VSC7174
, pdev
);
259 idd
->idd_pdev
->bus
->number
== pdev
->bus
->number
&&
260 3 == PCI_SLOT(pdev
->devfn
))
262 } while (pdev
&& !found
);
265 return IOC4_VARIANT_IO10
;
268 /* PCI-RT: No SCSI/SATA controller will be present */
269 return IOC4_VARIANT_PCI_RT
;
272 static void __devinit
273 ioc4_load_modules(struct work_struct
*work
)
275 /* arg just has to be freed */
277 request_module("sgiioc4");
282 /* Adds a new instance of an IOC4 card */
284 ioc4_probe(struct pci_dev
*pdev
, const struct pci_device_id
*pci_id
)
286 struct ioc4_driver_data
*idd
;
287 struct ioc4_submodule
*is
;
291 /* Enable IOC4 and take ownership of it */
292 if ((ret
= pci_enable_device(pdev
))) {
294 "%s: Failed to enable IOC4 device for pci_dev %s.\n",
295 __func__
, pci_name(pdev
));
298 pci_set_master(pdev
);
300 /* Set up per-IOC4 data */
301 idd
= kmalloc(sizeof(struct ioc4_driver_data
), GFP_KERNEL
);
304 "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
305 __func__
, pci_name(pdev
));
309 idd
->idd_pdev
= pdev
;
310 idd
->idd_pci_id
= pci_id
;
312 /* Map IOC4 misc registers. These are shared between subdevices
313 * so the main IOC4 module manages them.
315 idd
->idd_bar0
= pci_resource_start(idd
->idd_pdev
, 0);
316 if (!idd
->idd_bar0
) {
318 "%s: Unable to find IOC4 misc resource "
320 __func__
, pci_name(idd
->idd_pdev
));
324 if (!request_mem_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
),
327 "%s: Unable to request IOC4 misc region "
329 __func__
, pci_name(idd
->idd_pdev
));
333 idd
->idd_misc_regs
= ioremap(idd
->idd_bar0
,
334 sizeof(struct ioc4_misc_regs
));
335 if (!idd
->idd_misc_regs
) {
337 "%s: Unable to remap IOC4 misc region "
339 __func__
, pci_name(idd
->idd_pdev
));
341 goto out_misc_region
;
344 /* Failsafe portion of per-IOC4 initialization */
346 /* Detect card variant */
347 idd
->idd_variant
= ioc4_variant(idd
);
348 printk(KERN_INFO
"IOC4 %s: %s card detected.\n", pci_name(pdev
),
349 idd
->idd_variant
== IOC4_VARIANT_IO9
? "IO9" :
350 idd
->idd_variant
== IOC4_VARIANT_PCI_RT
? "PCI-RT" :
351 idd
->idd_variant
== IOC4_VARIANT_IO10
? "IO10" : "unknown");
353 /* Initialize IOC4 */
354 pci_read_config_dword(idd
->idd_pdev
, PCI_COMMAND
, &pcmd
);
355 pci_write_config_dword(idd
->idd_pdev
, PCI_COMMAND
,
356 pcmd
| PCI_COMMAND_PARITY
| PCI_COMMAND_SERR
);
358 /* Determine PCI clock */
359 ioc4_clock_calibrate(idd
);
361 /* Disable/clear all interrupts. Need to do this here lest
362 * one submodule request the shared IOC4 IRQ, but interrupt
363 * is generated by a different subdevice.
366 writel(~0, &idd
->idd_misc_regs
->other_iec
.raw
);
367 writel(~0, &idd
->idd_misc_regs
->sio_iec
);
368 /* Clear (i.e. acknowledge) */
369 writel(~0, &idd
->idd_misc_regs
->other_ir
.raw
);
370 writel(~0, &idd
->idd_misc_regs
->sio_ir
);
372 /* Track PCI-device specific data */
373 idd
->idd_serial_data
= NULL
;
374 pci_set_drvdata(idd
->idd_pdev
, idd
);
376 mutex_lock(&ioc4_mutex
);
377 list_add_tail(&idd
->idd_list
, &ioc4_devices
);
379 /* Add this IOC4 to all submodules */
380 list_for_each_entry(is
, &ioc4_submodules
, is_list
) {
381 if (is
->is_probe
&& is
->is_probe(idd
)) {
383 "%s: IOC4 submodule 0x%s probe failed "
385 __func__
, module_name(is
->is_owner
),
386 pci_name(idd
->idd_pdev
));
389 mutex_unlock(&ioc4_mutex
);
391 /* Request sgiioc4 IDE driver on boards that bring that functionality
392 * off of IOC4. The root filesystem may be hosted on a drive connected
393 * to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
394 * won't be picked up by modprobes due to the ioc4 module owning the
397 if (idd
->idd_variant
!= IOC4_VARIANT_PCI_RT
) {
398 struct work_struct
*work
;
399 work
= kzalloc(sizeof(struct work_struct
), GFP_KERNEL
);
402 "%s: IOC4 unable to allocate memory for "
403 "load of sub-modules.\n", __func__
);
405 /* Request the module from a work procedure as the
406 * modprobe goes out to a userland helper and that
407 * will hang if done directly from ioc4_probe().
409 printk(KERN_INFO
"IOC4 loading sgiioc4 submodule\n");
410 INIT_WORK(work
, ioc4_load_modules
);
418 release_mem_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
));
422 pci_disable_device(pdev
);
427 /* Removes a particular instance of an IOC4 card. */
428 static void __devexit
429 ioc4_remove(struct pci_dev
*pdev
)
431 struct ioc4_submodule
*is
;
432 struct ioc4_driver_data
*idd
;
434 idd
= pci_get_drvdata(pdev
);
436 /* Remove this IOC4 from all submodules */
437 mutex_lock(&ioc4_mutex
);
438 list_for_each_entry(is
, &ioc4_submodules
, is_list
) {
439 if (is
->is_remove
&& is
->is_remove(idd
)) {
441 "%s: IOC4 submodule 0x%s remove failed "
443 __func__
, module_name(is
->is_owner
),
444 pci_name(idd
->idd_pdev
));
447 mutex_unlock(&ioc4_mutex
);
449 /* Release resources */
450 iounmap(idd
->idd_misc_regs
);
451 if (!idd
->idd_bar0
) {
453 "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
454 "Device removal may be incomplete.\n",
455 __func__
, pci_name(idd
->idd_pdev
));
457 release_mem_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
));
459 /* Disable IOC4 and relinquish */
460 pci_disable_device(pdev
);
462 /* Remove and free driver data */
463 mutex_lock(&ioc4_mutex
);
464 list_del(&idd
->idd_list
);
465 mutex_unlock(&ioc4_mutex
);
469 static struct pci_device_id ioc4_id_table
[] = {
470 {PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_IOC4
, PCI_ANY_ID
,
471 PCI_ANY_ID
, 0x0b4000, 0xFFFFFF},
475 static struct pci_driver ioc4_driver
= {
477 .id_table
= ioc4_id_table
,
479 .remove
= __devexit_p(ioc4_remove
),
482 MODULE_DEVICE_TABLE(pci
, ioc4_id_table
);
484 /*********************
485 * Module management *
486 *********************/
492 return pci_register_driver(&ioc4_driver
);
499 /* Ensure ioc4_load_modules() has completed before exiting */
500 flush_scheduled_work();
501 pci_unregister_driver(&ioc4_driver
);
504 module_init(ioc4_init
);
505 module_exit(ioc4_exit
);
507 MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
508 MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
509 MODULE_LICENSE("GPL");
511 EXPORT_SYMBOL(ioc4_register_submodule
);
512 EXPORT_SYMBOL(ioc4_unregister_submodule
);