1 // SPDX-License-Identifier: GPL-2.0-only
3 * Dynamic DMA mapping support.
5 * This implementation is a fallback for platforms that do not support
6 * I/O TLBs (aka DMA address translation hardware).
7 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
8 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
9 * Copyright (C) 2000, 2003 Hewlett-Packard Co
10 * David Mosberger-Tang <davidm@hpl.hp.com>
12 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
13 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
14 * unnecessary i-cache flushing.
15 * 04/07/.. ak Better overflow handling. Assorted fixes.
16 * 05/09/10 linville Add support for syncing ranges, support syncing for
17 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
18 * 08/12/11 beckyb Add highmem support
21 #define pr_fmt(fmt) "software IO TLB: " fmt
23 #include <linux/cache.h>
24 #include <linux/dma-direct.h>
25 #include <linux/dma-noncoherent.h>
27 #include <linux/export.h>
28 #include <linux/spinlock.h>
29 #include <linux/string.h>
30 #include <linux/swiotlb.h>
31 #include <linux/pfn.h>
32 #include <linux/types.h>
33 #include <linux/ctype.h>
34 #include <linux/highmem.h>
35 #include <linux/gfp.h>
36 #include <linux/scatterlist.h>
37 #include <linux/mem_encrypt.h>
38 #include <linux/set_memory.h>
39 #ifdef CONFIG_DEBUG_FS
40 #include <linux/debugfs.h>
46 #include <linux/init.h>
47 #include <linux/memblock.h>
48 #include <linux/iommu-helper.h>
50 #define CREATE_TRACE_POINTS
51 #include <trace/events/swiotlb.h>
53 #define OFFSET(val,align) ((unsigned long) \
54 ( (val) & ( (align) - 1)))
56 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
59 * Minimum IO TLB size to bother booting with. Systems with mainly
60 * 64bit capable cards will only lightly use the swiotlb. If we can't
61 * allocate a contiguous 1MB, we're probably in trouble anyway.
63 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
65 enum swiotlb_force swiotlb_force
;
68 * Used to do a quick range check in swiotlb_tbl_unmap_single and
69 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
72 phys_addr_t io_tlb_start
, io_tlb_end
;
75 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
76 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
78 static unsigned long io_tlb_nslabs
;
81 * The number of used IO TLB block
83 static unsigned long io_tlb_used
;
86 * This is a free list describing the number of free entries available from
89 static unsigned int *io_tlb_list
;
90 static unsigned int io_tlb_index
;
93 * Max segment that we can provide which (if pages are contingous) will
94 * not be bounced (unless SWIOTLB_FORCE is set).
96 unsigned int max_segment
;
99 * We need to save away the original address corresponding to a mapped entry
100 * for the sync operations.
102 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
103 static phys_addr_t
*io_tlb_orig_addr
;
106 * Protect the above data structures in the map and unmap calls
108 static DEFINE_SPINLOCK(io_tlb_lock
);
110 static int late_alloc
;
113 setup_io_tlb_npages(char *str
)
116 io_tlb_nslabs
= simple_strtoul(str
, &str
, 0);
117 /* avoid tail segment of size < IO_TLB_SEGSIZE */
118 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
122 if (!strcmp(str
, "force")) {
123 swiotlb_force
= SWIOTLB_FORCE
;
124 } else if (!strcmp(str
, "noforce")) {
125 swiotlb_force
= SWIOTLB_NO_FORCE
;
131 early_param("swiotlb", setup_io_tlb_npages
);
133 static bool no_iotlb_memory
;
135 unsigned long swiotlb_nr_tbl(void)
137 return unlikely(no_iotlb_memory
) ? 0 : io_tlb_nslabs
;
139 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl
);
141 unsigned int swiotlb_max_segment(void)
143 return unlikely(no_iotlb_memory
) ? 0 : max_segment
;
145 EXPORT_SYMBOL_GPL(swiotlb_max_segment
);
147 void swiotlb_set_max_segment(unsigned int val
)
149 if (swiotlb_force
== SWIOTLB_FORCE
)
152 max_segment
= rounddown(val
, PAGE_SIZE
);
155 /* default to 64MB */
156 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
157 unsigned long swiotlb_size_or_default(void)
161 size
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
163 return size
? size
: (IO_TLB_DEFAULT_SIZE
);
166 void swiotlb_print_info(void)
168 unsigned long bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
170 if (no_iotlb_memory
) {
171 pr_warn("No low mem\n");
175 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
176 (unsigned long long)io_tlb_start
,
177 (unsigned long long)io_tlb_end
,
182 * Early SWIOTLB allocation may be too early to allow an architecture to
183 * perform the desired operations. This function allows the architecture to
184 * call SWIOTLB when the operations are possible. It needs to be called
185 * before the SWIOTLB memory is used.
187 void __init
swiotlb_update_mem_attributes(void)
192 if (no_iotlb_memory
|| late_alloc
)
195 vaddr
= phys_to_virt(io_tlb_start
);
196 bytes
= PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
);
197 set_memory_decrypted((unsigned long)vaddr
, bytes
>> PAGE_SHIFT
);
198 memset(vaddr
, 0, bytes
);
201 int __init
swiotlb_init_with_tbl(char *tlb
, unsigned long nslabs
, int verbose
)
203 unsigned long i
, bytes
;
206 bytes
= nslabs
<< IO_TLB_SHIFT
;
208 io_tlb_nslabs
= nslabs
;
209 io_tlb_start
= __pa(tlb
);
210 io_tlb_end
= io_tlb_start
+ bytes
;
213 * Allocate and initialize the free list array. This array is used
214 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
215 * between io_tlb_start and io_tlb_end.
217 alloc_size
= PAGE_ALIGN(io_tlb_nslabs
* sizeof(int));
218 io_tlb_list
= memblock_alloc(alloc_size
, PAGE_SIZE
);
220 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
221 __func__
, alloc_size
, PAGE_SIZE
);
223 alloc_size
= PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
));
224 io_tlb_orig_addr
= memblock_alloc(alloc_size
, PAGE_SIZE
);
225 if (!io_tlb_orig_addr
)
226 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
227 __func__
, alloc_size
, PAGE_SIZE
);
229 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
230 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
231 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
236 swiotlb_print_info();
238 swiotlb_set_max_segment(io_tlb_nslabs
<< IO_TLB_SHIFT
);
243 * Statically reserve bounce buffer space and initialize bounce buffer data
244 * structures for the software IO TLB used to implement the DMA API.
247 swiotlb_init(int verbose
)
249 size_t default_size
= IO_TLB_DEFAULT_SIZE
;
250 unsigned char *vstart
;
253 if (!io_tlb_nslabs
) {
254 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
255 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
258 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
260 /* Get IO TLB memory from the low pages */
261 vstart
= memblock_alloc_low(PAGE_ALIGN(bytes
), PAGE_SIZE
);
262 if (vstart
&& !swiotlb_init_with_tbl(vstart
, io_tlb_nslabs
, verbose
))
266 memblock_free_early(io_tlb_start
,
267 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
268 pr_warn("Cannot allocate buffer");
269 no_iotlb_memory
= true;
273 * Systems with larger DMA zones (those that don't support ISA) can
274 * initialize the swiotlb later using the slab allocator if needed.
275 * This should be just like above, but with some error catching.
278 swiotlb_late_init_with_default_size(size_t default_size
)
280 unsigned long bytes
, req_nslabs
= io_tlb_nslabs
;
281 unsigned char *vstart
= NULL
;
285 if (!io_tlb_nslabs
) {
286 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
287 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
291 * Get IO TLB memory from the low pages
293 order
= get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
);
294 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
295 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
297 while ((SLABS_PER_PAGE
<< order
) > IO_TLB_MIN_SLABS
) {
298 vstart
= (void *)__get_free_pages(GFP_DMA
| __GFP_NOWARN
,
306 io_tlb_nslabs
= req_nslabs
;
309 if (order
!= get_order(bytes
)) {
310 pr_warn("only able to allocate %ld MB\n",
311 (PAGE_SIZE
<< order
) >> 20);
312 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
314 rc
= swiotlb_late_init_with_tbl(vstart
, io_tlb_nslabs
);
316 free_pages((unsigned long)vstart
, order
);
321 static void swiotlb_cleanup(void)
330 swiotlb_late_init_with_tbl(char *tlb
, unsigned long nslabs
)
332 unsigned long i
, bytes
;
334 bytes
= nslabs
<< IO_TLB_SHIFT
;
336 io_tlb_nslabs
= nslabs
;
337 io_tlb_start
= virt_to_phys(tlb
);
338 io_tlb_end
= io_tlb_start
+ bytes
;
340 set_memory_decrypted((unsigned long)tlb
, bytes
>> PAGE_SHIFT
);
341 memset(tlb
, 0, bytes
);
344 * Allocate and initialize the free list array. This array is used
345 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
346 * between io_tlb_start and io_tlb_end.
348 io_tlb_list
= (unsigned int *)__get_free_pages(GFP_KERNEL
,
349 get_order(io_tlb_nslabs
* sizeof(int)));
353 io_tlb_orig_addr
= (phys_addr_t
*)
354 __get_free_pages(GFP_KERNEL
,
355 get_order(io_tlb_nslabs
*
356 sizeof(phys_addr_t
)));
357 if (!io_tlb_orig_addr
)
360 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
361 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
362 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
366 swiotlb_print_info();
370 swiotlb_set_max_segment(io_tlb_nslabs
<< IO_TLB_SHIFT
);
375 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
383 void __init
swiotlb_exit(void)
385 if (!io_tlb_orig_addr
)
389 free_pages((unsigned long)io_tlb_orig_addr
,
390 get_order(io_tlb_nslabs
* sizeof(phys_addr_t
)));
391 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
393 free_pages((unsigned long)phys_to_virt(io_tlb_start
),
394 get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
));
396 memblock_free_late(__pa(io_tlb_orig_addr
),
397 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)));
398 memblock_free_late(__pa(io_tlb_list
),
399 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)));
400 memblock_free_late(io_tlb_start
,
401 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
407 * Bounce: copy the swiotlb buffer from or back to the original dma location
409 static void swiotlb_bounce(phys_addr_t orig_addr
, phys_addr_t tlb_addr
,
410 size_t size
, enum dma_data_direction dir
)
412 unsigned long pfn
= PFN_DOWN(orig_addr
);
413 unsigned char *vaddr
= phys_to_virt(tlb_addr
);
415 if (PageHighMem(pfn_to_page(pfn
))) {
416 /* The buffer does not have a mapping. Map it in and copy */
417 unsigned int offset
= orig_addr
& ~PAGE_MASK
;
423 sz
= min_t(size_t, PAGE_SIZE
- offset
, size
);
425 local_irq_save(flags
);
426 buffer
= kmap_atomic(pfn_to_page(pfn
));
427 if (dir
== DMA_TO_DEVICE
)
428 memcpy(vaddr
, buffer
+ offset
, sz
);
430 memcpy(buffer
+ offset
, vaddr
, sz
);
431 kunmap_atomic(buffer
);
432 local_irq_restore(flags
);
439 } else if (dir
== DMA_TO_DEVICE
) {
440 memcpy(vaddr
, phys_to_virt(orig_addr
), size
);
442 memcpy(phys_to_virt(orig_addr
), vaddr
, size
);
446 phys_addr_t
swiotlb_tbl_map_single(struct device
*hwdev
,
447 dma_addr_t tbl_dma_addr
,
448 phys_addr_t orig_addr
,
451 enum dma_data_direction dir
,
455 phys_addr_t tlb_addr
;
456 unsigned int nslots
, stride
, index
, wrap
;
459 unsigned long offset_slots
;
460 unsigned long max_slots
;
461 unsigned long tmp_io_tlb_used
;
464 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
466 if (mem_encrypt_active())
467 pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
469 if (mapping_size
> alloc_size
) {
470 dev_warn_once(hwdev
, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
471 mapping_size
, alloc_size
);
472 return (phys_addr_t
)DMA_MAPPING_ERROR
;
475 mask
= dma_get_seg_boundary(hwdev
);
477 tbl_dma_addr
&= mask
;
479 offset_slots
= ALIGN(tbl_dma_addr
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
482 * Carefully handle integer overflow which can occur when mask == ~0UL.
485 ? ALIGN(mask
+ 1, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
486 : 1UL << (BITS_PER_LONG
- IO_TLB_SHIFT
);
489 * For mappings greater than or equal to a page, we limit the stride
490 * (and hence alignment) to a page size.
492 nslots
= ALIGN(alloc_size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
493 if (alloc_size
>= PAGE_SIZE
)
494 stride
= (1 << (PAGE_SHIFT
- IO_TLB_SHIFT
));
501 * Find suitable number of IO TLB entries size that will fit this
502 * request and allocate a buffer from that IO TLB pool.
504 spin_lock_irqsave(&io_tlb_lock
, flags
);
506 if (unlikely(nslots
> io_tlb_nslabs
- io_tlb_used
))
509 index
= ALIGN(io_tlb_index
, stride
);
510 if (index
>= io_tlb_nslabs
)
515 while (iommu_is_span_boundary(index
, nslots
, offset_slots
,
518 if (index
>= io_tlb_nslabs
)
525 * If we find a slot that indicates we have 'nslots' number of
526 * contiguous buffers, we allocate the buffers from that slot
527 * and mark the entries as '0' indicating unavailable.
529 if (io_tlb_list
[index
] >= nslots
) {
532 for (i
= index
; i
< (int) (index
+ nslots
); i
++)
534 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
- 1) && io_tlb_list
[i
]; i
--)
535 io_tlb_list
[i
] = ++count
;
536 tlb_addr
= io_tlb_start
+ (index
<< IO_TLB_SHIFT
);
539 * Update the indices to avoid searching in the next
542 io_tlb_index
= ((index
+ nslots
) < io_tlb_nslabs
543 ? (index
+ nslots
) : 0);
548 if (index
>= io_tlb_nslabs
)
550 } while (index
!= wrap
);
553 tmp_io_tlb_used
= io_tlb_used
;
555 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
556 if (!(attrs
& DMA_ATTR_NO_WARN
) && printk_ratelimit())
557 dev_warn(hwdev
, "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
558 alloc_size
, io_tlb_nslabs
, tmp_io_tlb_used
);
559 return (phys_addr_t
)DMA_MAPPING_ERROR
;
561 io_tlb_used
+= nslots
;
562 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
565 * Save away the mapping from the original address to the DMA address.
566 * This is needed when we sync the memory. Then we sync the buffer if
569 for (i
= 0; i
< nslots
; i
++)
570 io_tlb_orig_addr
[index
+i
] = orig_addr
+ (i
<< IO_TLB_SHIFT
);
571 if (!(attrs
& DMA_ATTR_SKIP_CPU_SYNC
) &&
572 (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
573 swiotlb_bounce(orig_addr
, tlb_addr
, mapping_size
, DMA_TO_DEVICE
);
579 * tlb_addr is the physical address of the bounce buffer to unmap.
581 void swiotlb_tbl_unmap_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
582 size_t mapping_size
, size_t alloc_size
,
583 enum dma_data_direction dir
, unsigned long attrs
)
586 int i
, count
, nslots
= ALIGN(alloc_size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
587 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
588 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
591 * First, sync the memory before unmapping the entry
593 if (orig_addr
!= INVALID_PHYS_ADDR
&&
594 !(attrs
& DMA_ATTR_SKIP_CPU_SYNC
) &&
595 ((dir
== DMA_FROM_DEVICE
) || (dir
== DMA_BIDIRECTIONAL
)))
596 swiotlb_bounce(orig_addr
, tlb_addr
, mapping_size
, DMA_FROM_DEVICE
);
599 * Return the buffer to the free list by setting the corresponding
600 * entries to indicate the number of contiguous entries available.
601 * While returning the entries to the free list, we merge the entries
602 * with slots below and above the pool being returned.
604 spin_lock_irqsave(&io_tlb_lock
, flags
);
606 count
= ((index
+ nslots
) < ALIGN(index
+ 1, IO_TLB_SEGSIZE
) ?
607 io_tlb_list
[index
+ nslots
] : 0);
609 * Step 1: return the slots to the free list, merging the
610 * slots with superceeding slots
612 for (i
= index
+ nslots
- 1; i
>= index
; i
--) {
613 io_tlb_list
[i
] = ++count
;
614 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
617 * Step 2: merge the returned slots with the preceding slots,
618 * if available (non zero)
620 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
621 io_tlb_list
[i
] = ++count
;
623 io_tlb_used
-= nslots
;
625 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
628 void swiotlb_tbl_sync_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
629 size_t size
, enum dma_data_direction dir
,
630 enum dma_sync_target target
)
632 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
633 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
635 if (orig_addr
== INVALID_PHYS_ADDR
)
637 orig_addr
+= (unsigned long)tlb_addr
& ((1 << IO_TLB_SHIFT
) - 1);
641 if (likely(dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
642 swiotlb_bounce(orig_addr
, tlb_addr
,
643 size
, DMA_FROM_DEVICE
);
645 BUG_ON(dir
!= DMA_TO_DEVICE
);
647 case SYNC_FOR_DEVICE
:
648 if (likely(dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
649 swiotlb_bounce(orig_addr
, tlb_addr
,
650 size
, DMA_TO_DEVICE
);
652 BUG_ON(dir
!= DMA_FROM_DEVICE
);
660 * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
661 * to the device copy the data into it as well.
663 dma_addr_t
swiotlb_map(struct device
*dev
, phys_addr_t paddr
, size_t size
,
664 enum dma_data_direction dir
, unsigned long attrs
)
666 phys_addr_t swiotlb_addr
;
669 trace_swiotlb_bounced(dev
, phys_to_dma(dev
, paddr
), size
,
672 swiotlb_addr
= swiotlb_tbl_map_single(dev
,
673 __phys_to_dma(dev
, io_tlb_start
),
674 paddr
, size
, size
, dir
, attrs
);
675 if (swiotlb_addr
== (phys_addr_t
)DMA_MAPPING_ERROR
)
676 return DMA_MAPPING_ERROR
;
678 /* Ensure that the address returned is DMA'ble */
679 dma_addr
= __phys_to_dma(dev
, swiotlb_addr
);
680 if (unlikely(!dma_capable(dev
, dma_addr
, size
, true))) {
681 swiotlb_tbl_unmap_single(dev
, swiotlb_addr
, size
, size
, dir
,
682 attrs
| DMA_ATTR_SKIP_CPU_SYNC
);
683 dev_WARN_ONCE(dev
, 1,
684 "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
685 &dma_addr
, size
, *dev
->dma_mask
, dev
->bus_dma_limit
);
686 return DMA_MAPPING_ERROR
;
689 if (!dev_is_dma_coherent(dev
) && !(attrs
& DMA_ATTR_SKIP_CPU_SYNC
))
690 arch_sync_dma_for_device(swiotlb_addr
, size
, dir
);
694 size_t swiotlb_max_mapping_size(struct device
*dev
)
696 return ((size_t)1 << IO_TLB_SHIFT
) * IO_TLB_SEGSIZE
;
699 bool is_swiotlb_active(void)
702 * When SWIOTLB is initialized, even if io_tlb_start points to physical
703 * address zero, io_tlb_end surely doesn't.
705 return io_tlb_end
!= 0;
708 #ifdef CONFIG_DEBUG_FS
710 static int __init
swiotlb_create_debugfs(void)
714 root
= debugfs_create_dir("swiotlb", NULL
);
715 debugfs_create_ulong("io_tlb_nslabs", 0400, root
, &io_tlb_nslabs
);
716 debugfs_create_ulong("io_tlb_used", 0400, root
, &io_tlb_used
);
720 late_initcall(swiotlb_create_debugfs
);