clk: samsung: Add bus clock for GPU/G3D on Exynos4412
[linux/fpc-iii.git] / arch / sh / kernel / cpu / sh3 / clock-sh7710.c
blobe60d0bc19cbe96d2a5df902e0274b8acdb3d09bb
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * arch/sh/kernel/cpu/sh3/clock-sh7710.c
5 * SH7710 support for the clock framework
7 * Copyright (C) 2005 Paul Mundt
9 * FRQCR parsing hacked out of arch/sh/kernel/time.c
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
12 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
13 * Copyright (C) 2002, 2003, 2004 Paul Mundt
14 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
16 #include <linux/init.h>
17 #include <linux/kernel.h>
18 #include <asm/clock.h>
19 #include <asm/freq.h>
20 #include <asm/io.h>
22 static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
24 static void master_clk_init(struct clk *clk)
26 clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
29 static struct sh_clk_ops sh7710_master_clk_ops = {
30 .init = master_clk_init,
33 static unsigned long module_clk_recalc(struct clk *clk)
35 int idx = (__raw_readw(FRQCR) & 0x0007);
36 return clk->parent->rate / md_table[idx];
39 static struct sh_clk_ops sh7710_module_clk_ops = {
40 .recalc = module_clk_recalc,
43 static unsigned long bus_clk_recalc(struct clk *clk)
45 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
46 return clk->parent->rate / md_table[idx];
49 static struct sh_clk_ops sh7710_bus_clk_ops = {
50 .recalc = bus_clk_recalc,
53 static unsigned long cpu_clk_recalc(struct clk *clk)
55 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
56 return clk->parent->rate / md_table[idx];
59 static struct sh_clk_ops sh7710_cpu_clk_ops = {
60 .recalc = cpu_clk_recalc,
63 static struct sh_clk_ops *sh7710_clk_ops[] = {
64 &sh7710_master_clk_ops,
65 &sh7710_module_clk_ops,
66 &sh7710_bus_clk_ops,
67 &sh7710_cpu_clk_ops,
70 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
72 if (idx < ARRAY_SIZE(sh7710_clk_ops))
73 *ops = sh7710_clk_ops[idx];