sound/isa/ad1816a/ad1816a_lib.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3     ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
   4     Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
   5
   6 */
   7
   8 #include <linux/delay.h>
   9 #include <linux/init.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/slab.h>
  12 #include <linux/ioport.h>
  13 #include <linux/io.h>
  14 #include <sound/core.h>
  15 #include <sound/tlv.h>
  16 #include <sound/ad1816a.h>
  17
  18 #include <asm/dma.h>
  19
  20 static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
  21 {
  22         int timeout;
  23
  24         for (timeout = 1000; timeout-- > 0; udelay(10))
  25                 if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
  26                         return 0;
  27
  28         snd_printk(KERN_WARNING "chip busy.\n");
  29         return -EBUSY;
  30 }
  31
  32 static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
  33 {
  34         snd_ad1816a_busy_wait(chip);
  35         return inb(AD1816A_REG(reg));
  36 }
  37
  38 static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
  39                             unsigned char value)
  40 {
  41         snd_ad1816a_busy_wait(chip);
  42         outb(value, AD1816A_REG(reg));
  43 }
  44
  45 static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
  46                                  unsigned char mask, unsigned char value)
  47 {
  48         snd_ad1816a_out(chip, reg,
  49                 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
  50 }
  51
  52 static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
  53 {
  54         snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  55         return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
  56                 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
  57 }
  58
  59 static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
  60                               unsigned short value)
  61 {
  62         snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  63         snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
  64         snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
  65 }
  66
  67 static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
  68                                    unsigned short mask, unsigned short value)
  69 {
  70         snd_ad1816a_write(chip, reg,
  71                 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
  72 }
  73
  74
  75 static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
  76                                             snd_pcm_format_t format,
  77                                             int channels)
  78 {
  79         unsigned char retval = AD1816A_FMT_LINEAR_8;
  80
  81         switch (format) {
  82         case SNDRV_PCM_FORMAT_MU_LAW:
  83                 retval = AD1816A_FMT_ULAW_8;
  84                 break;
  85         case SNDRV_PCM_FORMAT_A_LAW:
  86                 retval = AD1816A_FMT_ALAW_8;
  87                 break;
  88         case SNDRV_PCM_FORMAT_S16_LE:
  89                 retval = AD1816A_FMT_LINEAR_16_LIT;
  90                 break;
  91         case SNDRV_PCM_FORMAT_S16_BE:
  92                 retval = AD1816A_FMT_LINEAR_16_BIG;
  93         }
  94         return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
  95 }
  96
  97 static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
  98 {
  99         unsigned long flags;
 100
 101         spin_lock_irqsave(&chip->lock, flags);
 102
 103         if (chip->mode & mode) {
 104                 spin_unlock_irqrestore(&chip->lock, flags);
 105                 return -EAGAIN;
 106         }
 107
 108         switch ((mode &= AD1816A_MODE_OPEN)) {
 109         case AD1816A_MODE_PLAYBACK:
 110                 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
 111                         AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
 112                 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 113                         AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
 114                 break;
 115         case AD1816A_MODE_CAPTURE:
 116                 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
 117                         AD1816A_CAPTURE_IRQ_PENDING, 0x00);
 118                 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 119                         AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
 120                 break;
 121         case AD1816A_MODE_TIMER:
 122                 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
 123                         AD1816A_TIMER_IRQ_PENDING, 0x00);
 124                 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 125                         AD1816A_TIMER_IRQ_ENABLE, 0xffff);
 126         }
 127         chip->mode |= mode;
 128
 129         spin_unlock_irqrestore(&chip->lock, flags);
 130         return 0;
 131 }
 132
 133 static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
 134 {
 135         unsigned long flags;
 136
 137         spin_lock_irqsave(&chip->lock, flags);
 138
 139         switch ((mode &= AD1816A_MODE_OPEN)) {
 140         case AD1816A_MODE_PLAYBACK:
 141                 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
 142                         AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
 143                 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 144                         AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
 145                 break;
 146         case AD1816A_MODE_CAPTURE:
 147                 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
 148                         AD1816A_CAPTURE_IRQ_PENDING, 0x00);
 149                 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 150                         AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
 151                 break;
 152         case AD1816A_MODE_TIMER:
 153                 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
 154                         AD1816A_TIMER_IRQ_PENDING, 0x00);
 155                 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 156                         AD1816A_TIMER_IRQ_ENABLE, 0x0000);
 157         }
 158         if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN))
 159                 chip->mode = 0;
 160
 161         spin_unlock_irqrestore(&chip->lock, flags);
 162 }
 163
 164
 165 static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
 166                                int channel, int cmd, int iscapture)
 167 {
 168         int error = 0;
 169
 170         switch (cmd) {
 171         case SNDRV_PCM_TRIGGER_START:
 172         case SNDRV_PCM_TRIGGER_STOP:
 173                 spin_lock(&chip->lock);
 174                 cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
 175                 /* if (what & AD1816A_PLAYBACK_ENABLE) */
 176                 /* That is not valid, because playback and capture enable
 177                  * are the same bit pattern, just to different addresses
 178                  */
 179                 if (! iscapture)
 180                         snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
 181                                 AD1816A_PLAYBACK_ENABLE, cmd);
 182                 else
 183                         snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
 184                                 AD1816A_CAPTURE_ENABLE, cmd);
 185                 spin_unlock(&chip->lock);
 186                 break;
 187         default:
 188                 snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what);
 189                 error = -EINVAL;
 190         }
 191
 192         return error;
 193 }
 194
 195 static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
 196 {
 197         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 198         return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
 199                                    SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
 200 }
 201
 202 static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
 203 {
 204         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 205         return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
 206                                    SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
 207 }
 208
 209 static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
 210 {
 211         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 212         unsigned long flags;
 213         struct snd_pcm_runtime *runtime = substream->runtime;
 214         unsigned int size, rate;
 215
 216         spin_lock_irqsave(&chip->lock, flags);
 217
 218         chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
 219         snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
 220                 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
 221
 222         snd_dma_program(chip->dma1, runtime->dma_addr, size,
 223                         DMA_MODE_WRITE | DMA_AUTOINIT);
 224
 225         rate = runtime->rate;
 226         if (chip->clock_freq)
 227                 rate = (rate * 33000) / chip->clock_freq;
 228         snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
 229         snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
 230                 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
 231                 snd_ad1816a_get_format(chip, runtime->format,
 232                         runtime->channels));
 233
 234         snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
 235                 snd_pcm_lib_period_bytes(substream) / 4 - 1);
 236
 237         spin_unlock_irqrestore(&chip->lock, flags);
 238         return 0;
 239 }
 240
 241 static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
 242 {
 243         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 244         unsigned long flags;
 245         struct snd_pcm_runtime *runtime = substream->runtime;
 246         unsigned int size, rate;
 247
 248         spin_lock_irqsave(&chip->lock, flags);
 249
 250         chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
 251         snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
 252                 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
 253
 254         snd_dma_program(chip->dma2, runtime->dma_addr, size,
 255                         DMA_MODE_READ | DMA_AUTOINIT);
 256
 257         rate = runtime->rate;
 258         if (chip->clock_freq)
 259                 rate = (rate * 33000) / chip->clock_freq;
 260         snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
 261         snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
 262                 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
 263                 snd_ad1816a_get_format(chip, runtime->format,
 264                         runtime->channels));
 265
 266         snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
 267                 snd_pcm_lib_period_bytes(substream) / 4 - 1);
 268
 269         spin_unlock_irqrestore(&chip->lock, flags);
 270         return 0;
 271 }
 272
 273
 274 static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
 275 {
 276         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 277         size_t ptr;
 278         if (!(chip->mode & AD1816A_MODE_PLAYBACK))
 279                 return 0;
 280         ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
 281         return bytes_to_frames(substream->runtime, ptr);
 282 }
 283
 284 static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
 285 {
 286         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 287         size_t ptr;
 288         if (!(chip->mode & AD1816A_MODE_CAPTURE))
 289                 return 0;
 290         ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
 291         return bytes_to_frames(substream->runtime, ptr);
 292 }
 293
 294
 295 static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
 296 {
 297         struct snd_ad1816a *chip = dev_id;
 298         unsigned char status;
 299
 300         spin_lock(&chip->lock);
 301         status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
 302         spin_unlock(&chip->lock);
 303
 304         if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
 305                 snd_pcm_period_elapsed(chip->playback_substream);
 306
 307         if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
 308                 snd_pcm_period_elapsed(chip->capture_substream);
 309
 310         if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
 311                 snd_timer_interrupt(chip->timer, chip->timer->sticks);
 312
 313         spin_lock(&chip->lock);
 314         snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
 315         spin_unlock(&chip->lock);
 316         return IRQ_HANDLED;
 317 }
 318
 319
 320 static const struct snd_pcm_hardware snd_ad1816a_playback = {
 321         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 322                                  SNDRV_PCM_INFO_MMAP_VALID),
 323         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
 324                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
 325                                  SNDRV_PCM_FMTBIT_S16_BE),
 326         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
 327         .rate_min =             4000,
 328         .rate_max =             55200,
 329         .channels_min =         1,
 330         .channels_max =         2,
 331         .buffer_bytes_max =     (128*1024),
 332         .period_bytes_min =     64,
 333         .period_bytes_max =     (128*1024),
 334         .periods_min =          1,
 335         .periods_max =          1024,
 336         .fifo_size =            0,
 337 };
 338
 339 static const struct snd_pcm_hardware snd_ad1816a_capture = {
 340         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 341                                  SNDRV_PCM_INFO_MMAP_VALID),
 342         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
 343                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
 344                                  SNDRV_PCM_FMTBIT_S16_BE),
 345         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
 346         .rate_min =             4000,
 347         .rate_max =             55200,
 348         .channels_min =         1,
 349         .channels_max =         2,
 350         .buffer_bytes_max =     (128*1024),
 351         .period_bytes_min =     64,
 352         .period_bytes_max =     (128*1024),
 353         .periods_min =          1,
 354         .periods_max =          1024,
 355         .fifo_size =            0,
 356 };
 357
 358 static int snd_ad1816a_timer_close(struct snd_timer *timer)
 359 {
 360         struct snd_ad1816a *chip = snd_timer_chip(timer);
 361         snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
 362         return 0;
 363 }
 364
 365 static int snd_ad1816a_timer_open(struct snd_timer *timer)
 366 {
 367         struct snd_ad1816a *chip = snd_timer_chip(timer);
 368         snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
 369         return 0;
 370 }
 371
 372 static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
 373 {
 374         if (snd_BUG_ON(!timer))
 375                 return 0;
 376
 377         return 10000;
 378 }
 379
 380 static int snd_ad1816a_timer_start(struct snd_timer *timer)
 381 {
 382         unsigned short bits;
 383         unsigned long flags;
 384         struct snd_ad1816a *chip = snd_timer_chip(timer);
 385         spin_lock_irqsave(&chip->lock, flags);
 386         bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
 387
 388         if (!(bits & AD1816A_TIMER_ENABLE)) {
 389                 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
 390                         timer->sticks & 0xffff);
 391
 392                 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 393                         AD1816A_TIMER_ENABLE, 0xffff);
 394         }
 395         spin_unlock_irqrestore(&chip->lock, flags);
 396         return 0;
 397 }
 398
 399 static int snd_ad1816a_timer_stop(struct snd_timer *timer)
 400 {
 401         unsigned long flags;
 402         struct snd_ad1816a *chip = snd_timer_chip(timer);
 403         spin_lock_irqsave(&chip->lock, flags);
 404
 405         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
 406                 AD1816A_TIMER_ENABLE, 0x0000);
 407
 408         spin_unlock_irqrestore(&chip->lock, flags);
 409         return 0;
 410 }
 411
 412 static const struct snd_timer_hardware snd_ad1816a_timer_table = {
 413         .flags =        SNDRV_TIMER_HW_AUTO,
 414         .resolution =   10000,
 415         .ticks =        65535,
 416         .open =         snd_ad1816a_timer_open,
 417         .close =        snd_ad1816a_timer_close,
 418         .c_resolution = snd_ad1816a_timer_resolution,
 419         .start =        snd_ad1816a_timer_start,
 420         .stop =         snd_ad1816a_timer_stop,
 421 };
 422
 423 static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
 424 {
 425         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 426         struct snd_pcm_runtime *runtime = substream->runtime;
 427         int error;
 428
 429         if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0)
 430                 return error;
 431         runtime->hw = snd_ad1816a_playback;
 432         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
 433         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
 434         chip->playback_substream = substream;
 435         return 0;
 436 }
 437
 438 static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
 439 {
 440         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 441         struct snd_pcm_runtime *runtime = substream->runtime;
 442         int error;
 443
 444         if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0)
 445                 return error;
 446         runtime->hw = snd_ad1816a_capture;
 447         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
 448         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
 449         chip->capture_substream = substream;
 450         return 0;
 451 }
 452
 453 static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
 454 {
 455         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 456
 457         chip->playback_substream = NULL;
 458         snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
 459         return 0;
 460 }
 461
 462 static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
 463 {
 464         struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
 465
 466         chip->capture_substream = NULL;
 467         snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
 468         return 0;
 469 }
 470
 471
 472 static void snd_ad1816a_init(struct snd_ad1816a *chip)
 473 {
 474         unsigned long flags;
 475
 476         spin_lock_irqsave(&chip->lock, flags);
 477
 478         snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
 479         snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
 480                 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
 481         snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
 482                 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
 483         snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
 484         snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
 485                 AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
 486         snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
 487         snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
 488
 489         spin_unlock_irqrestore(&chip->lock, flags);
 490 }
 491
 492 #ifdef CONFIG_PM
 493 void snd_ad1816a_suspend(struct snd_ad1816a *chip)
 494 {
 495         int reg;
 496         unsigned long flags;
 497
 498         spin_lock_irqsave(&chip->lock, flags);
 499         for (reg = 0; reg < 48; reg++)
 500                 chip->image[reg] = snd_ad1816a_read(chip, reg);
 501         spin_unlock_irqrestore(&chip->lock, flags);
 502 }
 503
 504 void snd_ad1816a_resume(struct snd_ad1816a *chip)
 505 {
 506         int reg;
 507         unsigned long flags;
 508
 509         snd_ad1816a_init(chip);
 510         spin_lock_irqsave(&chip->lock, flags);
 511         for (reg = 0; reg < 48; reg++)
 512                 snd_ad1816a_write(chip, reg, chip->image[reg]);
 513         spin_unlock_irqrestore(&chip->lock, flags);
 514 }
 515 #endif
 516
 517 static int snd_ad1816a_probe(struct snd_ad1816a *chip)
 518 {
 519         unsigned long flags;
 520
 521         spin_lock_irqsave(&chip->lock, flags);
 522
 523         switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
 524         case 0:
 525                 chip->hardware = AD1816A_HW_AD1815;
 526                 break;
 527         case 1:
 528                 chip->hardware = AD1816A_HW_AD18MAX10;
 529                 break;
 530         case 3:
 531                 chip->hardware = AD1816A_HW_AD1816A;
 532                 break;
 533         default:
 534                 chip->hardware = AD1816A_HW_AUTO;
 535         }
 536
 537         spin_unlock_irqrestore(&chip->lock, flags);
 538         return 0;
 539 }
 540
 541 static int snd_ad1816a_free(struct snd_ad1816a *chip)
 542 {
 543         release_and_free_resource(chip->res_port);
 544         if (chip->irq >= 0)
 545                 free_irq(chip->irq, (void *) chip);
 546         if (chip->dma1 >= 0) {
 547                 snd_dma_disable(chip->dma1);
 548                 free_dma(chip->dma1);
 549         }
 550         if (chip->dma2 >= 0) {
 551                 snd_dma_disable(chip->dma2);
 552                 free_dma(chip->dma2);
 553         }
 554         return 0;
 555 }
 556
 557 static int snd_ad1816a_dev_free(struct snd_device *device)
 558 {
 559         struct snd_ad1816a *chip = device->device_data;
 560         return snd_ad1816a_free(chip);
 561 }
 562
 563 static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
 564 {
 565         switch (chip->hardware) {
 566         case AD1816A_HW_AD1816A: return "AD1816A";
 567         case AD1816A_HW_AD1815: return "AD1815";
 568         case AD1816A_HW_AD18MAX10: return "AD18max10";
 569         default:
 570                 snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n",
 571                         chip->version, chip->hardware);
 572                 return "AD1816A - unknown";
 573         }
 574 }
 575
 576 int snd_ad1816a_create(struct snd_card *card,
 577                        unsigned long port, int irq, int dma1, int dma2,
 578                        struct snd_ad1816a *chip)
 579 {
 580         static const struct snd_device_ops ops = {
 581                 .dev_free =     snd_ad1816a_dev_free,
 582         };
 583         int error;
 584
 585         chip->irq = -1;
 586         chip->dma1 = -1;
 587         chip->dma2 = -1;
 588
 589         if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) {
 590                 snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
 591                 snd_ad1816a_free(chip);
 592                 return -EBUSY;
 593         }
 594         if (request_irq(irq, snd_ad1816a_interrupt, 0, "AD1816A", (void *) chip)) {
 595                 snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
 596                 snd_ad1816a_free(chip);
 597                 return -EBUSY;
 598         }
 599         chip->irq = irq;
 600         card->sync_irq = chip->irq;
 601         if (request_dma(dma1, "AD1816A - 1")) {
 602                 snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
 603                 snd_ad1816a_free(chip);
 604                 return -EBUSY;
 605         }
 606         chip->dma1 = dma1;
 607         if (request_dma(dma2, "AD1816A - 2")) {
 608                 snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
 609                 snd_ad1816a_free(chip);
 610                 return -EBUSY;
 611         }
 612         chip->dma2 = dma2;
 613
 614         chip->card = card;
 615         chip->port = port;
 616         spin_lock_init(&chip->lock);
 617
 618         if ((error = snd_ad1816a_probe(chip))) {
 619                 snd_ad1816a_free(chip);
 620                 return error;
 621         }
 622
 623         snd_ad1816a_init(chip);
 624
 625         /* Register device */
 626         if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
 627                 snd_ad1816a_free(chip);
 628                 return error;
 629         }
 630
 631         return 0;
 632 }
 633
 634 static const struct snd_pcm_ops snd_ad1816a_playback_ops = {
 635         .open =         snd_ad1816a_playback_open,
 636         .close =        snd_ad1816a_playback_close,
 637         .prepare =      snd_ad1816a_playback_prepare,
 638         .trigger =      snd_ad1816a_playback_trigger,
 639         .pointer =      snd_ad1816a_playback_pointer,
 640 };
 641
 642 static const struct snd_pcm_ops snd_ad1816a_capture_ops = {
 643         .open =         snd_ad1816a_capture_open,
 644         .close =        snd_ad1816a_capture_close,
 645         .prepare =      snd_ad1816a_capture_prepare,
 646         .trigger =      snd_ad1816a_capture_trigger,
 647         .pointer =      snd_ad1816a_capture_pointer,
 648 };
 649
 650 int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device)
 651 {
 652         int error;
 653         struct snd_pcm *pcm;
 654
 655         if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm)))
 656                 return error;
 657
 658         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
 659         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
 660
 661         pcm->private_data = chip;
 662         pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
 663
 664         strcpy(pcm->name, snd_ad1816a_chip_id(chip));
 665         snd_ad1816a_init(chip);
 666
 667         snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, chip->card->dev,
 668                                        64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
 669
 670         chip->pcm = pcm;
 671         return 0;
 672 }
 673
 674 int snd_ad1816a_timer(struct snd_ad1816a *chip, int device)
 675 {
 676         struct snd_timer *timer;
 677         struct snd_timer_id tid;
 678         int error;
 679
 680         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
 681         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
 682         tid.card = chip->card->number;
 683         tid.device = device;
 684         tid.subdevice = 0;
 685         if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0)
 686                 return error;
 687         strcpy(timer->name, snd_ad1816a_chip_id(chip));
 688         timer->private_data = chip;
 689         chip->timer = timer;
 690         timer->hw = snd_ad1816a_timer_table;
 691         return 0;
 692 }
 693
 694 /*
 695  *
 696  */
 697
 698 static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 699 {
 700         static const char * const texts[8] = {
 701                 "Line", "Mix", "CD", "Synth", "Video",
 702                 "Mic", "Phone",
 703         };
 704
 705         return snd_ctl_enum_info(uinfo, 2, 7, texts);
 706 }
 707
 708 static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 709 {
 710         struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
 711         unsigned long flags;
 712         unsigned short val;
 713
 714         spin_lock_irqsave(&chip->lock, flags);
 715         val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
 716         spin_unlock_irqrestore(&chip->lock, flags);
 717         ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
 718         ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
 719         return 0;
 720 }
 721
 722 static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 723 {
 724         struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
 725         unsigned long flags;
 726         unsigned short val;
 727         int change;
 728
 729         if (ucontrol->value.enumerated.item[0] > 6 ||
 730             ucontrol->value.enumerated.item[1] > 6)
 731                 return -EINVAL;
 732         val = (ucontrol->value.enumerated.item[0] << 12) |
 733               (ucontrol->value.enumerated.item[1] << 4);
 734         spin_lock_irqsave(&chip->lock, flags);
 735         change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
 736         snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
 737         spin_unlock_irqrestore(&chip->lock, flags);
 738         return change;
 739 }
 740
 741 #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv)       \
 742 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
 743   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
 744   .name = xname, .info = snd_ad1816a_info_single, \
 745   .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
 746   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
 747   .tlv = { .p = (xtlv) } }
 748 #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
 749 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
 750   .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
 751   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
 752
 753 static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 754 {
 755         int mask = (kcontrol->private_value >> 16) & 0xff;
 756
 757         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 758         uinfo->count = 1;
 759         uinfo->value.integer.min = 0;
 760         uinfo->value.integer.max = mask;
 761         return 0;
 762 }
 763
 764 static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 765 {
 766         struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
 767         unsigned long flags;
 768         int reg = kcontrol->private_value & 0xff;
 769         int shift = (kcontrol->private_value >> 8) & 0xff;
 770         int mask = (kcontrol->private_value >> 16) & 0xff;
 771         int invert = (kcontrol->private_value >> 24) & 0xff;
 772
 773         spin_lock_irqsave(&chip->lock, flags);
 774         ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
 775         spin_unlock_irqrestore(&chip->lock, flags);
 776         if (invert)
 777                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
 778         return 0;
 779 }
 780
 781 static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 782 {
 783         struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
 784         unsigned long flags;
 785         int reg = kcontrol->private_value & 0xff;
 786         int shift = (kcontrol->private_value >> 8) & 0xff;
 787         int mask = (kcontrol->private_value >> 16) & 0xff;
 788         int invert = (kcontrol->private_value >> 24) & 0xff;
 789         int change;
 790         unsigned short old_val, val;
 791
 792         val = (ucontrol->value.integer.value[0] & mask);
 793         if (invert)
 794                 val = mask - val;
 795         val <<= shift;
 796         spin_lock_irqsave(&chip->lock, flags);
 797         old_val = snd_ad1816a_read(chip, reg);
 798         val = (old_val & ~(mask << shift)) | val;
 799         change = val != old_val;
 800         snd_ad1816a_write(chip, reg, val);
 801         spin_unlock_irqrestore(&chip->lock, flags);
 802         return change;
 803 }
 804
 805 #define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
 806 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
 807   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
 808   .name = xname, .info = snd_ad1816a_info_double,               \
 809   .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
 810   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
 811   .tlv = { .p = (xtlv) } }
 812
 813 #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
 814 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
 815   .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
 816   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
 817
 818 static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 819 {
 820         int mask = (kcontrol->private_value >> 16) & 0xff;
 821
 822         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 823         uinfo->count = 2;
 824         uinfo->value.integer.min = 0;
 825         uinfo->value.integer.max = mask;
 826         return 0;
 827 }
 828
 829 static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 830 {
 831         struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
 832         unsigned long flags;
 833         int reg = kcontrol->private_value & 0xff;
 834         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
 835         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
 836         int mask = (kcontrol->private_value >> 16) & 0xff;
 837         int invert = (kcontrol->private_value >> 24) & 0xff;
 838         unsigned short val;
 839
 840         spin_lock_irqsave(&chip->lock, flags);
 841         val = snd_ad1816a_read(chip, reg);
 842         ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
 843         ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
 844         spin_unlock_irqrestore(&chip->lock, flags);
 845         if (invert) {
 846                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
 847                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
 848         }
 849         return 0;
 850 }
 851
 852 static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 853 {
 854         struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
 855         unsigned long flags;
 856         int reg = kcontrol->private_value & 0xff;
 857         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
 858         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
 859         int mask = (kcontrol->private_value >> 16) & 0xff;
 860         int invert = (kcontrol->private_value >> 24) & 0xff;
 861         int change;
 862         unsigned short old_val, val1, val2;
 863
 864         val1 = ucontrol->value.integer.value[0] & mask;
 865         val2 = ucontrol->value.integer.value[1] & mask;
 866         if (invert) {
 867                 val1 = mask - val1;
 868                 val2 = mask - val2;
 869         }
 870         val1 <<= shift_left;
 871         val2 <<= shift_right;
 872         spin_lock_irqsave(&chip->lock, flags);
 873         old_val = snd_ad1816a_read(chip, reg);
 874         val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
 875         change = val1 != old_val;
 876         snd_ad1816a_write(chip, reg, val1);
 877         spin_unlock_irqrestore(&chip->lock, flags);
 878         return change;
 879 }
 880
 881 static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
 882 static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
 883 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
 884 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
 885 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
 886
 887 static const struct snd_kcontrol_new snd_ad1816a_controls[] = {
 888 AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
 889 AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
 890                    db_scale_5bit),
 891 AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
 892 AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
 893                    db_scale_6bit),
 894 AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
 895 AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
 896                    db_scale_5bit_12db_max),
 897 AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
 898 AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
 899                    db_scale_5bit_12db_max),
 900 AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
 901 AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
 902                    db_scale_5bit_12db_max),
 903 AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
 904 AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
 905                    db_scale_6bit),
 906 AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
 907 AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
 908                    db_scale_5bit_12db_max),
 909 AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
 910 AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
 911 AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
 912                    db_scale_5bit_12db_max),
 913 AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
 914 AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
 915                    db_scale_4bit),
 916 AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
 917 AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
 918                    db_scale_5bit),
 919 {
 920         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
 921         .name = "Capture Source",
 922         .info = snd_ad1816a_info_mux,
 923         .get = snd_ad1816a_get_mux,
 924         .put = snd_ad1816a_put_mux,
 925 },
 926 AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
 927 AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
 928                    db_scale_rec_gain),
 929 AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
 930 AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
 931 };
 932
 933 int snd_ad1816a_mixer(struct snd_ad1816a *chip)
 934 {
 935         struct snd_card *card;
 936         unsigned int idx;
 937         int err;
 938
 939         if (snd_BUG_ON(!chip || !chip->card))
 940                 return -EINVAL;
 941
 942         card = chip->card;
 943
 944         strcpy(card->mixername, snd_ad1816a_chip_id(chip));
 945
 946         for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
 947                 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0)
 948                         return err;
 949         }
 950         return 0;
 951 }