1 Integrated Flash Controller
5 - compatible : should contain "fsl,ifc". The version of the integrated
6 flash controller can be found in the IFC_REV register at
9 - #address-cells : Should be either two or three. The first cell is the
10 chipselect number, and the remaining cells are the
11 offset into the chipselect.
12 - #size-cells : Either one or two, depending on how large each chipselect
14 - reg : Offset and length of the register set for the device
15 - interrupts: IFC may have one or two interrupts. If two interrupt
16 specifiers are present, the first is the "common"
17 interrupt (CM_EVTER_STAT), and the second is the NAND
18 interrupt (NAND_EVTER_STAT). If there is only one,
19 that interrupt reports both types of event.
22 - ranges : Each range corresponds to a single chipselect, and covers
23 the entire access window as configured.
25 Child device nodes describe the devices connected to IFC such as NOR (e.g.
26 cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
27 like FPGAs, CPLDs, etc.
32 compatible = "fsl,ifc", "simple-bus";
35 reg = <0x0 0xffe1e000 0 0x2000>;
36 interrupts = <16 2 19 2>;
38 /* NOR, NAND Flashes and CPLD on board */
39 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
40 0x1 0x0 0x0 0xffa00000 0x00010000
41 0x3 0x0 0x0 0xffb00000 0x00020000>;
46 compatible = "cfi-flash";
47 reg = <0x0 0x0 0x2000000>;
52 /* 32MB for user data */
53 reg = <0x0 0x02000000>;
61 compatible = "fsl,ifc-nand";
62 reg = <0x1 0x0 0x10000>;
65 /* This location must not be altered */
66 /* 1MB for u-boot Bootloader Image */
67 reg = <0x0 0x00100000>;
68 label = "NAND U-Boot Image";
76 compatible = "fsl,p1010rdb-cpld";
77 reg = <0x3 0x0 0x000001f>;