1 Davinci SPI controller device bindings
4 - #address-cells: number of cells required to define a chip select
5 address on the SPI bus. Should be set to 1.
6 - #size-cells: should be zero.
8 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
9 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
10 - reg: Offset and length of SPI controller register space
11 - num-cs: Number of chip selects
12 - ti,davinci-spi-intr-line: interrupt line used to connect the SPI
13 IP to the interrupt controller within the SoC. Possible values
14 are 0 and 1. Manual says one of the two possible interrupt
15 lines can be tied to the interrupt controller. Set this
16 based on a specifc SoC configuration.
17 - interrupts: interrupt number mapped to CPU.
18 - clocks: spi clk phandle
20 Example of a NOR flash slave device (n25q032) connected to DaVinci
21 SPI controller device over the SPI bus.
26 compatible = "ti,dm6446-spi";
27 reg = <0x20BF0000 0x1000>;
29 ti,davinci-spi-intr-line = <0>;
36 compatible = "st,m25p32";
37 spi-max-frequency = <25000000>;
48 reg = <0x80000 0x380000>;