arch/arm/boot/dts/dove.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 / {
   4         compatible = "marvell,dove";
   5         model = "Marvell Armada 88AP510 SoC";
   6
   7         aliases {
   8                 gpio0 = &gpio0;
   9                 gpio1 = &gpio1;
  10                 gpio2 = &gpio2;
  11         };
  12
  13         soc@f1000000 {
  14                 compatible = "simple-bus";
  15                 #address-cells = <1>;
  16                 #size-cells = <1>;
  17                 interrupt-parent = <&intc>;
  18
  19                 ranges = <0xc8000000 0xc8000000 0x0100000   /* CESA SRAM   1M */
  20                           0xe0000000 0xe0000000 0x8000000   /* PCIe0 Mem 128M */
  21                           0xe8000000 0xe8000000 0x8000000   /* PCIe1 Mem 128M */
  22                           0xf0000000 0xf0000000 0x0100000   /* ScratchPad  1M */
  23                           0x00000000 0xf1000000 0x1000000   /* SB/NB regs 16M */
  24                           0xf2000000 0xf2000000 0x0100000   /* PCIe0 I/O   1M */
  25                           0xf2100000 0xf2100000 0x0100000   /* PCIe0 I/O   1M */
  26                           0xf8000000 0xf8000000 0x8000000>; /* BootROM   128M */
  27
  28                 l2: l2-cache {
  29                         compatible = "marvell,tauros2-cache";
  30                         marvell,tauros2-cache-features = <0>;
  31                 };
  32
  33                 intc: interrupt-controller {
  34                         compatible = "marvell,orion-intc";
  35                         interrupt-controller;
  36                         #interrupt-cells = <1>;
  37                         reg = <0x20204 0x04>, <0x20214 0x04>;
  38                 };
  39
  40                 core_clk: core-clocks@d0214 {
  41                         compatible = "marvell,dove-core-clock";
  42                         reg = <0xd0214 0x4>;
  43                         #clock-cells = <1>;
  44                 };
  45
  46                 gate_clk: clock-gating-control@d0038 {
  47                         compatible = "marvell,dove-gating-clock";
  48                         reg = <0xd0038 0x4>;
  49                         clocks = <&core_clk 0>;
  50                         #clock-cells = <1>;
  51                 };
  52
  53                 thermal: thermal@d001c {
  54                         compatible = "marvell,dove-thermal";
  55                         reg = <0xd001c 0x0c>, <0xd005c 0x08>;
  56                 };
  57
  58                 uart0: serial@12000 {
  59                         compatible = "ns16550a";
  60                         reg = <0x12000 0x100>;
  61                         reg-shift = <2>;
  62                         interrupts = <7>;
  63                         clocks = <&core_clk 0>;
  64                         status = "disabled";
  65                 };
  66
  67                 uart1: serial@12100 {
  68                         compatible = "ns16550a";
  69                         reg = <0x12100 0x100>;
  70                         reg-shift = <2>;
  71                         interrupts = <8>;
  72                         clocks = <&core_clk 0>;
  73                         status = "disabled";
  74                 };
  75
  76                 uart2: serial@12200 {
  77                         compatible = "ns16550a";
  78                         reg = <0x12000 0x100>;
  79                         reg-shift = <2>;
  80                         interrupts = <9>;
  81                         clocks = <&core_clk 0>;
  82                         status = "disabled";
  83                 };
  84
  85                 uart3: serial@12300 {
  86                         compatible = "ns16550a";
  87                         reg = <0x12100 0x100>;
  88                         reg-shift = <2>;
  89                         interrupts = <10>;
  90                         clocks = <&core_clk 0>;
  91                         status = "disabled";
  92                 };
  93
  94                 gpio0: gpio@d0400 {
  95                         compatible = "marvell,orion-gpio";
  96                         #gpio-cells = <2>;
  97                         gpio-controller;
  98                         reg = <0xd0400 0x20>;
  99                         ngpios = <32>;
 100                         interrupt-controller;
 101                         #interrupt-cells = <2>;
 102                         interrupts = <12>, <13>, <14>, <60>;
 103                 };
 104
 105                 gpio1: gpio@d0420 {
 106                         compatible = "marvell,orion-gpio";
 107                         #gpio-cells = <2>;
 108                         gpio-controller;
 109                         reg = <0xd0420 0x20>;
 110                         ngpios = <32>;
 111                         interrupt-controller;
 112                         #interrupt-cells = <2>;
 113                         interrupts = <61>;
 114                 };
 115
 116                 gpio2: gpio@e8400 {
 117                         compatible = "marvell,orion-gpio";
 118                         #gpio-cells = <2>;
 119                         gpio-controller;
 120                         reg = <0xe8400 0x0c>;
 121                         ngpios = <8>;
 122                 };
 123
 124                 pinctrl: pinctrl@d0200 {
 125                         compatible = "marvell,dove-pinctrl";
 126                         reg = <0xd0200 0x10>;
 127                         clocks = <&gate_clk 22>;
 128                 };
 129
 130                 spi0: spi@10600 {
 131                         compatible = "marvell,orion-spi";
 132                         #address-cells = <1>;
 133                         #size-cells = <0>;
 134                         cell-index = <0>;
 135                         interrupts = <6>;
 136                         reg = <0x10600 0x28>;
 137                         clocks = <&core_clk 0>;
 138                         status = "disabled";
 139                 };
 140
 141                 spi1: spi@14600 {
 142                         compatible = "marvell,orion-spi";
 143                         #address-cells = <1>;
 144                         #size-cells = <0>;
 145                         cell-index = <1>;
 146                         interrupts = <5>;
 147                         reg = <0x14600 0x28>;
 148                         clocks = <&core_clk 0>;
 149                         status = "disabled";
 150                 };
 151
 152                 i2c0: i2c@11000 {
 153                         compatible = "marvell,mv64xxx-i2c";
 154                         reg = <0x11000 0x20>;
 155                         #address-cells = <1>;
 156                         #size-cells = <0>;
 157                         interrupts = <11>;
 158                         clock-frequency = <400000>;
 159                         timeout-ms = <1000>;
 160                         clocks = <&core_clk 0>;
 161                         status = "disabled";
 162                 };
 163
 164                 ehci0: usb-host@50000 {
 165                         compatible = "marvell,orion-ehci";
 166                         reg = <0x50000 0x1000>;
 167                         interrupts = <24>;
 168                         clocks = <&gate_clk 0>;
 169                         status = "okay";
 170                 };
 171
 172                 ehci1: usb-host@51000 {
 173                         compatible = "marvell,orion-ehci";
 174                         reg = <0x51000 0x1000>;
 175                         interrupts = <25>;
 176                         clocks = <&gate_clk 1>;
 177                         status = "okay";
 178                 };
 179
 180                 sdio0: sdio@92000 {
 181                         compatible = "marvell,dove-sdhci";
 182                         reg = <0x92000 0x100>;
 183                         interrupts = <35>, <37>;
 184                         clocks = <&gate_clk 8>;
 185                         status = "disabled";
 186                 };
 187
 188                 sdio1: sdio@90000 {
 189                         compatible = "marvell,dove-sdhci";
 190                         reg = <0x90000 0x100>;
 191                         interrupts = <36>, <38>;
 192                         clocks = <&gate_clk 9>;
 193                         status = "disabled";
 194                 };
 195
 196                 sata0: sata@a0000 {
 197                         compatible = "marvell,orion-sata";
 198                         reg = <0xa0000 0x2400>;
 199                         interrupts = <62>;
 200                         clocks = <&gate_clk 3>;
 201                         nr-ports = <1>;
 202                         status = "disabled";
 203                 };
 204
 205                 rtc@d8500 {
 206                         compatible = "marvell,orion-rtc";
 207                         reg = <0xd8500 0x20>;
 208                 };
 209
 210                 crypto: crypto@30000 {
 211                         compatible = "marvell,orion-crypto";
 212                         reg = <0x30000 0x10000>,
 213                               <0xc8000000 0x800>;
 214                         reg-names = "regs", "sram";
 215                         interrupts = <31>;
 216                         clocks = <&gate_clk 15>;
 217                         status = "okay";
 218                 };
 219
 220                 xor0: dma-engine@60800 {
 221                         compatible = "marvell,orion-xor";
 222                         reg = <0x60800 0x100
 223                                0x60a00 0x100>;
 224                         clocks = <&gate_clk 23>;
 225                         status = "okay";
 226
 227                         channel0 {
 228                                 interrupts = <39>;
 229                                 dmacap,memcpy;
 230                                 dmacap,xor;
 231                         };
 232
 233                         channel1 {
 234                                 interrupts = <40>;
 235                                 dmacap,memset;
 236                                 dmacap,memcpy;
 237                                 dmacap,xor;
 238                         };
 239                 };
 240
 241                 xor1: dma-engine@60900 {
 242                         compatible = "marvell,orion-xor";
 243                         reg = <0x60900 0x100
 244                                0x60b00 0x100>;
 245                         clocks = <&gate_clk 24>;
 246                         status = "okay";
 247
 248                         channel0 {
 249                                 interrupts = <42>;
 250                                 dmacap,memcpy;
 251                                 dmacap,xor;
 252                         };
 253
 254                         channel1 {
 255                                 interrupts = <43>;
 256                                 dmacap,memset;
 257                                 dmacap,memcpy;
 258                                 dmacap,xor;
 259                         };
 260                 };
 261         };
 262 };