| blob | 359694c7891803e23964394f0722cd89243e266e |
1 /*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
22 /include/ "skeleton.dtsi"
24 / {
25 interrupt-parent = <&gic>;
27 aliases {
28 spi0 = &spi_0;
29 spi1 = &spi_1;
30 spi2 = &spi_2;
31 i2c0 = &i2c_0;
32 i2c1 = &i2c_1;
33 i2c2 = &i2c_2;
34 i2c3 = &i2c_3;
35 i2c4 = &i2c_4;
36 i2c5 = &i2c_5;
37 i2c6 = &i2c_6;
38 i2c7 = &i2c_7;
39 };
41 chipid@10000000 {
42 compatible = "samsung,exynos4210-chipid";
43 reg = <0x10000000 0x100>;
44 };
46 pd_mfc: mfc-power-domain@10023C40 {
47 compatible = "samsung,exynos4210-pd";
48 reg = <0x10023C40 0x20>;
49 };
51 pd_g3d: g3d-power-domain@10023C60 {
52 compatible = "samsung,exynos4210-pd";
53 reg = <0x10023C60 0x20>;
54 };
56 pd_lcd0: lcd0-power-domain@10023C80 {
57 compatible = "samsung,exynos4210-pd";
58 reg = <0x10023C80 0x20>;
59 };
61 pd_tv: tv-power-domain@10023C20 {
62 compatible = "samsung,exynos4210-pd";
63 reg = <0x10023C20 0x20>;
64 };
66 pd_cam: cam-power-domain@10023C00 {
67 compatible = "samsung,exynos4210-pd";
68 reg = <0x10023C00 0x20>;
69 };
71 pd_gps: gps-power-domain@10023CE0 {
72 compatible = "samsung,exynos4210-pd";
73 reg = <0x10023CE0 0x20>;
74 };
76 gic:interrupt-controller@10490000 {
77 compatible = "arm,cortex-a9-gic";
78 #interrupt-cells = <3>;
79 interrupt-controller;
80 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
81 };
83 combiner:interrupt-controller@10440000 {
84 compatible = "samsung,exynos4210-combiner";
85 #interrupt-cells = <2>;
86 interrupt-controller;
87 reg = <0x10440000 0x1000>;
88 };
90 sys_reg: sysreg {
91 compatible = "samsung,exynos4-sysreg", "syscon";
92 reg = <0x10010000 0x400>;
93 };
95 watchdog@10060000 {
96 compatible = "samsung,s3c2410-wdt";
97 reg = <0x10060000 0x100>;
98 interrupts = <0 43 0>;
99 clocks = <&clock 345>;
100 clock-names = "watchdog";
101 status = "disabled";
102 };
104 rtc@10070000 {
105 compatible = "samsung,s3c6410-rtc";
106 reg = <0x10070000 0x100>;
107 interrupts = <0 44 0>, <0 45 0>;
108 clocks = <&clock 346>;
109 clock-names = "rtc";
110 status = "disabled";
111 };
113 keypad@100A0000 {
114 compatible = "samsung,s5pv210-keypad";
115 reg = <0x100A0000 0x100>;
116 interrupts = <0 109 0>;
117 clocks = <&clock 347>;
118 clock-names = "keypad";
119 status = "disabled";
120 };
122 sdhci@12510000 {
123 compatible = "samsung,exynos4210-sdhci";
124 reg = <0x12510000 0x100>;
125 interrupts = <0 73 0>;
126 clocks = <&clock 297>, <&clock 145>;
127 clock-names = "hsmmc", "mmc_busclk.2";
128 status = "disabled";
129 };
131 sdhci@12520000 {
132 compatible = "samsung,exynos4210-sdhci";
133 reg = <0x12520000 0x100>;
134 interrupts = <0 74 0>;
135 clocks = <&clock 298>, <&clock 146>;
136 clock-names = "hsmmc", "mmc_busclk.2";
137 status = "disabled";
138 };
140 sdhci@12530000 {
141 compatible = "samsung,exynos4210-sdhci";
142 reg = <0x12530000 0x100>;
143 interrupts = <0 75 0>;
144 clocks = <&clock 299>, <&clock 147>;
145 clock-names = "hsmmc", "mmc_busclk.2";
146 status = "disabled";
147 };
149 sdhci@12540000 {
150 compatible = "samsung,exynos4210-sdhci";
151 reg = <0x12540000 0x100>;
152 interrupts = <0 76 0>;
153 clocks = <&clock 300>, <&clock 148>;
154 clock-names = "hsmmc", "mmc_busclk.2";
155 status = "disabled";
156 };
158 mfc: codec@13400000 {
159 compatible = "samsung,mfc-v5";
160 reg = <0x13400000 0x10000>;
161 interrupts = <0 94 0>;
162 samsung,power-domain = <&pd_mfc>;
163 status = "disabled";
164 };
166 serial@13800000 {
167 compatible = "samsung,exynos4210-uart";
168 reg = <0x13800000 0x100>;
169 interrupts = <0 52 0>;
170 clocks = <&clock 312>, <&clock 151>;
171 clock-names = "uart", "clk_uart_baud0";
172 status = "disabled";
173 };
175 serial@13810000 {
176 compatible = "samsung,exynos4210-uart";
177 reg = <0x13810000 0x100>;
178 interrupts = <0 53 0>;
179 clocks = <&clock 313>, <&clock 152>;
180 clock-names = "uart", "clk_uart_baud0";
181 status = "disabled";
182 };
184 serial@13820000 {
185 compatible = "samsung,exynos4210-uart";
186 reg = <0x13820000 0x100>;
187 interrupts = <0 54 0>;
188 clocks = <&clock 314>, <&clock 153>;
189 clock-names = "uart", "clk_uart_baud0";
190 status = "disabled";
191 };
193 serial@13830000 {
194 compatible = "samsung,exynos4210-uart";
195 reg = <0x13830000 0x100>;
196 interrupts = <0 55 0>;
197 clocks = <&clock 315>, <&clock 154>;
198 clock-names = "uart", "clk_uart_baud0";
199 status = "disabled";
200 };
202 i2c_0: i2c@13860000 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "samsung,s3c2440-i2c";
206 reg = <0x13860000 0x100>;
207 interrupts = <0 58 0>;
208 clocks = <&clock 317>;
209 clock-names = "i2c";
210 pinctrl-names = "default";
211 pinctrl-0 = <&i2c0_bus>;
212 status = "disabled";
213 };
215 i2c_1: i2c@13870000 {
216 #address-cells = <1>;
217 #size-cells = <0>;
218 compatible = "samsung,s3c2440-i2c";
219 reg = <0x13870000 0x100>;
220 interrupts = <0 59 0>;
221 clocks = <&clock 318>;
222 clock-names = "i2c";
223 pinctrl-names = "default";
224 pinctrl-0 = <&i2c1_bus>;
225 status = "disabled";
226 };
228 i2c_2: i2c@13880000 {
229 #address-cells = <1>;
230 #size-cells = <0>;
231 compatible = "samsung,s3c2440-i2c";
232 reg = <0x13880000 0x100>;
233 interrupts = <0 60 0>;
234 clocks = <&clock 319>;
235 clock-names = "i2c";
236 status = "disabled";
237 };
239 i2c_3: i2c@13890000 {
240 #address-cells = <1>;
241 #size-cells = <0>;
242 compatible = "samsung,s3c2440-i2c";
243 reg = <0x13890000 0x100>;
244 interrupts = <0 61 0>;
245 clocks = <&clock 320>;
246 clock-names = "i2c";
247 status = "disabled";
248 };
250 i2c_4: i2c@138A0000 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "samsung,s3c2440-i2c";
254 reg = <0x138A0000 0x100>;
255 interrupts = <0 62 0>;
256 clocks = <&clock 321>;
257 clock-names = "i2c";
258 status = "disabled";
259 };
261 i2c_5: i2c@138B0000 {
262 #address-cells = <1>;
263 #size-cells = <0>;
264 compatible = "samsung,s3c2440-i2c";
265 reg = <0x138B0000 0x100>;
266 interrupts = <0 63 0>;
267 clocks = <&clock 322>;
268 clock-names = "i2c";
269 status = "disabled";
270 };
272 i2c_6: i2c@138C0000 {
273 #address-cells = <1>;
274 #size-cells = <0>;
275 compatible = "samsung,s3c2440-i2c";
276 reg = <0x138C0000 0x100>;
277 interrupts = <0 64 0>;
278 clocks = <&clock 323>;
279 clock-names = "i2c";
280 status = "disabled";
281 };
283 i2c_7: i2c@138D0000 {
284 #address-cells = <1>;
285 #size-cells = <0>;
286 compatible = "samsung,s3c2440-i2c";
287 reg = <0x138D0000 0x100>;
288 interrupts = <0 65 0>;
289 clocks = <&clock 324>;
290 clock-names = "i2c";
291 status = "disabled";
292 };
294 spi_0: spi@13920000 {
295 compatible = "samsung,exynos4210-spi";
296 reg = <0x13920000 0x100>;
297 interrupts = <0 66 0>;
298 tx-dma-channel = <&pdma0 7>; /* preliminary */
299 rx-dma-channel = <&pdma0 6>; /* preliminary */
300 #address-cells = <1>;
301 #size-cells = <0>;
302 clocks = <&clock 327>, <&clock 159>;
303 clock-names = "spi", "spi_busclk0";
304 pinctrl-names = "default";
305 pinctrl-0 = <&spi0_bus>;
306 status = "disabled";
307 };
309 spi_1: spi@13930000 {
310 compatible = "samsung,exynos4210-spi";
311 reg = <0x13930000 0x100>;
312 interrupts = <0 67 0>;
313 tx-dma-channel = <&pdma1 7>; /* preliminary */
314 rx-dma-channel = <&pdma1 6>; /* preliminary */
315 #address-cells = <1>;
316 #size-cells = <0>;
317 clocks = <&clock 328>, <&clock 160>;
318 clock-names = "spi", "spi_busclk0";
319 pinctrl-names = "default";
320 pinctrl-0 = <&spi1_bus>;
321 status = "disabled";
322 };
324 spi_2: spi@13940000 {
325 compatible = "samsung,exynos4210-spi";
326 reg = <0x13940000 0x100>;
327 interrupts = <0 68 0>;
328 tx-dma-channel = <&pdma0 9>; /* preliminary */
329 rx-dma-channel = <&pdma0 8>; /* preliminary */
330 #address-cells = <1>;
331 #size-cells = <0>;
332 clocks = <&clock 329>, <&clock 161>;
333 clock-names = "spi", "spi_busclk0";
334 pinctrl-names = "default";
335 pinctrl-0 = <&spi2_bus>;
336 status = "disabled";
337 };
339 pwm@139D0000 {
340 compatible = "samsung,exynos4210-pwm";
341 reg = <0x139D0000 0x1000>;
342 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
343 #pwm-cells = <2>;
344 status = "disabled";
345 };
347 amba {
348 #address-cells = <1>;
349 #size-cells = <1>;
350 compatible = "arm,amba-bus";
351 interrupt-parent = <&gic>;
352 ranges;
354 pdma0: pdma@12680000 {
355 compatible = "arm,pl330", "arm,primecell";
356 reg = <0x12680000 0x1000>;
357 interrupts = <0 35 0>;
358 clocks = <&clock 292>;
359 clock-names = "apb_pclk";
360 #dma-cells = <1>;
361 #dma-channels = <8>;
362 #dma-requests = <32>;
363 };
365 pdma1: pdma@12690000 {
366 compatible = "arm,pl330", "arm,primecell";
367 reg = <0x12690000 0x1000>;
368 interrupts = <0 36 0>;
369 clocks = <&clock 293>;
370 clock-names = "apb_pclk";
371 #dma-cells = <1>;
372 #dma-channels = <8>;
373 #dma-requests = <32>;
374 };
376 mdma1: mdma@12850000 {
377 compatible = "arm,pl330", "arm,primecell";
378 reg = <0x12850000 0x1000>;
379 interrupts = <0 34 0>;
380 clocks = <&clock 279>;
381 clock-names = "apb_pclk";
382 #dma-cells = <1>;
383 #dma-channels = <8>;
384 #dma-requests = <1>;
385 };
386 };
388 fimd: fimd@11c00000 {
389 compatible = "samsung,exynos4210-fimd";
390 interrupt-parent = <&combiner>;
391 reg = <0x11c00000 0x20000>;
392 interrupt-names = "fifo", "vsync", "lcd_sys";
393 interrupts = <11 0>, <11 1>, <11 2>;
394 clocks = <&clock 140>, <&clock 283>;
395 clock-names = "sclk_fimd", "fimd";
396 samsung,power-domain = <&pd_lcd0>;
397 status = "disabled";
398 };
399 };