arch/arm/boot/dts/imx27.dtsi

   1 /*
   2  * Copyright 2012 Sascha Hauer, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         aliases {
  16                 serial0 = &uart1;
  17                 serial1 = &uart2;
  18                 serial2 = &uart3;
  19                 serial3 = &uart4;
  20                 serial4 = &uart5;
  21                 serial5 = &uart6;
  22                 gpio0 = &gpio1;
  23                 gpio1 = &gpio2;
  24                 gpio2 = &gpio3;
  25                 gpio3 = &gpio4;
  26                 gpio4 = &gpio5;
  27                 gpio5 = &gpio6;
  28         };
  29
  30         avic: avic-interrupt-controller@e0000000 {
  31                 compatible = "fsl,imx27-avic", "fsl,avic";
  32                 interrupt-controller;
  33                 #interrupt-cells = <1>;
  34                 reg = <0x10040000 0x1000>;
  35         };
  36
  37         clocks {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40
  41                 osc26m {
  42                         compatible = "fsl,imx-osc26m", "fixed-clock";
  43                         clock-frequency = <26000000>;
  44                 };
  45         };
  46
  47         soc {
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 compatible = "simple-bus";
  51                 interrupt-parent = <&avic>;
  52                 ranges;
  53
  54                 aipi@10000000 { /* AIPI1 */
  55                         compatible = "fsl,aipi-bus", "simple-bus";
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         reg = <0x10000000 0x20000>;
  59                         ranges;
  60
  61                         wdog: wdog@10002000 {
  62                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
  63                                 reg = <0x10002000 0x1000>;
  64                                 interrupts = <27>;
  65                                 clocks = <&clks 0>;
  66                         };
  67
  68                         gpt1: timer@10003000 {
  69                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  70                                 reg = <0x10003000 0x1000>;
  71                                 interrupts = <26>;
  72                                 clocks = <&clks 46>, <&clks 61>;
  73                                 clock-names = "ipg", "per";
  74                         };
  75
  76                         gpt2: timer@10004000 {
  77                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  78                                 reg = <0x10004000 0x1000>;
  79                                 interrupts = <25>;
  80                                 clocks = <&clks 45>, <&clks 61>;
  81                                 clock-names = "ipg", "per";
  82                         };
  83
  84                         gpt3: timer@10005000 {
  85                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  86                                 reg = <0x10005000 0x1000>;
  87                                 interrupts = <24>;
  88                                 clocks = <&clks 44>, <&clks 61>;
  89                                 clock-names = "ipg", "per";
  90                         };
  91
  92                         uart1: serial@1000a000 {
  93                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
  94                                 reg = <0x1000a000 0x1000>;
  95                                 interrupts = <20>;
  96                                 clocks = <&clks 81>, <&clks 61>;
  97                                 clock-names = "ipg", "per";
  98                                 status = "disabled";
  99                         };
 100
 101                         uart2: serial@1000b000 {
 102                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 103                                 reg = <0x1000b000 0x1000>;
 104                                 interrupts = <19>;
 105                                 clocks = <&clks 80>, <&clks 61>;
 106                                 clock-names = "ipg", "per";
 107                                 status = "disabled";
 108                         };
 109
 110                         uart3: serial@1000c000 {
 111                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 112                                 reg = <0x1000c000 0x1000>;
 113                                 interrupts = <18>;
 114                                 clocks = <&clks 79>, <&clks 61>;
 115                                 clock-names = "ipg", "per";
 116                                 status = "disabled";
 117                         };
 118
 119                         uart4: serial@1000d000 {
 120                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 121                                 reg = <0x1000d000 0x1000>;
 122                                 interrupts = <17>;
 123                                 clocks = <&clks 78>, <&clks 61>;
 124                                 clock-names = "ipg", "per";
 125                                 status = "disabled";
 126                         };
 127
 128                         cspi1: cspi@1000e000 {
 129                                 #address-cells = <1>;
 130                                 #size-cells = <0>;
 131                                 compatible = "fsl,imx27-cspi";
 132                                 reg = <0x1000e000 0x1000>;
 133                                 interrupts = <16>;
 134                                 clocks = <&clks 53>, <&clks 53>;
 135                                 clock-names = "ipg", "per";
 136                                 status = "disabled";
 137                         };
 138
 139                         cspi2: cspi@1000f000 {
 140                                 #address-cells = <1>;
 141                                 #size-cells = <0>;
 142                                 compatible = "fsl,imx27-cspi";
 143                                 reg = <0x1000f000 0x1000>;
 144                                 interrupts = <15>;
 145                                 clocks = <&clks 52>, <&clks 52>;
 146                                 clock-names = "ipg", "per";
 147                                 status = "disabled";
 148                         };
 149
 150                         i2c1: i2c@10012000 {
 151                                 #address-cells = <1>;
 152                                 #size-cells = <0>;
 153                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 154                                 reg = <0x10012000 0x1000>;
 155                                 interrupts = <12>;
 156                                 clocks = <&clks 40>;
 157                                 status = "disabled";
 158                         };
 159
 160                         gpio1: gpio@10015000 {
 161                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 162                                 reg = <0x10015000 0x100>;
 163                                 interrupts = <8>;
 164                                 gpio-controller;
 165                                 #gpio-cells = <2>;
 166                                 interrupt-controller;
 167                                 #interrupt-cells = <2>;
 168                         };
 169
 170                         gpio2: gpio@10015100 {
 171                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 172                                 reg = <0x10015100 0x100>;
 173                                 interrupts = <8>;
 174                                 gpio-controller;
 175                                 #gpio-cells = <2>;
 176                                 interrupt-controller;
 177                                 #interrupt-cells = <2>;
 178                         };
 179
 180                         gpio3: gpio@10015200 {
 181                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 182                                 reg = <0x10015200 0x100>;
 183                                 interrupts = <8>;
 184                                 gpio-controller;
 185                                 #gpio-cells = <2>;
 186                                 interrupt-controller;
 187                                 #interrupt-cells = <2>;
 188                         };
 189
 190                         gpio4: gpio@10015300 {
 191                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 192                                 reg = <0x10015300 0x100>;
 193                                 interrupts = <8>;
 194                                 gpio-controller;
 195                                 #gpio-cells = <2>;
 196                                 interrupt-controller;
 197                                 #interrupt-cells = <2>;
 198                         };
 199
 200                         gpio5: gpio@10015400 {
 201                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 202                                 reg = <0x10015400 0x100>;
 203                                 interrupts = <8>;
 204                                 gpio-controller;
 205                                 #gpio-cells = <2>;
 206                                 interrupt-controller;
 207                                 #interrupt-cells = <2>;
 208                         };
 209
 210                         gpio6: gpio@10015500 {
 211                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 212                                 reg = <0x10015500 0x100>;
 213                                 interrupts = <8>;
 214                                 gpio-controller;
 215                                 #gpio-cells = <2>;
 216                                 interrupt-controller;
 217                                 #interrupt-cells = <2>;
 218                         };
 219
 220                         cspi3: cspi@10017000 {
 221                                 #address-cells = <1>;
 222                                 #size-cells = <0>;
 223                                 compatible = "fsl,imx27-cspi";
 224                                 reg = <0x10017000 0x1000>;
 225                                 interrupts = <6>;
 226                                 clocks = <&clks 51>, <&clks 51>;
 227                                 clock-names = "ipg", "per";
 228                                 status = "disabled";
 229                         };
 230
 231                         gpt4: timer@10019000 {
 232                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 233                                 reg = <0x10019000 0x1000>;
 234                                 interrupts = <4>;
 235                                 clocks = <&clks 43>, <&clks 61>;
 236                                 clock-names = "ipg", "per";
 237                         };
 238
 239                         gpt5: timer@1001a000 {
 240                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 241                                 reg = <0x1001a000 0x1000>;
 242                                 interrupts = <3>;
 243                                 clocks = <&clks 42>, <&clks 61>;
 244                                 clock-names = "ipg", "per";
 245                         };
 246
 247                         uart5: serial@1001b000 {
 248                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 249                                 reg = <0x1001b000 0x1000>;
 250                                 interrupts = <49>;
 251                                 clocks = <&clks 77>, <&clks 61>;
 252                                 clock-names = "ipg", "per";
 253                                 status = "disabled";
 254                         };
 255
 256                         uart6: serial@1001c000 {
 257                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 258                                 reg = <0x1001c000 0x1000>;
 259                                 interrupts = <48>;
 260                                 clocks = <&clks 78>, <&clks 61>;
 261                                 clock-names = "ipg", "per";
 262                                 status = "disabled";
 263                         };
 264
 265                         i2c2: i2c@1001d000 {
 266                                 #address-cells = <1>;
 267                                 #size-cells = <0>;
 268                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 269                                 reg = <0x1001d000 0x1000>;
 270                                 interrupts = <1>;
 271                                 clocks = <&clks 39>;
 272                                 status = "disabled";
 273                         };
 274
 275                         gpt6: timer@1001f000 {
 276                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 277                                 reg = <0x1001f000 0x1000>;
 278                                 interrupts = <2>;
 279                                 clocks = <&clks 41>, <&clks 61>;
 280                                 clock-names = "ipg", "per";
 281                         };
 282                 };
 283
 284                 aipi@10020000 { /* AIPI2 */
 285                         compatible = "fsl,aipi-bus", "simple-bus";
 286                         #address-cells = <1>;
 287                         #size-cells = <1>;
 288                         reg = <0x10020000 0x20000>;
 289                         ranges;
 290
 291                         fec: ethernet@1002b000 {
 292                                 compatible = "fsl,imx27-fec";
 293                                 reg = <0x1002b000 0x4000>;
 294                                 interrupts = <50>;
 295                                 clocks = <&clks 48>, <&clks 67>, <&clks 0>;
 296                                 clock-names = "ipg", "ahb", "ptp";
 297                                 status = "disabled";
 298                         };
 299
 300                         clks: ccm@10027000{
 301                                 compatible = "fsl,imx27-ccm";
 302                                 reg = <0x10027000 0x1000>;
 303                                 #clock-cells = <1>;
 304                         };
 305                 };
 306
 307
 308                 nfc: nand@d8000000 {
 309                         #address-cells = <1>;
 310                         #size-cells = <1>;
 311
 312                         compatible = "fsl,imx27-nand";
 313                         reg = <0xd8000000 0x1000>;
 314                         interrupts = <29>;
 315                         clocks = <&clks 54>;
 316                         status = "disabled";
 317                 };
 318         };
 319 };