2 * Copyright 2010-2011 Calxeda, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
16 #include <linux/clk.h>
17 #include <linux/clkdev.h>
18 #include <linux/clocksource.h>
19 #include <linux/dma-mapping.h>
21 #include <linux/irq.h>
22 #include <linux/irqchip.h>
23 #include <linux/irqdomain.h>
25 #include <linux/of_irq.h>
26 #include <linux/of_platform.h>
27 #include <linux/of_address.h>
28 #include <linux/smp.h>
29 #include <linux/amba/bus.h>
30 #include <linux/clk-provider.h>
32 #include <asm/cacheflush.h>
33 #include <asm/cputype.h>
34 #include <asm/smp_plat.h>
35 #include <asm/hardware/cache-l2x0.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/time.h>
43 void __iomem
*sregs_base
;
44 void __iomem
*scu_base_addr
;
46 static void __init
highbank_scu_map_io(void)
51 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base
));
53 scu_base_addr
= ioremap(base
, SZ_4K
);
56 #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
57 #define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
59 void highbank_set_cpu_jump(int cpu
, void *jump_addr
)
61 cpu
= MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu
), 0);
62 writel(virt_to_phys(jump_addr
), HB_JUMP_TABLE_VIRT(cpu
));
63 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu
), 16);
64 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu
),
65 HB_JUMP_TABLE_PHYS(cpu
) + 15);
68 #ifdef CONFIG_CACHE_L2X0
69 static void highbank_l2x0_disable(void)
71 /* Disable PL310 L2 Cache controller */
72 highbank_smc1(0x102, 0x0);
76 static void __init
highbank_init_irq(void)
80 if (of_find_compatible_node(NULL
, NULL
, "arm,cortex-a9"))
81 highbank_scu_map_io();
83 #ifdef CONFIG_CACHE_L2X0
84 /* Enable PL310 L2 Cache controller */
85 highbank_smc1(0x102, 0x1);
86 l2x0_of_init(0, ~0UL);
87 outer_cache
.disable
= highbank_l2x0_disable
;
91 static void __init
highbank_timer_init(void)
93 struct device_node
*np
;
95 /* Map system registers */
96 np
= of_find_compatible_node(NULL
, NULL
, "calxeda,hb-sregs");
97 sregs_base
= of_iomap(np
, 0);
102 clocksource_of_init();
105 static void highbank_power_off(void)
107 highbank_set_pwr_shutdown();
113 static int highbank_platform_notifier(struct notifier_block
*nb
,
114 unsigned long event
, void *__dev
)
116 struct resource
*res
;
118 struct device
*dev
= __dev
;
120 if (event
!= BUS_NOTIFY_ADD_DEVICE
)
123 if (of_device_is_compatible(dev
->of_node
, "calxeda,hb-ahci"))
125 else if (of_device_is_compatible(dev
->of_node
, "calxeda,hb-sdhci"))
127 else if (of_device_is_compatible(dev
->of_node
, "arm,pl330"))
129 else if (of_device_is_compatible(dev
->of_node
, "calxeda,hb-xgmac")) {
130 res
= platform_get_resource(to_platform_device(dev
),
133 if (res
->start
== 0xfff50000)
135 else if (res
->start
== 0xfff51000)
143 if (of_property_read_bool(dev
->of_node
, "dma-coherent")) {
144 writel(0xff31, sregs_base
+ reg
);
145 set_dma_ops(dev
, &arm_coherent_dma_ops
);
147 writel(0, sregs_base
+ reg
);
152 static struct notifier_block highbank_amba_nb
= {
153 .notifier_call
= highbank_platform_notifier
,
156 static struct notifier_block highbank_platform_nb
= {
157 .notifier_call
= highbank_platform_notifier
,
160 static void __init
highbank_init(void)
162 pm_power_off
= highbank_power_off
;
165 bus_register_notifier(&platform_bus_type
, &highbank_platform_nb
);
166 bus_register_notifier(&amba_bustype
, &highbank_amba_nb
);
168 of_platform_populate(NULL
, of_default_bus_match_table
, NULL
, NULL
);
171 static const char *highbank_match
[] __initconst
= {
177 DT_MACHINE_START(HIGHBANK
, "Highbank")
178 .smp
= smp_ops(highbank_smp_ops
),
179 .map_io
= debug_ll_io_init
,
180 .init_irq
= highbank_init_irq
,
181 .init_time
= highbank_timer_init
,
182 .init_machine
= highbank_init
,
183 .dt_compat
= highbank_match
,
184 .restart
= highbank_restart
,