arch/arm/mach-zynq/common.c

   1 /*
   2  * This file contains common code that is intended to be used across
   3  * boards so that it's not replicated.
   4  *
   5  *  Copyright (C) 2011 Xilinx
   6  *
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/init.h>
  18 #include <linux/kernel.h>
  19 #include <linux/cpumask.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/clk.h>
  22 #include <linux/clk/zynq.h>
  23 #include <linux/clocksource.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_irq.h>
  26 #include <linux/of_platform.h>
  27 #include <linux/of.h>
  28 #include <linux/irqchip.h>
  29
  30 #include <asm/mach/arch.h>
  31 #include <asm/mach/map.h>
  32 #include <asm/mach/time.h>
  33 #include <asm/mach-types.h>
  34 #include <asm/page.h>
  35 #include <asm/pgtable.h>
  36 #include <asm/smp_scu.h>
  37 #include <asm/hardware/cache-l2x0.h>
  38
  39 #include "common.h"
  40
  41 void __iomem *zynq_scu_base;
  42
  43 static struct of_device_id zynq_of_bus_ids[] __initdata = {
  44         { .compatible = "simple-bus", },
  45         {}
  46 };
  47
  48 /**
  49  * zynq_init_machine - System specific initialization, intended to be
  50  *                     called from board specific initialization.
  51  */
  52 static void __init zynq_init_machine(void)
  53 {
  54         /*
  55          * 64KB way size, 8-way associativity, parity disabled
  56          */
  57         l2x0_of_init(0x02060000, 0xF0F0FFFF);
  58
  59         of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
  60 }
  61
  62 static void __init zynq_timer_init(void)
  63 {
  64         zynq_slcr_init();
  65         clocksource_of_init();
  66 }
  67
  68 static struct map_desc zynq_cortex_a9_scu_map __initdata = {
  69         .length = SZ_256,
  70         .type   = MT_DEVICE,
  71 };
  72
  73 static void __init zynq_scu_map_io(void)
  74 {
  75         unsigned long base;
  76
  77         base = scu_a9_get_base();
  78         zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
  79         /* Expected address is in vmalloc area that's why simple assign here */
  80         zynq_cortex_a9_scu_map.virtual = base;
  81         iotable_init(&zynq_cortex_a9_scu_map, 1);
  82         zynq_scu_base = (void __iomem *)base;
  83         BUG_ON(!zynq_scu_base);
  84 }
  85
  86 /**
  87  * zynq_map_io - Create memory mappings needed for early I/O.
  88  */
  89 static void __init zynq_map_io(void)
  90 {
  91         debug_ll_io_init();
  92         zynq_scu_map_io();
  93 }
  94
  95 static void zynq_system_reset(char mode, const char *cmd)
  96 {
  97         zynq_slcr_system_reset();
  98 }
  99
 100 static const char * const zynq_dt_match[] = {
 101         "xlnx,zynq-zc702",
 102         "xlnx,zynq-7000",
 103         NULL
 104 };
 105
 106 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
 107         .smp            = smp_ops(zynq_smp_ops),
 108         .map_io         = zynq_map_io,
 109         .init_irq       = irqchip_init,
 110         .init_machine   = zynq_init_machine,
 111         .init_time      = zynq_timer_init,
 112         .dt_compat      = zynq_dt_match,
 113         .restart        = zynq_system_reset,
 114 MACHINE_END