drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / gma500 / psb_intel_lvds.c
blob8baf6325c6e46cfbc7d839607f8536d27ee5e7c0
1 /*
2 * Copyright © 2006-2007 Intel Corporation
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 * Authors:
18 * Eric Anholt <eric@anholt.net>
19 * Dave Airlie <airlied@linux.ie>
20 * Jesse Barnes <jesse.barnes@intel.com>
23 #include <linux/i2c.h>
24 #include <drm/drmP.h>
26 #include "intel_bios.h"
27 #include "psb_drv.h"
28 #include "psb_intel_drv.h"
29 #include "psb_intel_reg.h"
30 #include "power.h"
31 #include <linux/pm_runtime.h>
34 * LVDS I2C backlight control macros
36 #define BRIGHTNESS_MAX_LEVEL 100
37 #define BRIGHTNESS_MASK 0xFF
38 #define BLC_I2C_TYPE 0x01
39 #define BLC_PWM_TYPT 0x02
41 #define BLC_POLARITY_NORMAL 0
42 #define BLC_POLARITY_INVERSE 1
44 #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
45 #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
46 #define PSB_BLC_PWM_PRECISION_FACTOR (10)
47 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
48 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
50 struct psb_intel_lvds_priv {
52 * Saved LVDO output states
54 uint32_t savePP_ON;
55 uint32_t savePP_OFF;
56 uint32_t saveLVDS;
57 uint32_t savePP_CONTROL;
58 uint32_t savePP_CYCLE;
59 uint32_t savePFIT_CONTROL;
60 uint32_t savePFIT_PGM_RATIOS;
61 uint32_t saveBLC_PWM_CTL;
63 struct psb_intel_i2c_chan *i2c_bus;
64 struct psb_intel_i2c_chan *ddc_bus;
69 * Returns the maximum level of the backlight duty cycle field.
71 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
73 struct drm_psb_private *dev_priv = dev->dev_private;
74 u32 ret;
76 if (gma_power_begin(dev, false)) {
77 ret = REG_READ(BLC_PWM_CTL);
78 gma_power_end(dev);
79 } else /* Powered off, use the saved value */
80 ret = dev_priv->regs.saveBLC_PWM_CTL;
82 /* Top 15bits hold the frequency mask */
83 ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
84 BACKLIGHT_MODULATION_FREQ_SHIFT;
86 ret *= 2; /* Return a 16bit range as needed for setting */
87 if (ret == 0)
88 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
89 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
90 return ret;
94 * Set LVDS backlight level by I2C command
96 * FIXME: at some point we need to both track this for PM and also
97 * disable runtime pm on MRST if the brightness is nil (ie blanked)
99 static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
100 unsigned int level)
102 struct drm_psb_private *dev_priv =
103 (struct drm_psb_private *)dev->dev_private;
105 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
106 u8 out_buf[2];
107 unsigned int blc_i2c_brightness;
109 struct i2c_msg msgs[] = {
111 .addr = lvds_i2c_bus->slave_addr,
112 .flags = 0,
113 .len = 2,
114 .buf = out_buf,
118 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
119 BRIGHTNESS_MASK /
120 BRIGHTNESS_MAX_LEVEL);
122 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
123 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
125 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
126 out_buf[1] = (u8)blc_i2c_brightness;
128 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
129 dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
130 dev_priv->lvds_bl->brightnesscmd,
131 blc_i2c_brightness);
132 return 0;
135 dev_err(dev->dev, "I2C transfer error\n");
136 return -1;
140 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
142 struct drm_psb_private *dev_priv =
143 (struct drm_psb_private *)dev->dev_private;
145 u32 max_pwm_blc;
146 u32 blc_pwm_duty_cycle;
148 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
150 /*BLC_PWM_CTL Should be initiated while backlight device init*/
151 BUG_ON(max_pwm_blc == 0);
153 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
155 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
156 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
158 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
159 REG_WRITE(BLC_PWM_CTL,
160 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
161 (blc_pwm_duty_cycle));
163 dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
164 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
165 (blc_pwm_duty_cycle));
167 return 0;
171 * Set LVDS backlight level either by I2C or PWM
173 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
175 struct drm_psb_private *dev_priv = dev->dev_private;
177 dev_dbg(dev->dev, "backlight level is %d\n", level);
179 if (!dev_priv->lvds_bl) {
180 dev_err(dev->dev, "NO LVDS backlight info\n");
181 return;
184 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
185 psb_lvds_i2c_set_brightness(dev, level);
186 else
187 psb_lvds_pwm_set_brightness(dev, level);
191 * Sets the backlight level.
193 * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
195 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
197 struct drm_psb_private *dev_priv = dev->dev_private;
198 u32 blc_pwm_ctl;
200 if (gma_power_begin(dev, false)) {
201 blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
202 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
203 REG_WRITE(BLC_PWM_CTL,
204 (blc_pwm_ctl |
205 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
206 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
207 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
208 gma_power_end(dev);
209 } else {
210 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
211 ~BACKLIGHT_DUTY_CYCLE_MASK;
212 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
213 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
218 * Sets the power state for the panel.
220 static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
222 struct drm_psb_private *dev_priv = dev->dev_private;
223 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
224 u32 pp_status;
226 if (!gma_power_begin(dev, true)) {
227 dev_err(dev->dev, "set power, chip off!\n");
228 return;
231 if (on) {
232 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
233 POWER_TARGET_ON);
234 do {
235 pp_status = REG_READ(PP_STATUS);
236 } while ((pp_status & PP_ON) == 0);
238 psb_intel_lvds_set_backlight(dev,
239 mode_dev->backlight_duty_cycle);
240 } else {
241 psb_intel_lvds_set_backlight(dev, 0);
243 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
244 ~POWER_TARGET_ON);
245 do {
246 pp_status = REG_READ(PP_STATUS);
247 } while (pp_status & PP_ON);
250 gma_power_end(dev);
253 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
255 struct drm_device *dev = encoder->dev;
257 if (mode == DRM_MODE_DPMS_ON)
258 psb_intel_lvds_set_power(dev, true);
259 else
260 psb_intel_lvds_set_power(dev, false);
262 /* XXX: We never power down the LVDS pairs. */
265 static void psb_intel_lvds_save(struct drm_connector *connector)
267 struct drm_device *dev = connector->dev;
268 struct drm_psb_private *dev_priv =
269 (struct drm_psb_private *)dev->dev_private;
270 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
271 struct psb_intel_lvds_priv *lvds_priv =
272 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
274 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
275 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
276 lvds_priv->saveLVDS = REG_READ(LVDS);
277 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
278 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
279 /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
280 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
281 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
282 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
284 /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
285 dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
286 BACKLIGHT_DUTY_CYCLE_MASK);
289 * If the light is off at server startup,
290 * just make it full brightness
292 if (dev_priv->backlight_duty_cycle == 0)
293 dev_priv->backlight_duty_cycle =
294 psb_intel_lvds_get_max_backlight(dev);
296 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
297 lvds_priv->savePP_ON,
298 lvds_priv->savePP_OFF,
299 lvds_priv->saveLVDS,
300 lvds_priv->savePP_CONTROL,
301 lvds_priv->savePP_CYCLE,
302 lvds_priv->saveBLC_PWM_CTL);
305 static void psb_intel_lvds_restore(struct drm_connector *connector)
307 struct drm_device *dev = connector->dev;
308 u32 pp_status;
309 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
310 struct psb_intel_lvds_priv *lvds_priv =
311 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
313 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
314 lvds_priv->savePP_ON,
315 lvds_priv->savePP_OFF,
316 lvds_priv->saveLVDS,
317 lvds_priv->savePP_CONTROL,
318 lvds_priv->savePP_CYCLE,
319 lvds_priv->saveBLC_PWM_CTL);
321 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
322 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
323 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
324 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
325 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
326 /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
327 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
328 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
329 REG_WRITE(LVDS, lvds_priv->saveLVDS);
331 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
332 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
333 POWER_TARGET_ON);
334 do {
335 pp_status = REG_READ(PP_STATUS);
336 } while ((pp_status & PP_ON) == 0);
337 } else {
338 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
339 ~POWER_TARGET_ON);
340 do {
341 pp_status = REG_READ(PP_STATUS);
342 } while (pp_status & PP_ON);
346 enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
347 struct drm_display_mode *mode)
349 struct drm_psb_private *dev_priv = connector->dev->dev_private;
350 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
351 struct drm_display_mode *fixed_mode =
352 dev_priv->mode_dev.panel_fixed_mode;
354 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
355 fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
357 /* just in case */
358 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
359 return MODE_NO_DBLESCAN;
361 /* just in case */
362 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
363 return MODE_NO_INTERLACE;
365 if (fixed_mode) {
366 if (mode->hdisplay > fixed_mode->hdisplay)
367 return MODE_PANEL;
368 if (mode->vdisplay > fixed_mode->vdisplay)
369 return MODE_PANEL;
371 return MODE_OK;
374 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
375 const struct drm_display_mode *mode,
376 struct drm_display_mode *adjusted_mode)
378 struct drm_device *dev = encoder->dev;
379 struct drm_psb_private *dev_priv = dev->dev_private;
380 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
381 struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
382 struct drm_encoder *tmp_encoder;
383 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
384 struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
386 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
387 panel_fixed_mode = mode_dev->panel_fixed_mode2;
389 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
390 if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
391 pr_err("Can't support LVDS on pipe A\n");
392 return false;
394 if (IS_MRST(dev) && gma_crtc->pipe != 0) {
395 pr_err("Must use PIPE A\n");
396 return false;
398 /* Should never happen!! */
399 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
400 head) {
401 if (tmp_encoder != encoder
402 && tmp_encoder->crtc == encoder->crtc) {
403 pr_err("Can't enable LVDS and another encoder on the same pipe\n");
404 return false;
409 * If we have timings from the BIOS for the panel, put them in
410 * to the adjusted mode. The CRTC will be set up for this mode,
411 * with the panel scaling set up to source from the H/VDisplay
412 * of the original mode.
414 if (panel_fixed_mode != NULL) {
415 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
416 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
417 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
418 adjusted_mode->htotal = panel_fixed_mode->htotal;
419 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
420 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
421 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
422 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
423 adjusted_mode->clock = panel_fixed_mode->clock;
424 drm_mode_set_crtcinfo(adjusted_mode,
425 CRTC_INTERLACE_HALVE_V);
429 * XXX: It would be nice to support lower refresh rates on the
430 * panels to reduce power consumption, and perhaps match the
431 * user's requested refresh rate.
434 return true;
437 static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
439 struct drm_device *dev = encoder->dev;
440 struct drm_psb_private *dev_priv = dev->dev_private;
441 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
443 if (!gma_power_begin(dev, true))
444 return;
446 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
447 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
448 BACKLIGHT_DUTY_CYCLE_MASK);
450 psb_intel_lvds_set_power(dev, false);
452 gma_power_end(dev);
455 static void psb_intel_lvds_commit(struct drm_encoder *encoder)
457 struct drm_device *dev = encoder->dev;
458 struct drm_psb_private *dev_priv = dev->dev_private;
459 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
461 if (mode_dev->backlight_duty_cycle == 0)
462 mode_dev->backlight_duty_cycle =
463 psb_intel_lvds_get_max_backlight(dev);
465 psb_intel_lvds_set_power(dev, true);
468 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
469 struct drm_display_mode *mode,
470 struct drm_display_mode *adjusted_mode)
472 struct drm_device *dev = encoder->dev;
473 struct drm_psb_private *dev_priv = dev->dev_private;
474 u32 pfit_control;
477 * The LVDS pin pair will already have been turned on in the
478 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
479 * settings.
483 * Enable automatic panel scaling so that non-native modes fill the
484 * screen. Should be enabled before the pipe is enabled, according to
485 * register description and PRM.
487 if (mode->hdisplay != adjusted_mode->hdisplay ||
488 mode->vdisplay != adjusted_mode->vdisplay)
489 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
490 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
491 HORIZ_INTERP_BILINEAR);
492 else
493 pfit_control = 0;
495 if (dev_priv->lvds_dither)
496 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
498 REG_WRITE(PFIT_CONTROL, pfit_control);
502 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
504 static int psb_intel_lvds_get_modes(struct drm_connector *connector)
506 struct drm_device *dev = connector->dev;
507 struct drm_psb_private *dev_priv = dev->dev_private;
508 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
509 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
510 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
511 int ret = 0;
513 if (!IS_MRST(dev))
514 ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
516 if (ret)
517 return ret;
519 if (mode_dev->panel_fixed_mode != NULL) {
520 struct drm_display_mode *mode =
521 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
522 drm_mode_probed_add(connector, mode);
523 return 1;
526 return 0;
530 * psb_intel_lvds_destroy - unregister and free LVDS structures
531 * @connector: connector to free
533 * Unregister the DDC bus for this connector then free the driver private
534 * structure.
536 void psb_intel_lvds_destroy(struct drm_connector *connector)
538 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
539 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
541 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
542 drm_connector_unregister(connector);
543 drm_connector_cleanup(connector);
544 kfree(connector);
547 int psb_intel_lvds_set_property(struct drm_connector *connector,
548 struct drm_property *property,
549 uint64_t value)
551 struct drm_encoder *encoder = connector->encoder;
553 if (!encoder)
554 return -1;
556 if (!strcmp(property->name, "scaling mode")) {
557 struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
558 uint64_t curval;
560 if (!crtc)
561 goto set_prop_error;
563 switch (value) {
564 case DRM_MODE_SCALE_FULLSCREEN:
565 break;
566 case DRM_MODE_SCALE_NO_SCALE:
567 break;
568 case DRM_MODE_SCALE_ASPECT:
569 break;
570 default:
571 goto set_prop_error;
574 if (drm_object_property_get_value(&connector->base,
575 property,
576 &curval))
577 goto set_prop_error;
579 if (curval == value)
580 goto set_prop_done;
582 if (drm_object_property_set_value(&connector->base,
583 property,
584 value))
585 goto set_prop_error;
587 if (crtc->saved_mode.hdisplay != 0 &&
588 crtc->saved_mode.vdisplay != 0) {
589 if (!drm_crtc_helper_set_mode(encoder->crtc,
590 &crtc->saved_mode,
591 encoder->crtc->x,
592 encoder->crtc->y,
593 encoder->crtc->primary->fb))
594 goto set_prop_error;
596 } else if (!strcmp(property->name, "backlight")) {
597 if (drm_object_property_set_value(&connector->base,
598 property,
599 value))
600 goto set_prop_error;
601 else
602 gma_backlight_set(encoder->dev, value);
603 } else if (!strcmp(property->name, "DPMS")) {
604 const struct drm_encoder_helper_funcs *hfuncs
605 = encoder->helper_private;
606 hfuncs->dpms(encoder, value);
609 set_prop_done:
610 return 0;
611 set_prop_error:
612 return -1;
615 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
616 .dpms = psb_intel_lvds_encoder_dpms,
617 .mode_fixup = psb_intel_lvds_mode_fixup,
618 .prepare = psb_intel_lvds_prepare,
619 .mode_set = psb_intel_lvds_mode_set,
620 .commit = psb_intel_lvds_commit,
623 const struct drm_connector_helper_funcs
624 psb_intel_lvds_connector_helper_funcs = {
625 .get_modes = psb_intel_lvds_get_modes,
626 .mode_valid = psb_intel_lvds_mode_valid,
627 .best_encoder = gma_best_encoder,
630 const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
631 .dpms = drm_helper_connector_dpms,
632 .fill_modes = drm_helper_probe_single_connector_modes,
633 .set_property = psb_intel_lvds_set_property,
634 .destroy = psb_intel_lvds_destroy,
638 static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
640 drm_encoder_cleanup(encoder);
643 const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
644 .destroy = psb_intel_lvds_enc_destroy,
650 * psb_intel_lvds_init - setup LVDS connectors on this device
651 * @dev: drm device
653 * Create the connector, register the LVDS DDC bus, and try to figure out what
654 * modes we can display on the LVDS panel (if present).
656 void psb_intel_lvds_init(struct drm_device *dev,
657 struct psb_intel_mode_device *mode_dev)
659 struct gma_encoder *gma_encoder;
660 struct gma_connector *gma_connector;
661 struct psb_intel_lvds_priv *lvds_priv;
662 struct drm_connector *connector;
663 struct drm_encoder *encoder;
664 struct drm_display_mode *scan; /* *modes, *bios_mode; */
665 struct drm_crtc *crtc;
666 struct drm_psb_private *dev_priv = dev->dev_private;
667 u32 lvds;
668 int pipe;
670 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
671 if (!gma_encoder) {
672 dev_err(dev->dev, "gma_encoder allocation error\n");
673 return;
676 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
677 if (!gma_connector) {
678 dev_err(dev->dev, "gma_connector allocation error\n");
679 goto failed_encoder;
682 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
683 if (!lvds_priv) {
684 dev_err(dev->dev, "LVDS private allocation error\n");
685 goto failed_connector;
688 gma_encoder->dev_priv = lvds_priv;
690 connector = &gma_connector->base;
691 gma_connector->save = psb_intel_lvds_save;
692 gma_connector->restore = psb_intel_lvds_restore;
694 encoder = &gma_encoder->base;
695 drm_connector_init(dev, connector,
696 &psb_intel_lvds_connector_funcs,
697 DRM_MODE_CONNECTOR_LVDS);
699 drm_encoder_init(dev, encoder,
700 &psb_intel_lvds_enc_funcs,
701 DRM_MODE_ENCODER_LVDS, NULL);
703 gma_connector_attach_encoder(gma_connector, gma_encoder);
704 gma_encoder->type = INTEL_OUTPUT_LVDS;
706 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
707 drm_connector_helper_add(connector,
708 &psb_intel_lvds_connector_helper_funcs);
709 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
710 connector->interlace_allowed = false;
711 connector->doublescan_allowed = false;
713 /*Attach connector properties*/
714 drm_object_attach_property(&connector->base,
715 dev->mode_config.scaling_mode_property,
716 DRM_MODE_SCALE_FULLSCREEN);
717 drm_object_attach_property(&connector->base,
718 dev_priv->backlight_property,
719 BRIGHTNESS_MAX_LEVEL);
722 * Set up I2C bus
723 * FIXME: distroy i2c_bus when exit
725 lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
726 if (!lvds_priv->i2c_bus) {
727 dev_printk(KERN_ERR,
728 &dev->pdev->dev, "I2C bus registration failed.\n");
729 goto failed_blc_i2c;
731 lvds_priv->i2c_bus->slave_addr = 0x2C;
732 dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
735 * LVDS discovery:
736 * 1) check for EDID on DDC
737 * 2) check for VBT data
738 * 3) check to see if LVDS is already on
739 * if none of the above, no panel
740 * 4) make sure lid is open
741 * if closed, act like it's not there for now
744 /* Set up the DDC bus. */
745 lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
746 if (!lvds_priv->ddc_bus) {
747 dev_printk(KERN_ERR, &dev->pdev->dev,
748 "DDC bus registration " "failed.\n");
749 goto failed_ddc;
753 * Attempt to get the fixed panel mode from DDC. Assume that the
754 * preferred mode is the right one.
756 mutex_lock(&dev->mode_config.mutex);
757 psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
758 list_for_each_entry(scan, &connector->probed_modes, head) {
759 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
760 mode_dev->panel_fixed_mode =
761 drm_mode_duplicate(dev, scan);
762 DRM_DEBUG_KMS("Using mode from DDC\n");
763 goto out; /* FIXME: check for quirks */
767 /* Failed to get EDID, what about VBT? do we need this? */
768 if (dev_priv->lfp_lvds_vbt_mode) {
769 mode_dev->panel_fixed_mode =
770 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
772 if (mode_dev->panel_fixed_mode) {
773 mode_dev->panel_fixed_mode->type |=
774 DRM_MODE_TYPE_PREFERRED;
775 DRM_DEBUG_KMS("Using mode from VBT\n");
776 goto out;
781 * If we didn't get EDID, try checking if the panel is already turned
782 * on. If so, assume that whatever is currently programmed is the
783 * correct mode.
785 lvds = REG_READ(LVDS);
786 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
787 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
789 if (crtc && (lvds & LVDS_PORT_EN)) {
790 mode_dev->panel_fixed_mode =
791 psb_intel_crtc_mode_get(dev, crtc);
792 if (mode_dev->panel_fixed_mode) {
793 mode_dev->panel_fixed_mode->type |=
794 DRM_MODE_TYPE_PREFERRED;
795 DRM_DEBUG_KMS("Using pre-programmed mode\n");
796 goto out; /* FIXME: check for quirks */
800 /* If we still don't have a mode after all that, give up. */
801 if (!mode_dev->panel_fixed_mode) {
802 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
803 goto failed_find;
807 * Blacklist machines with BIOSes that list an LVDS panel without
808 * actually having one.
810 out:
811 mutex_unlock(&dev->mode_config.mutex);
812 drm_connector_register(connector);
813 return;
815 failed_find:
816 mutex_unlock(&dev->mode_config.mutex);
817 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
818 failed_ddc:
819 psb_intel_i2c_destroy(lvds_priv->i2c_bus);
820 failed_blc_i2c:
821 drm_encoder_cleanup(encoder);
822 drm_connector_cleanup(connector);
823 failed_connector:
824 kfree(gma_connector);
825 failed_encoder:
826 kfree(gma_encoder);