drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nouveau_ttm.c
blob8edb9f2a426945be9bf88ff167cc9ccebfa2171b
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
4 * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sub license,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial portions
15 * of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "nouveau_drv.h"
26 #include "nouveau_gem.h"
27 #include "nouveau_mem.h"
28 #include "nouveau_ttm.h"
30 #include <drm/drm_legacy.h>
32 #include <core/tegra.h>
34 static int
35 nouveau_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
37 return 0;
40 static int
41 nouveau_manager_fini(struct ttm_mem_type_manager *man)
43 return 0;
46 static void
47 nouveau_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *reg)
49 nouveau_mem_del(reg);
52 static void
53 nouveau_manager_debug(struct ttm_mem_type_manager *man,
54 struct drm_printer *printer)
58 static int
59 nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
60 struct ttm_buffer_object *bo,
61 const struct ttm_place *place,
62 struct ttm_mem_reg *reg)
64 struct nouveau_bo *nvbo = nouveau_bo(bo);
65 struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
66 struct nouveau_mem *mem;
67 int ret;
69 if (drm->client.device.info.ram_size == 0)
70 return -ENOMEM;
72 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
73 mem = nouveau_mem(reg);
74 if (ret)
75 return ret;
77 ret = nouveau_mem_vram(reg, nvbo->contig, nvbo->page);
78 if (ret) {
79 nouveau_mem_del(reg);
80 if (ret == -ENOSPC) {
81 reg->mm_node = NULL;
82 return 0;
84 return ret;
87 return 0;
90 const struct ttm_mem_type_manager_func nouveau_vram_manager = {
91 .init = nouveau_manager_init,
92 .takedown = nouveau_manager_fini,
93 .get_node = nouveau_vram_manager_new,
94 .put_node = nouveau_manager_del,
95 .debug = nouveau_manager_debug,
98 static int
99 nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
100 struct ttm_buffer_object *bo,
101 const struct ttm_place *place,
102 struct ttm_mem_reg *reg)
104 struct nouveau_bo *nvbo = nouveau_bo(bo);
105 struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
106 struct nouveau_mem *mem;
107 int ret;
109 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
110 mem = nouveau_mem(reg);
111 if (ret)
112 return ret;
114 reg->start = 0;
115 return 0;
118 const struct ttm_mem_type_manager_func nouveau_gart_manager = {
119 .init = nouveau_manager_init,
120 .takedown = nouveau_manager_fini,
121 .get_node = nouveau_gart_manager_new,
122 .put_node = nouveau_manager_del,
123 .debug = nouveau_manager_debug
126 static int
127 nv04_gart_manager_new(struct ttm_mem_type_manager *man,
128 struct ttm_buffer_object *bo,
129 const struct ttm_place *place,
130 struct ttm_mem_reg *reg)
132 struct nouveau_bo *nvbo = nouveau_bo(bo);
133 struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
134 struct nouveau_mem *mem;
135 int ret;
137 ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
138 mem = nouveau_mem(reg);
139 if (ret)
140 return ret;
142 ret = nvif_vmm_get(&mem->cli->vmm.vmm, PTES, false, 12, 0,
143 reg->num_pages << PAGE_SHIFT, &mem->vma[0]);
144 if (ret) {
145 nouveau_mem_del(reg);
146 if (ret == -ENOSPC) {
147 reg->mm_node = NULL;
148 return 0;
150 return ret;
153 reg->start = mem->vma[0].addr >> PAGE_SHIFT;
154 return 0;
157 const struct ttm_mem_type_manager_func nv04_gart_manager = {
158 .init = nouveau_manager_init,
159 .takedown = nouveau_manager_fini,
160 .get_node = nv04_gart_manager_new,
161 .put_node = nouveau_manager_del,
162 .debug = nouveau_manager_debug
166 nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
168 struct drm_file *file_priv = filp->private_data;
169 struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
171 if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
172 return drm_legacy_mmap(filp, vma);
174 return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
177 static int
178 nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
180 return ttm_mem_global_init(ref->object);
183 static void
184 nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
186 ttm_mem_global_release(ref->object);
190 nouveau_ttm_global_init(struct nouveau_drm *drm)
192 struct drm_global_reference *global_ref;
193 int ret;
195 global_ref = &drm->ttm.mem_global_ref;
196 global_ref->global_type = DRM_GLOBAL_TTM_MEM;
197 global_ref->size = sizeof(struct ttm_mem_global);
198 global_ref->init = &nouveau_ttm_mem_global_init;
199 global_ref->release = &nouveau_ttm_mem_global_release;
201 ret = drm_global_item_ref(global_ref);
202 if (unlikely(ret != 0)) {
203 DRM_ERROR("Failed setting up TTM memory accounting\n");
204 drm->ttm.mem_global_ref.release = NULL;
205 return ret;
208 drm->ttm.bo_global_ref.mem_glob = global_ref->object;
209 global_ref = &drm->ttm.bo_global_ref.ref;
210 global_ref->global_type = DRM_GLOBAL_TTM_BO;
211 global_ref->size = sizeof(struct ttm_bo_global);
212 global_ref->init = &ttm_bo_global_init;
213 global_ref->release = &ttm_bo_global_release;
215 ret = drm_global_item_ref(global_ref);
216 if (unlikely(ret != 0)) {
217 DRM_ERROR("Failed setting up TTM BO subsystem\n");
218 drm_global_item_unref(&drm->ttm.mem_global_ref);
219 drm->ttm.mem_global_ref.release = NULL;
220 return ret;
223 return 0;
226 void
227 nouveau_ttm_global_release(struct nouveau_drm *drm)
229 if (drm->ttm.mem_global_ref.release == NULL)
230 return;
232 drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
233 drm_global_item_unref(&drm->ttm.mem_global_ref);
234 drm->ttm.mem_global_ref.release = NULL;
237 static int
238 nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind)
240 struct nvif_mmu *mmu = &drm->client.mmu;
241 int typei;
243 typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE |
244 kind | NVIF_MEM_COHERENT);
245 if (typei < 0)
246 return -ENOSYS;
248 drm->ttm.type_host[!!kind] = typei;
250 typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | kind);
251 if (typei < 0)
252 return -ENOSYS;
254 drm->ttm.type_ncoh[!!kind] = typei;
255 return 0;
259 nouveau_ttm_init(struct nouveau_drm *drm)
261 struct nvkm_device *device = nvxx_device(&drm->client.device);
262 struct nvkm_pci *pci = device->pci;
263 struct nvif_mmu *mmu = &drm->client.mmu;
264 struct drm_device *dev = drm->dev;
265 int typei, ret;
267 ret = nouveau_ttm_init_host(drm, 0);
268 if (ret)
269 return ret;
271 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
272 drm->client.device.info.chipset != 0x50) {
273 ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND);
274 if (ret)
275 return ret;
278 if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC &&
279 drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
280 typei = nvif_mmu_type(mmu, NVIF_MEM_VRAM | NVIF_MEM_MAPPABLE |
281 NVIF_MEM_KIND |
282 NVIF_MEM_COMP |
283 NVIF_MEM_DISP);
284 if (typei < 0)
285 return -ENOSYS;
287 drm->ttm.type_vram = typei;
288 } else {
289 drm->ttm.type_vram = -1;
292 if (pci && pci->agp.bridge) {
293 drm->agp.bridge = pci->agp.bridge;
294 drm->agp.base = pci->agp.base;
295 drm->agp.size = pci->agp.size;
296 drm->agp.cma = pci->agp.cma;
299 ret = nouveau_ttm_global_init(drm);
300 if (ret)
301 return ret;
303 ret = ttm_bo_device_init(&drm->ttm.bdev,
304 drm->ttm.bo_global_ref.ref.object,
305 &nouveau_bo_driver,
306 dev->anon_inode->i_mapping,
307 DRM_FILE_PAGE_OFFSET,
308 drm->client.mmu.dmabits <= 32 ? true : false);
309 if (ret) {
310 NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
311 return ret;
314 /* VRAM init */
315 drm->gem.vram_available = drm->client.device.info.ram_user;
317 arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1),
318 device->func->resource_size(device, 1));
320 ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
321 drm->gem.vram_available >> PAGE_SHIFT);
322 if (ret) {
323 NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
324 return ret;
327 drm->ttm.mtrr = arch_phys_wc_add(device->func->resource_addr(device, 1),
328 device->func->resource_size(device, 1));
330 /* GART init */
331 if (!drm->agp.bridge) {
332 drm->gem.gart_available = drm->client.vmm.vmm.limit;
333 } else {
334 drm->gem.gart_available = drm->agp.size;
337 ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
338 drm->gem.gart_available >> PAGE_SHIFT);
339 if (ret) {
340 NV_ERROR(drm, "GART mm init failed, %d\n", ret);
341 return ret;
344 NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
345 NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
346 return 0;
349 void
350 nouveau_ttm_fini(struct nouveau_drm *drm)
352 struct nvkm_device *device = nvxx_device(&drm->client.device);
354 ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
355 ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
357 ttm_bo_device_release(&drm->ttm.bdev);
359 nouveau_ttm_global_release(drm);
361 arch_phys_wc_del(drm->ttm.mtrr);
362 drm->ttm.mtrr = 0;
363 arch_io_free_memtype_wc(device->func->resource_addr(device, 1),
364 device->func->resource_size(device, 1));