drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / sun4i / sun8i_ui_scaler.c
blob6bb2aa164c8e181191e7729bf2d5f81a85f22f8a
1 /*
2 * Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
4 * Coefficients are taken from BSP driver, which is:
5 * Copyright (C) 2014-2015 Allwinner
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include "sun8i_ui_scaler.h"
14 static const u32 lan2coefftab16[240] = {
15 0x00004000, 0x00033ffe, 0x00063efc, 0x000a3bfb,
16 0xff0f37fb, 0xfe1433fb, 0xfd192ffb, 0xfd1f29fb,
17 0xfc2424fc, 0xfb291ffd, 0xfb2f19fd, 0xfb3314fe,
18 0xfb370fff, 0xfb3b0a00, 0xfc3e0600, 0xfe3f0300,
20 0xff053804, 0xff083801, 0xff0a3700, 0xff0e34ff,
21 0xff1232fd, 0xfe162ffd, 0xfd1b2cfc, 0xfd1f28fc,
22 0xfd2323fd, 0xfc281ffd, 0xfc2c1bfd, 0xfd2f16fe,
23 0xfd3212ff, 0xff340eff, 0x00360a00, 0x02370700,
25 0xff083207, 0xff0a3205, 0xff0d3103, 0xfe113001,
26 0xfe142e00, 0xfe182bff, 0xfe1b29fe, 0xfe1f25fe,
27 0xfe2222fe, 0xfe251ffe, 0xfe291bfe, 0xff2b18fe,
28 0x002e14fe, 0x013010ff, 0x03310dff, 0x05310a00,
30 0xff0a2e09, 0xff0c2e07, 0xff0f2d05, 0xff122c03,
31 0xfe152b02, 0xfe182901, 0xfe1b2700, 0xff1e24ff,
32 0xff2121ff, 0xff241eff, 0x00261bff, 0x012818ff,
33 0x022a15ff, 0x032c12ff, 0x052d0fff, 0x072d0c00,
35 0xff0c2a0b, 0xff0e2a09, 0xff102a07, 0xff132905,
36 0xff162803, 0xff182702, 0xff1b2501, 0xff1e2300,
37 0x00202000, 0x01221d00, 0x01251bff, 0x032618ff,
38 0x042815ff, 0x052913ff, 0x072a10ff, 0x092a0d00,
40 0xff0d280c, 0xff0f280a, 0xff112808, 0xff142706,
41 0xff162605, 0xff192503, 0x001b2302, 0x001d2201,
42 0x011f1f01, 0x01221d00, 0x02231b00, 0x04241800,
43 0x052616ff, 0x072713ff, 0x08271100, 0x0a280e00,
45 0xff0e260d, 0xff10260b, 0xff122609, 0xff142508,
46 0x00152506, 0x00182305, 0x001b2203, 0x011d2002,
47 0x011f1f01, 0x02201d01, 0x03221b00, 0x04231801,
48 0x06241600, 0x08251300, 0x09261100, 0x0b260f00,
50 0xff0e250e, 0xff10250c, 0x0011250a, 0x00142408,
51 0x00162307, 0x00182206, 0x011a2104, 0x011c2003,
52 0x021e1e02, 0x03201c01, 0x04211a01, 0x05221801,
53 0x07231600, 0x08241400, 0x0a241200, 0x0c241000,
55 0x000e240e, 0x0010240c, 0x0013230a, 0x00142309,
56 0x00162208, 0x01182106, 0x011a2005, 0x021b1f04,
57 0x031d1d03, 0x041e1c02, 0x05201a01, 0x06211801,
58 0x07221601, 0x09231400, 0x0a231300, 0x0c231100,
60 0x000f220f, 0x0011220d, 0x0013220b, 0x0015210a,
61 0x01162108, 0x01182007, 0x02191f06, 0x031a1e05,
62 0x041c1c04, 0x051d1b03, 0x061f1902, 0x07201801,
63 0x08211601, 0x0a211500, 0x0b221300, 0x0d221100,
65 0x0010210f, 0x0011210e, 0x0013210c, 0x0114200b,
66 0x01161f0a, 0x02171f08, 0x03181e07, 0x031a1d06,
67 0x041c1c04, 0x051d1a04, 0x071d1903, 0x081e1802,
68 0x091f1602, 0x0b1f1501, 0x0c211300, 0x0e201200,
70 0x00102010, 0x0012200e, 0x0013200d, 0x01151f0b,
71 0x01161f0a, 0x02171e09, 0x03191d07, 0x041a1c06,
72 0x051b1b05, 0x061c1a04, 0x071d1903, 0x081e1703,
73 0x0a1f1601, 0x0b1f1501, 0x0d201300, 0x0e201200,
75 0x00102010, 0x00121f0f, 0x00141f0d, 0x01141f0c,
76 0x02161e0a, 0x03171d09, 0x03181d08, 0x041a1c06,
77 0x051b1b05, 0x061c1a04, 0x081c1903, 0x091d1703,
78 0x0a1e1602, 0x0c1e1501, 0x0d1f1400, 0x0e1f1201,
80 0x00111e11, 0x00131e0f, 0x01131e0e, 0x02151d0c,
81 0x02161d0b, 0x03171c0a, 0x04181b09, 0x05191b07,
82 0x061a1a06, 0x071b1905, 0x091b1804, 0x0a1c1703,
83 0x0b1d1602, 0x0c1d1502, 0x0e1d1401, 0x0f1e1300,
85 0x00111e11, 0x00131d10, 0x01141d0e, 0x02151c0d,
86 0x03161c0b, 0x04171b0a, 0x05171b09, 0x06181a08,
87 0x07191907, 0x081a1806, 0x091a1805, 0x0a1b1704,
88 0x0b1c1603, 0x0d1c1502, 0x0e1d1401, 0x0f1d1301,
91 static int sun8i_ui_scaler_coef_index(unsigned int step)
93 unsigned int scale, int_part, float_part;
95 scale = step >> (SUN8I_UI_SCALER_SCALE_FRAC - 3);
96 int_part = scale >> 3;
97 float_part = scale & 0x7;
99 switch (int_part) {
100 case 0:
101 return 0;
102 case 1:
103 return float_part;
104 case 2:
105 return 8 + (float_part >> 1);
106 case 3:
107 return 12;
108 case 4:
109 return 13;
110 default:
111 return 14;
115 void sun8i_ui_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable)
117 int vi_cnt = mixer->cfg->vi_num;
118 u32 val;
120 if (WARN_ON(layer < vi_cnt))
121 return;
123 if (enable)
124 val = SUN8I_SCALER_GSU_CTRL_EN |
125 SUN8I_SCALER_GSU_CTRL_COEFF_RDY;
126 else
127 val = 0;
129 regmap_write(mixer->engine.regs,
130 SUN8I_SCALER_GSU_CTRL(vi_cnt, layer - vi_cnt), val);
133 void sun8i_ui_scaler_setup(struct sun8i_mixer *mixer, int layer,
134 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
135 u32 hscale, u32 vscale, u32 hphase, u32 vphase)
137 int vi_cnt = mixer->cfg->vi_num;
138 u32 insize, outsize;
139 int i, offset;
141 if (WARN_ON(layer < vi_cnt))
142 return;
144 hphase <<= SUN8I_UI_SCALER_PHASE_FRAC - 16;
145 vphase <<= SUN8I_UI_SCALER_PHASE_FRAC - 16;
146 hscale <<= SUN8I_UI_SCALER_SCALE_FRAC - 16;
147 vscale <<= SUN8I_UI_SCALER_SCALE_FRAC - 16;
149 insize = SUN8I_UI_SCALER_SIZE(src_w, src_h);
150 outsize = SUN8I_UI_SCALER_SIZE(dst_w, dst_h);
152 layer -= vi_cnt;
154 regmap_write(mixer->engine.regs,
155 SUN8I_SCALER_GSU_OUTSIZE(vi_cnt, layer), outsize);
156 regmap_write(mixer->engine.regs,
157 SUN8I_SCALER_GSU_INSIZE(vi_cnt, layer), insize);
158 regmap_write(mixer->engine.regs,
159 SUN8I_SCALER_GSU_HSTEP(vi_cnt, layer), hscale);
160 regmap_write(mixer->engine.regs,
161 SUN8I_SCALER_GSU_VSTEP(vi_cnt, layer), vscale);
162 regmap_write(mixer->engine.regs,
163 SUN8I_SCALER_GSU_HPHASE(vi_cnt, layer), hphase);
164 regmap_write(mixer->engine.regs,
165 SUN8I_SCALER_GSU_VPHASE(vi_cnt, layer), vphase);
166 offset = sun8i_ui_scaler_coef_index(hscale) *
167 SUN8I_UI_SCALER_COEFF_COUNT;
168 for (i = 0; i < SUN8I_UI_SCALER_COEFF_COUNT; i++)
169 regmap_write(mixer->engine.regs,
170 SUN8I_SCALER_GSU_HCOEFF(vi_cnt, layer, i),
171 lan2coefftab16[offset + i]);