drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / vmwgfx / vmwgfx_stdu.c
blobf30e839f7bfd2d946bbe908e20211719646ff8b5
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /******************************************************************************
4 * COPYRIGHT (C) 2014-2015 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 ******************************************************************************/
28 #include "vmwgfx_kms.h"
29 #include "device_include/svga3d_surfacedefs.h"
30 #include <drm/drm_plane_helper.h>
31 #include <drm/drm_atomic.h>
32 #include <drm/drm_atomic_helper.h>
35 #define vmw_crtc_to_stdu(x) \
36 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37 #define vmw_encoder_to_stdu(x) \
38 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39 #define vmw_connector_to_stdu(x) \
40 container_of(x, struct vmw_screen_target_display_unit, base.connector)
44 enum stdu_content_type {
45 SAME_AS_DISPLAY = 0,
46 SEPARATE_SURFACE,
47 SEPARATE_BO
50 /**
51 * struct vmw_stdu_dirty - closure structure for the update functions
53 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
54 * @transfer: Transfer direction for DMA command.
55 * @left: Left side of bounding box.
56 * @right: Right side of bounding box.
57 * @top: Top side of bounding box.
58 * @bottom: Bottom side of bounding box.
59 * @fb_left: Left side of the framebuffer/content bounding box
60 * @fb_top: Top of the framebuffer/content bounding box
61 * @buf: buffer object when DMA-ing between buffer and screen targets.
62 * @sid: Surface ID when copying between surface and screen targets.
64 struct vmw_stdu_dirty {
65 struct vmw_kms_dirty base;
66 SVGA3dTransferType transfer;
67 s32 left, right, top, bottom;
68 s32 fb_left, fb_top;
69 u32 pitch;
70 union {
71 struct vmw_buffer_object *buf;
72 u32 sid;
77 * SVGA commands that are used by this code. Please see the device headers
78 * for explanation.
80 struct vmw_stdu_update {
81 SVGA3dCmdHeader header;
82 SVGA3dCmdUpdateGBScreenTarget body;
85 struct vmw_stdu_dma {
86 SVGA3dCmdHeader header;
87 SVGA3dCmdSurfaceDMA body;
90 struct vmw_stdu_surface_copy {
91 SVGA3dCmdHeader header;
92 SVGA3dCmdSurfaceCopy body;
96 /**
97 * struct vmw_screen_target_display_unit
99 * @base: VMW specific DU structure
100 * @display_srf: surface to be displayed. The dimension of this will always
101 * match the display mode. If the display mode matches
102 * content_vfbs dimensions, then this is a pointer into the
103 * corresponding field in content_vfbs. If not, then this
104 * is a separate buffer to which content_vfbs will blit to.
105 * @content_type: content_fb type
106 * @defined: true if the current display unit has been initialized
108 struct vmw_screen_target_display_unit {
109 struct vmw_display_unit base;
110 const struct vmw_surface *display_srf;
111 enum stdu_content_type content_fb_type;
112 s32 display_width, display_height;
114 bool defined;
116 /* For CPU Blit */
117 unsigned int cpp;
122 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
126 /******************************************************************************
127 * Screen Target Display Unit CRTC Functions
128 *****************************************************************************/
132 * vmw_stdu_crtc_destroy - cleans up the STDU
134 * @crtc: used to get a reference to the containing STDU
136 static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
138 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
142 * vmw_stdu_define_st - Defines a Screen Target
144 * @dev_priv: VMW DRM device
145 * @stdu: display unit to create a Screen Target for
146 * @mode: The mode to set.
147 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
148 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
150 * Creates a STDU that we can used later. This function is called whenever the
151 * framebuffer size changes.
153 * RETURNs:
154 * 0 on success, error code on failure
156 static int vmw_stdu_define_st(struct vmw_private *dev_priv,
157 struct vmw_screen_target_display_unit *stdu,
158 struct drm_display_mode *mode,
159 int crtc_x, int crtc_y)
161 struct {
162 SVGA3dCmdHeader header;
163 SVGA3dCmdDefineGBScreenTarget body;
164 } *cmd;
166 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
168 if (unlikely(cmd == NULL)) {
169 DRM_ERROR("Out of FIFO space defining Screen Target\n");
170 return -ENOMEM;
173 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
174 cmd->header.size = sizeof(cmd->body);
176 cmd->body.stid = stdu->base.unit;
177 cmd->body.width = mode->hdisplay;
178 cmd->body.height = mode->vdisplay;
179 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
180 cmd->body.dpi = 0;
181 cmd->body.xRoot = crtc_x;
182 cmd->body.yRoot = crtc_y;
184 stdu->base.set_gui_x = cmd->body.xRoot;
185 stdu->base.set_gui_y = cmd->body.yRoot;
187 vmw_fifo_commit(dev_priv, sizeof(*cmd));
189 stdu->defined = true;
190 stdu->display_width = mode->hdisplay;
191 stdu->display_height = mode->vdisplay;
193 return 0;
199 * vmw_stdu_bind_st - Binds a surface to a Screen Target
201 * @dev_priv: VMW DRM device
202 * @stdu: display unit affected
203 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
205 * Binding a surface to a Screen Target the same as flipping
207 static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
208 struct vmw_screen_target_display_unit *stdu,
209 const struct vmw_resource *res)
211 SVGA3dSurfaceImageId image;
213 struct {
214 SVGA3dCmdHeader header;
215 SVGA3dCmdBindGBScreenTarget body;
216 } *cmd;
219 if (!stdu->defined) {
220 DRM_ERROR("No screen target defined\n");
221 return -EINVAL;
224 /* Set up image using information in vfb */
225 memset(&image, 0, sizeof(image));
226 image.sid = res ? res->id : SVGA3D_INVALID_ID;
228 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
230 if (unlikely(cmd == NULL)) {
231 DRM_ERROR("Out of FIFO space binding a screen target\n");
232 return -ENOMEM;
235 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
236 cmd->header.size = sizeof(cmd->body);
238 cmd->body.stid = stdu->base.unit;
239 cmd->body.image = image;
241 vmw_fifo_commit(dev_priv, sizeof(*cmd));
243 return 0;
247 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
248 * bounding box.
250 * @cmd: Pointer to command stream.
251 * @unit: Screen target unit.
252 * @left: Left side of bounding box.
253 * @right: Right side of bounding box.
254 * @top: Top side of bounding box.
255 * @bottom: Bottom side of bounding box.
257 static void vmw_stdu_populate_update(void *cmd, int unit,
258 s32 left, s32 right, s32 top, s32 bottom)
260 struct vmw_stdu_update *update = cmd;
262 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
263 update->header.size = sizeof(update->body);
265 update->body.stid = unit;
266 update->body.rect.x = left;
267 update->body.rect.y = top;
268 update->body.rect.w = right - left;
269 update->body.rect.h = bottom - top;
273 * vmw_stdu_update_st - Full update of a Screen Target
275 * @dev_priv: VMW DRM device
276 * @stdu: display unit affected
278 * This function needs to be called whenever the content of a screen
279 * target has changed completely. Typically as a result of a backing
280 * surface change.
282 * RETURNS:
283 * 0 on success, error code on failure
285 static int vmw_stdu_update_st(struct vmw_private *dev_priv,
286 struct vmw_screen_target_display_unit *stdu)
288 struct vmw_stdu_update *cmd;
290 if (!stdu->defined) {
291 DRM_ERROR("No screen target defined");
292 return -EINVAL;
295 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
297 if (unlikely(cmd == NULL)) {
298 DRM_ERROR("Out of FIFO space updating a Screen Target\n");
299 return -ENOMEM;
302 vmw_stdu_populate_update(cmd, stdu->base.unit,
303 0, stdu->display_width,
304 0, stdu->display_height);
306 vmw_fifo_commit(dev_priv, sizeof(*cmd));
308 return 0;
314 * vmw_stdu_destroy_st - Destroy a Screen Target
316 * @dev_priv: VMW DRM device
317 * @stdu: display unit to destroy
319 static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
320 struct vmw_screen_target_display_unit *stdu)
322 int ret;
324 struct {
325 SVGA3dCmdHeader header;
326 SVGA3dCmdDestroyGBScreenTarget body;
327 } *cmd;
330 /* Nothing to do if not successfully defined */
331 if (unlikely(!stdu->defined))
332 return 0;
334 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
336 if (unlikely(cmd == NULL)) {
337 DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
338 return -ENOMEM;
341 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
342 cmd->header.size = sizeof(cmd->body);
344 cmd->body.stid = stdu->base.unit;
346 vmw_fifo_commit(dev_priv, sizeof(*cmd));
348 /* Force sync */
349 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
350 if (unlikely(ret != 0))
351 DRM_ERROR("Failed to sync with HW");
353 stdu->defined = false;
354 stdu->display_width = 0;
355 stdu->display_height = 0;
357 return ret;
362 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
364 * @crtc: CRTC associated with the screen target
366 * This function defines/destroys a screen target
369 static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
371 struct vmw_private *dev_priv;
372 struct vmw_screen_target_display_unit *stdu;
373 struct drm_connector_state *conn_state;
374 struct vmw_connector_state *vmw_conn_state;
375 int x, y, ret;
377 stdu = vmw_crtc_to_stdu(crtc);
378 dev_priv = vmw_priv(crtc->dev);
379 conn_state = stdu->base.connector.state;
380 vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
382 if (stdu->defined) {
383 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
384 if (ret)
385 DRM_ERROR("Failed to blank CRTC\n");
387 (void) vmw_stdu_update_st(dev_priv, stdu);
389 ret = vmw_stdu_destroy_st(dev_priv, stdu);
390 if (ret)
391 DRM_ERROR("Failed to destroy Screen Target\n");
393 stdu->content_fb_type = SAME_AS_DISPLAY;
396 if (!crtc->state->enable)
397 return;
399 if (stdu->base.is_implicit) {
400 x = crtc->x;
401 y = crtc->y;
402 } else {
403 x = vmw_conn_state->gui_x;
404 y = vmw_conn_state->gui_y;
407 vmw_svga_enable(dev_priv);
408 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
410 if (ret)
411 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
412 crtc->x, crtc->y);
416 static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
421 static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
422 struct drm_crtc_state *old_state)
424 struct drm_plane_state *plane_state = crtc->primary->state;
425 struct vmw_private *dev_priv;
426 struct vmw_screen_target_display_unit *stdu;
427 struct vmw_framebuffer *vfb;
428 struct drm_framebuffer *fb;
431 stdu = vmw_crtc_to_stdu(crtc);
432 dev_priv = vmw_priv(crtc->dev);
433 fb = plane_state->fb;
435 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
437 if (vfb)
438 vmw_kms_add_active(dev_priv, &stdu->base, vfb);
439 else
440 vmw_kms_del_active(dev_priv, &stdu->base);
443 static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
444 struct drm_crtc_state *old_state)
446 struct vmw_private *dev_priv;
447 struct vmw_screen_target_display_unit *stdu;
448 int ret;
451 if (!crtc) {
452 DRM_ERROR("CRTC is NULL\n");
453 return;
456 stdu = vmw_crtc_to_stdu(crtc);
457 dev_priv = vmw_priv(crtc->dev);
459 if (stdu->defined) {
460 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
461 if (ret)
462 DRM_ERROR("Failed to blank CRTC\n");
464 (void) vmw_stdu_update_st(dev_priv, stdu);
466 ret = vmw_stdu_destroy_st(dev_priv, stdu);
467 if (ret)
468 DRM_ERROR("Failed to destroy Screen Target\n");
470 stdu->content_fb_type = SAME_AS_DISPLAY;
475 * vmw_stdu_crtc_page_flip - Binds a buffer to a screen target
477 * @crtc: CRTC to attach FB to
478 * @fb: FB to attach
479 * @event: Event to be posted. This event should've been alloced
480 * using k[mz]alloc, and should've been completely initialized.
481 * @page_flip_flags: Input flags.
483 * If the STDU uses the same display and content buffers, i.e. a true flip,
484 * this function will replace the existing display buffer with the new content
485 * buffer.
487 * If the STDU uses different display and content buffers, i.e. a blit, then
488 * only the content buffer will be updated.
490 * RETURNS:
491 * 0 on success, error code on failure
493 static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
494 struct drm_framebuffer *new_fb,
495 struct drm_pending_vblank_event *event,
496 uint32_t flags,
497 struct drm_modeset_acquire_ctx *ctx)
500 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
501 struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
502 int ret;
504 if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
505 return -EINVAL;
507 ret = drm_atomic_helper_page_flip(crtc, new_fb, event, flags, ctx);
508 if (ret) {
509 DRM_ERROR("Page flip error %d.\n", ret);
510 return ret;
513 return 0;
518 * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
520 * @dirty: The closure structure.
522 * Encodes a surface DMA command cliprect and updates the bounding box
523 * for the DMA.
525 static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
527 struct vmw_stdu_dirty *ddirty =
528 container_of(dirty, struct vmw_stdu_dirty, base);
529 struct vmw_stdu_dma *cmd = dirty->cmd;
530 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
532 blit += dirty->num_hits;
533 blit->srcx = dirty->fb_x;
534 blit->srcy = dirty->fb_y;
535 blit->x = dirty->unit_x1;
536 blit->y = dirty->unit_y1;
537 blit->d = 1;
538 blit->w = dirty->unit_x2 - dirty->unit_x1;
539 blit->h = dirty->unit_y2 - dirty->unit_y1;
540 dirty->num_hits++;
542 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
543 return;
545 /* Destination bounding box */
546 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
547 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
548 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
549 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
553 * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
555 * @dirty: The closure structure.
557 * Fills in the missing fields in a DMA command, and optionally encodes
558 * a screen target update command, depending on transfer direction.
560 static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
562 struct vmw_stdu_dirty *ddirty =
563 container_of(dirty, struct vmw_stdu_dirty, base);
564 struct vmw_screen_target_display_unit *stdu =
565 container_of(dirty->unit, typeof(*stdu), base);
566 struct vmw_stdu_dma *cmd = dirty->cmd;
567 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
568 SVGA3dCmdSurfaceDMASuffix *suffix =
569 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
570 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
572 if (!dirty->num_hits) {
573 vmw_fifo_commit(dirty->dev_priv, 0);
574 return;
577 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
578 cmd->header.size = sizeof(cmd->body) + blit_size;
579 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
580 cmd->body.guest.pitch = ddirty->pitch;
581 cmd->body.host.sid = stdu->display_srf->res.id;
582 cmd->body.host.face = 0;
583 cmd->body.host.mipmap = 0;
584 cmd->body.transfer = ddirty->transfer;
585 suffix->suffixSize = sizeof(*suffix);
586 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
588 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
589 blit_size += sizeof(struct vmw_stdu_update);
591 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
592 ddirty->left, ddirty->right,
593 ddirty->top, ddirty->bottom);
596 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
598 ddirty->left = ddirty->top = S32_MAX;
599 ddirty->right = ddirty->bottom = S32_MIN;
604 * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
606 * @dirty: The closure structure.
608 * This function calculates the bounding box for all the incoming clips.
610 static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
612 struct vmw_stdu_dirty *ddirty =
613 container_of(dirty, struct vmw_stdu_dirty, base);
615 dirty->num_hits = 1;
617 /* Calculate destination bounding box */
618 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
619 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
620 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
621 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
624 * Calculate content bounding box. We only need the top-left
625 * coordinate because width and height will be the same as the
626 * destination bounding box above
628 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
629 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
634 * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
636 * @dirty: The closure structure.
638 * For the special case when we cannot create a proxy surface in a
639 * 2D VM, we have to do a CPU blit ourselves.
641 static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
643 struct vmw_stdu_dirty *ddirty =
644 container_of(dirty, struct vmw_stdu_dirty, base);
645 struct vmw_screen_target_display_unit *stdu =
646 container_of(dirty->unit, typeof(*stdu), base);
647 s32 width, height;
648 s32 src_pitch, dst_pitch;
649 struct ttm_buffer_object *src_bo, *dst_bo;
650 u32 src_offset, dst_offset;
651 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
653 if (!dirty->num_hits)
654 return;
656 width = ddirty->right - ddirty->left;
657 height = ddirty->bottom - ddirty->top;
659 if (width == 0 || height == 0)
660 return;
662 /* Assume we are blitting from Guest (bo) to Host (display_srf) */
663 dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
664 dst_bo = &stdu->display_srf->res.backup->base;
665 dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
667 src_pitch = ddirty->pitch;
668 src_bo = &ddirty->buf->base;
669 src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
671 /* Swap src and dst if the assumption was wrong. */
672 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
673 swap(dst_pitch, src_pitch);
674 swap(dst_bo, src_bo);
675 swap(src_offset, dst_offset);
678 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
679 src_bo, src_offset, src_pitch,
680 width * stdu->cpp, height, &diff);
682 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
683 drm_rect_visible(&diff.rect)) {
684 struct vmw_private *dev_priv;
685 struct vmw_stdu_update *cmd;
686 struct drm_clip_rect region;
687 int ret;
689 /* We are updating the actual surface, not a proxy */
690 region.x1 = diff.rect.x1;
691 region.x2 = diff.rect.x2;
692 region.y1 = diff.rect.y1;
693 region.y2 = diff.rect.y2;
694 ret = vmw_kms_update_proxy(
695 (struct vmw_resource *) &stdu->display_srf->res,
696 (const struct drm_clip_rect *) &region, 1, 1);
697 if (ret)
698 goto out_cleanup;
701 dev_priv = vmw_priv(stdu->base.crtc.dev);
702 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
704 if (!cmd) {
705 DRM_ERROR("Cannot reserve FIFO space to update STDU");
706 goto out_cleanup;
709 vmw_stdu_populate_update(cmd, stdu->base.unit,
710 region.x1, region.x2,
711 region.y1, region.y2);
713 vmw_fifo_commit(dev_priv, sizeof(*cmd));
716 out_cleanup:
717 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
718 ddirty->right = ddirty->bottom = S32_MIN;
722 * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
723 * framebuffer and the screen target system.
725 * @dev_priv: Pointer to the device private structure.
726 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
727 * set to NULL, but then @user_fence_rep must also be set to NULL.
728 * @vfb: Pointer to the buffer-object backed framebuffer.
729 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
730 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
731 * be NULL.
732 * @num_clips: Number of clip rects in @clips or @vclips.
733 * @increment: Increment to use when looping over @clips or @vclips.
734 * @to_surface: Whether to DMA to the screen target system as opposed to
735 * from the screen target system.
736 * @interruptible: Whether to perform waits interruptible if possible.
737 * @crtc: If crtc is passed, perform stdu dma on that crtc only.
739 * If DMA-ing till the screen target system, the function will also notify
740 * the screen target system that a bounding box of the cliprects has been
741 * updated.
742 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
743 * interrupted.
745 int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
746 struct drm_file *file_priv,
747 struct vmw_framebuffer *vfb,
748 struct drm_vmw_fence_rep __user *user_fence_rep,
749 struct drm_clip_rect *clips,
750 struct drm_vmw_rect *vclips,
751 uint32_t num_clips,
752 int increment,
753 bool to_surface,
754 bool interruptible,
755 struct drm_crtc *crtc)
757 struct vmw_buffer_object *buf =
758 container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
759 struct vmw_stdu_dirty ddirty;
760 int ret;
761 bool cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
764 * VMs without 3D support don't have the surface DMA command and
765 * we'll be using a CPU blit, and the framebuffer should be moved out
766 * of VRAM.
768 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
769 false, cpu_blit);
770 if (ret)
771 return ret;
773 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
774 SVGA3D_READ_HOST_VRAM;
775 ddirty.left = ddirty.top = S32_MAX;
776 ddirty.right = ddirty.bottom = S32_MIN;
777 ddirty.fb_left = ddirty.fb_top = S32_MAX;
778 ddirty.pitch = vfb->base.pitches[0];
779 ddirty.buf = buf;
780 ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
781 ddirty.base.clip = vmw_stdu_bo_clip;
782 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
783 num_clips * sizeof(SVGA3dCopyBox) +
784 sizeof(SVGA3dCmdSurfaceDMASuffix);
785 if (to_surface)
786 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
789 if (cpu_blit) {
790 ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
791 ddirty.base.clip = vmw_stdu_bo_cpu_clip;
792 ddirty.base.fifo_reserve_size = 0;
795 ddirty.base.crtc = crtc;
797 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
798 0, 0, num_clips, increment, &ddirty.base);
799 vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
800 user_fence_rep);
802 return ret;
806 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
808 * @dirty: The closure structure.
810 * Encodes a surface copy command cliprect and updates the bounding box
811 * for the copy.
813 static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
815 struct vmw_stdu_dirty *sdirty =
816 container_of(dirty, struct vmw_stdu_dirty, base);
817 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
818 struct vmw_screen_target_display_unit *stdu =
819 container_of(dirty->unit, typeof(*stdu), base);
821 if (sdirty->sid != stdu->display_srf->res.id) {
822 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
824 blit += dirty->num_hits;
825 blit->srcx = dirty->fb_x;
826 blit->srcy = dirty->fb_y;
827 blit->x = dirty->unit_x1;
828 blit->y = dirty->unit_y1;
829 blit->d = 1;
830 blit->w = dirty->unit_x2 - dirty->unit_x1;
831 blit->h = dirty->unit_y2 - dirty->unit_y1;
834 dirty->num_hits++;
836 /* Destination bounding box */
837 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
838 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
839 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
840 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
844 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
845 * copy command.
847 * @dirty: The closure structure.
849 * Fills in the missing fields in a surface copy command, and encodes a screen
850 * target update command.
852 static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
854 struct vmw_stdu_dirty *sdirty =
855 container_of(dirty, struct vmw_stdu_dirty, base);
856 struct vmw_screen_target_display_unit *stdu =
857 container_of(dirty->unit, typeof(*stdu), base);
858 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
859 struct vmw_stdu_update *update;
860 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
861 size_t commit_size;
863 if (!dirty->num_hits) {
864 vmw_fifo_commit(dirty->dev_priv, 0);
865 return;
868 if (sdirty->sid != stdu->display_srf->res.id) {
869 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
871 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
872 cmd->header.size = sizeof(cmd->body) + blit_size;
873 cmd->body.src.sid = sdirty->sid;
874 cmd->body.dest.sid = stdu->display_srf->res.id;
875 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
876 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
877 } else {
878 update = dirty->cmd;
879 commit_size = sizeof(*update);
882 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
883 sdirty->right, sdirty->top, sdirty->bottom);
885 vmw_fifo_commit(dirty->dev_priv, commit_size);
887 sdirty->left = sdirty->top = S32_MAX;
888 sdirty->right = sdirty->bottom = S32_MIN;
892 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
894 * @dev_priv: Pointer to the device private structure.
895 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
896 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
897 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
898 * be NULL.
899 * @srf: Pointer to surface to blit from. If NULL, the surface attached
900 * to @framebuffer will be used.
901 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
902 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
903 * @num_clips: Number of clip rects in @clips.
904 * @inc: Increment to use when looping over @clips.
905 * @out_fence: If non-NULL, will return a ref-counted pointer to a
906 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
907 * case the device has already synchronized.
908 * @crtc: If crtc is passed, perform surface dirty on that crtc only.
910 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
911 * interrupted.
913 int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
914 struct vmw_framebuffer *framebuffer,
915 struct drm_clip_rect *clips,
916 struct drm_vmw_rect *vclips,
917 struct vmw_resource *srf,
918 s32 dest_x,
919 s32 dest_y,
920 unsigned num_clips, int inc,
921 struct vmw_fence_obj **out_fence,
922 struct drm_crtc *crtc)
924 struct vmw_framebuffer_surface *vfbs =
925 container_of(framebuffer, typeof(*vfbs), base);
926 struct vmw_stdu_dirty sdirty;
927 struct vmw_validation_ctx ctx;
928 int ret;
930 if (!srf)
931 srf = &vfbs->surface->res;
933 ret = vmw_kms_helper_resource_prepare(srf, true, &ctx);
934 if (ret)
935 return ret;
937 if (vfbs->is_bo_proxy) {
938 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
939 if (ret)
940 goto out_finish;
943 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
944 sdirty.base.clip = vmw_kms_stdu_surface_clip;
945 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
946 sizeof(SVGA3dCopyBox) * num_clips +
947 sizeof(struct vmw_stdu_update);
948 sdirty.base.crtc = crtc;
949 sdirty.sid = srf->id;
950 sdirty.left = sdirty.top = S32_MAX;
951 sdirty.right = sdirty.bottom = S32_MIN;
953 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
954 dest_x, dest_y, num_clips, inc,
955 &sdirty.base);
956 out_finish:
957 vmw_kms_helper_resource_finish(&ctx, out_fence);
959 return ret;
964 * Screen Target CRTC dispatch table
966 static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
967 .gamma_set = vmw_du_crtc_gamma_set,
968 .destroy = vmw_stdu_crtc_destroy,
969 .reset = vmw_du_crtc_reset,
970 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
971 .atomic_destroy_state = vmw_du_crtc_destroy_state,
972 .set_config = vmw_kms_set_config,
973 .page_flip = vmw_stdu_crtc_page_flip,
978 /******************************************************************************
979 * Screen Target Display Unit Encoder Functions
980 *****************************************************************************/
983 * vmw_stdu_encoder_destroy - cleans up the STDU
985 * @encoder: used the get the containing STDU
987 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
988 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
989 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
990 * get called.
992 static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
994 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
997 static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
998 .destroy = vmw_stdu_encoder_destroy,
1003 /******************************************************************************
1004 * Screen Target Display Unit Connector Functions
1005 *****************************************************************************/
1008 * vmw_stdu_connector_destroy - cleans up the STDU
1010 * @connector: used to get the containing STDU
1012 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1013 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1014 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1015 * get called.
1017 static void vmw_stdu_connector_destroy(struct drm_connector *connector)
1019 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
1024 static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
1025 .dpms = vmw_du_connector_dpms,
1026 .detect = vmw_du_connector_detect,
1027 .fill_modes = vmw_du_connector_fill_modes,
1028 .set_property = vmw_du_connector_set_property,
1029 .destroy = vmw_stdu_connector_destroy,
1030 .reset = vmw_du_connector_reset,
1031 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
1032 .atomic_destroy_state = vmw_du_connector_destroy_state,
1033 .atomic_set_property = vmw_du_connector_atomic_set_property,
1034 .atomic_get_property = vmw_du_connector_atomic_get_property,
1038 static const struct
1039 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
1040 .best_encoder = drm_atomic_helper_best_encoder,
1045 /******************************************************************************
1046 * Screen Target Display Plane Functions
1047 *****************************************************************************/
1052 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1054 * @plane: display plane
1055 * @old_state: Contains the FB to clean up
1057 * Unpins the display surface
1059 * Returns 0 on success
1061 static void
1062 vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1063 struct drm_plane_state *old_state)
1065 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1067 if (vps->surf)
1068 WARN_ON(!vps->pinned);
1070 vmw_du_plane_cleanup_fb(plane, old_state);
1072 vps->content_fb_type = SAME_AS_DISPLAY;
1073 vps->cpp = 0;
1079 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1081 * @plane: display plane
1082 * @new_state: info on the new plane state, including the FB
1084 * This function allocates a new display surface if the content is
1085 * backed by a buffer object. The display surface is pinned here, and it'll
1086 * be unpinned in .cleanup_fb()
1088 * Returns 0 on success
1090 static int
1091 vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1092 struct drm_plane_state *new_state)
1094 struct vmw_private *dev_priv = vmw_priv(plane->dev);
1095 struct drm_framebuffer *new_fb = new_state->fb;
1096 struct vmw_framebuffer *vfb;
1097 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1098 enum stdu_content_type new_content_type;
1099 struct vmw_framebuffer_surface *new_vfbs;
1100 struct drm_crtc *crtc = new_state->crtc;
1101 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1102 int ret;
1104 /* No FB to prepare */
1105 if (!new_fb) {
1106 if (vps->surf) {
1107 WARN_ON(vps->pinned != 0);
1108 vmw_surface_unreference(&vps->surf);
1111 return 0;
1114 vfb = vmw_framebuffer_to_vfb(new_fb);
1115 new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1117 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1118 new_vfbs->surface->base_size.height == vdisplay)
1119 new_content_type = SAME_AS_DISPLAY;
1120 else if (vfb->bo)
1121 new_content_type = SEPARATE_BO;
1122 else
1123 new_content_type = SEPARATE_SURFACE;
1125 if (new_content_type != SAME_AS_DISPLAY) {
1126 struct vmw_surface content_srf;
1127 struct drm_vmw_size display_base_size = {0};
1129 display_base_size.width = hdisplay;
1130 display_base_size.height = vdisplay;
1131 display_base_size.depth = 1;
1134 * If content buffer is a buffer object, then we have to
1135 * construct surface info
1137 if (new_content_type == SEPARATE_BO) {
1139 switch (new_fb->format->cpp[0]*8) {
1140 case 32:
1141 content_srf.format = SVGA3D_X8R8G8B8;
1142 break;
1144 case 16:
1145 content_srf.format = SVGA3D_R5G6B5;
1146 break;
1148 case 8:
1149 content_srf.format = SVGA3D_P8;
1150 break;
1152 default:
1153 DRM_ERROR("Invalid format\n");
1154 return -EINVAL;
1157 content_srf.flags = 0;
1158 content_srf.mip_levels[0] = 1;
1159 content_srf.multisample_count = 0;
1160 content_srf.multisample_pattern =
1161 SVGA3D_MS_PATTERN_NONE;
1162 content_srf.quality_level = SVGA3D_MS_QUALITY_NONE;
1163 } else {
1164 content_srf = *new_vfbs->surface;
1167 if (vps->surf) {
1168 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1170 if (cur_base_size.width != display_base_size.width ||
1171 cur_base_size.height != display_base_size.height ||
1172 vps->surf->format != content_srf.format) {
1173 WARN_ON(vps->pinned != 0);
1174 vmw_surface_unreference(&vps->surf);
1179 if (!vps->surf) {
1180 ret = vmw_surface_gb_priv_define
1181 (crtc->dev,
1182 /* Kernel visible only */
1184 content_srf.flags,
1185 content_srf.format,
1186 true, /* a scanout buffer */
1187 content_srf.mip_levels[0],
1188 content_srf.multisample_count,
1190 display_base_size,
1191 content_srf.multisample_pattern,
1192 content_srf.quality_level,
1193 &vps->surf);
1194 if (ret != 0) {
1195 DRM_ERROR("Couldn't allocate STDU surface.\n");
1196 return ret;
1199 } else {
1201 * prepare_fb and clean_fb should only take care of pinning
1202 * and unpinning. References are tracked by state objects.
1203 * The only time we add a reference in prepare_fb is if the
1204 * state object doesn't have a reference to begin with
1206 if (vps->surf) {
1207 WARN_ON(vps->pinned != 0);
1208 vmw_surface_unreference(&vps->surf);
1211 vps->surf = vmw_surface_reference(new_vfbs->surface);
1214 if (vps->surf) {
1216 /* Pin new surface before flipping */
1217 ret = vmw_resource_pin(&vps->surf->res, false);
1218 if (ret)
1219 goto out_srf_unref;
1221 vps->pinned++;
1224 vps->content_fb_type = new_content_type;
1227 * This should only happen if the buffer object is too large to create a
1228 * proxy surface for.
1229 * If we are a 2D VM with a buffer object then we have to use CPU blit
1230 * so cache these mappings
1232 if (vps->content_fb_type == SEPARATE_BO &&
1233 !(dev_priv->capabilities & SVGA_CAP_3D))
1234 vps->cpp = new_fb->pitches[0] / new_fb->width;
1236 return 0;
1238 out_srf_unref:
1239 vmw_surface_unreference(&vps->surf);
1240 return ret;
1246 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1248 * @plane: display plane
1249 * @old_state: Only used to get crtc info
1251 * Formally update stdu->display_srf to the new plane, and bind the new
1252 * plane STDU. This function is called during the commit phase when
1253 * all the preparation have been done and all the configurations have
1254 * been checked.
1256 static void
1257 vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1258 struct drm_plane_state *old_state)
1260 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1261 struct drm_crtc *crtc = plane->state->crtc;
1262 struct vmw_screen_target_display_unit *stdu;
1263 struct drm_pending_vblank_event *event;
1264 struct vmw_private *dev_priv;
1265 int ret;
1268 * We cannot really fail this function, so if we do, then output an
1269 * error and maintain consistent atomic state.
1271 if (crtc && plane->state->fb) {
1272 struct vmw_framebuffer *vfb =
1273 vmw_framebuffer_to_vfb(plane->state->fb);
1274 struct drm_vmw_rect vclips;
1275 stdu = vmw_crtc_to_stdu(crtc);
1276 dev_priv = vmw_priv(crtc->dev);
1278 stdu->display_srf = vps->surf;
1279 stdu->content_fb_type = vps->content_fb_type;
1280 stdu->cpp = vps->cpp;
1282 vclips.x = crtc->x;
1283 vclips.y = crtc->y;
1284 vclips.w = crtc->mode.hdisplay;
1285 vclips.h = crtc->mode.vdisplay;
1287 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1288 if (ret)
1289 DRM_ERROR("Failed to bind surface to STDU.\n");
1291 if (vfb->bo)
1292 ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL,
1293 &vclips, 1, 1, true, false,
1294 crtc);
1295 else
1296 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL,
1297 &vclips, NULL, 0, 0,
1298 1, 1, NULL, crtc);
1299 if (ret)
1300 DRM_ERROR("Failed to update STDU.\n");
1301 } else {
1302 crtc = old_state->crtc;
1303 stdu = vmw_crtc_to_stdu(crtc);
1304 dev_priv = vmw_priv(crtc->dev);
1307 * When disabling a plane, CRTC and FB should always be NULL
1308 * together, otherwise it's an error.
1309 * Here primary plane is being disable so blank the screen
1310 * target display unit, if not already done.
1312 if (!stdu->defined)
1313 return;
1315 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1316 if (ret)
1317 DRM_ERROR("Failed to blank STDU\n");
1319 ret = vmw_stdu_update_st(dev_priv, stdu);
1320 if (ret)
1321 DRM_ERROR("Failed to update STDU.\n");
1323 return;
1326 event = crtc->state->event;
1328 * In case of failure and other cases, vblank event will be sent in
1329 * vmw_du_crtc_atomic_flush.
1331 if (event && (ret == 0)) {
1332 struct vmw_fence_obj *fence = NULL;
1333 struct drm_file *file_priv = event->base.file_priv;
1335 vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
1338 * If fence is NULL, then already sync.
1340 if (fence) {
1341 ret = vmw_event_fence_action_queue(
1342 file_priv, fence, &event->base,
1343 &event->event.vbl.tv_sec,
1344 &event->event.vbl.tv_usec,
1345 true);
1346 if (ret)
1347 DRM_ERROR("Failed to queue event on fence.\n");
1348 else
1349 crtc->state->event = NULL;
1351 vmw_fence_obj_unreference(&fence);
1353 } else {
1354 (void) vmw_fifo_flush(dev_priv, false);
1359 static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1360 .update_plane = drm_atomic_helper_update_plane,
1361 .disable_plane = drm_atomic_helper_disable_plane,
1362 .destroy = vmw_du_primary_plane_destroy,
1363 .reset = vmw_du_plane_reset,
1364 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1365 .atomic_destroy_state = vmw_du_plane_destroy_state,
1368 static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1369 .update_plane = drm_atomic_helper_update_plane,
1370 .disable_plane = drm_atomic_helper_disable_plane,
1371 .destroy = vmw_du_cursor_plane_destroy,
1372 .reset = vmw_du_plane_reset,
1373 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1374 .atomic_destroy_state = vmw_du_plane_destroy_state,
1379 * Atomic Helpers
1381 static const struct
1382 drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1383 .atomic_check = vmw_du_cursor_plane_atomic_check,
1384 .atomic_update = vmw_du_cursor_plane_atomic_update,
1385 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1386 .cleanup_fb = vmw_du_plane_cleanup_fb,
1389 static const struct
1390 drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1391 .atomic_check = vmw_du_primary_plane_atomic_check,
1392 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1393 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1394 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1397 static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1398 .prepare = vmw_stdu_crtc_helper_prepare,
1399 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1400 .atomic_check = vmw_du_crtc_atomic_check,
1401 .atomic_begin = vmw_du_crtc_atomic_begin,
1402 .atomic_flush = vmw_du_crtc_atomic_flush,
1403 .atomic_enable = vmw_stdu_crtc_atomic_enable,
1404 .atomic_disable = vmw_stdu_crtc_atomic_disable,
1409 * vmw_stdu_init - Sets up a Screen Target Display Unit
1411 * @dev_priv: VMW DRM device
1412 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1414 * This function is called once per CRTC, and allocates one Screen Target
1415 * display unit to represent that CRTC. Since the SVGA device does not separate
1416 * out encoder and connector, they are represented as part of the STDU as well.
1418 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1420 struct vmw_screen_target_display_unit *stdu;
1421 struct drm_device *dev = dev_priv->dev;
1422 struct drm_connector *connector;
1423 struct drm_encoder *encoder;
1424 struct drm_plane *primary, *cursor;
1425 struct drm_crtc *crtc;
1426 int ret;
1429 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1430 if (!stdu)
1431 return -ENOMEM;
1433 stdu->base.unit = unit;
1434 crtc = &stdu->base.crtc;
1435 encoder = &stdu->base.encoder;
1436 connector = &stdu->base.connector;
1437 primary = &stdu->base.primary;
1438 cursor = &stdu->base.cursor;
1440 stdu->base.pref_active = (unit == 0);
1441 stdu->base.pref_width = dev_priv->initial_width;
1442 stdu->base.pref_height = dev_priv->initial_height;
1445 * Remove this after enabling atomic because property values can
1446 * only exist in a state object
1448 stdu->base.is_implicit = false;
1450 /* Initialize primary plane */
1451 vmw_du_plane_reset(primary);
1453 ret = drm_universal_plane_init(dev, primary,
1454 0, &vmw_stdu_plane_funcs,
1455 vmw_primary_plane_formats,
1456 ARRAY_SIZE(vmw_primary_plane_formats),
1457 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1458 if (ret) {
1459 DRM_ERROR("Failed to initialize primary plane");
1460 goto err_free;
1463 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1465 /* Initialize cursor plane */
1466 vmw_du_plane_reset(cursor);
1468 ret = drm_universal_plane_init(dev, cursor,
1469 0, &vmw_stdu_cursor_funcs,
1470 vmw_cursor_plane_formats,
1471 ARRAY_SIZE(vmw_cursor_plane_formats),
1472 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
1473 if (ret) {
1474 DRM_ERROR("Failed to initialize cursor plane");
1475 drm_plane_cleanup(&stdu->base.primary);
1476 goto err_free;
1479 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1481 vmw_du_connector_reset(connector);
1483 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1484 DRM_MODE_CONNECTOR_VIRTUAL);
1485 if (ret) {
1486 DRM_ERROR("Failed to initialize connector\n");
1487 goto err_free;
1490 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1491 connector->status = vmw_du_connector_detect(connector, false);
1492 vmw_connector_state_to_vcs(connector->state)->is_implicit = false;
1494 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1495 DRM_MODE_ENCODER_VIRTUAL, NULL);
1496 if (ret) {
1497 DRM_ERROR("Failed to initialize encoder\n");
1498 goto err_free_connector;
1501 (void) drm_connector_attach_encoder(connector, encoder);
1502 encoder->possible_crtcs = (1 << unit);
1503 encoder->possible_clones = 0;
1505 ret = drm_connector_register(connector);
1506 if (ret) {
1507 DRM_ERROR("Failed to register connector\n");
1508 goto err_free_encoder;
1511 vmw_du_crtc_reset(crtc);
1512 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1513 &stdu->base.cursor,
1514 &vmw_stdu_crtc_funcs, NULL);
1515 if (ret) {
1516 DRM_ERROR("Failed to initialize CRTC\n");
1517 goto err_free_unregister;
1520 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1522 drm_mode_crtc_set_gamma_size(crtc, 256);
1524 drm_object_attach_property(&connector->base,
1525 dev_priv->hotplug_mode_update_property, 1);
1526 drm_object_attach_property(&connector->base,
1527 dev->mode_config.suggested_x_property, 0);
1528 drm_object_attach_property(&connector->base,
1529 dev->mode_config.suggested_y_property, 0);
1530 if (dev_priv->implicit_placement_property)
1531 drm_object_attach_property
1532 (&connector->base,
1533 dev_priv->implicit_placement_property,
1534 stdu->base.is_implicit);
1535 return 0;
1537 err_free_unregister:
1538 drm_connector_unregister(connector);
1539 err_free_encoder:
1540 drm_encoder_cleanup(encoder);
1541 err_free_connector:
1542 drm_connector_cleanup(connector);
1543 err_free:
1544 kfree(stdu);
1545 return ret;
1551 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1553 * @stdu: Screen Target Display Unit to be destroyed
1555 * Clean up after vmw_stdu_init
1557 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1559 vmw_du_cleanup(&stdu->base);
1560 kfree(stdu);
1565 /******************************************************************************
1566 * Screen Target Display KMS Functions
1568 * These functions are called by the common KMS code in vmwgfx_kms.c
1569 *****************************************************************************/
1572 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1574 * @dev_priv: VMW DRM device
1576 * This function initialize a Screen Target based display device. It checks
1577 * the capability bits to make sure the underlying hardware can support
1578 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1579 * Units, as supported by the display hardware.
1581 * RETURNS:
1582 * 0 on success, error code otherwise
1584 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1586 struct drm_device *dev = dev_priv->dev;
1587 int i, ret;
1590 /* Do nothing if Screen Target support is turned off */
1591 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1592 return -ENOSYS;
1594 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1595 return -ENOSYS;
1597 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1598 if (unlikely(ret != 0))
1599 return ret;
1601 dev_priv->active_display_unit = vmw_du_screen_target;
1603 vmw_kms_create_implicit_placement_property(dev_priv, false);
1605 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1606 ret = vmw_stdu_init(dev_priv, i);
1608 if (unlikely(ret != 0)) {
1609 DRM_ERROR("Failed to initialize STDU %d", i);
1610 return ret;
1614 DRM_INFO("Screen Target Display device initialized\n");
1616 return 0;