ipv6: change route cache aging logic
[linux/fpc-iii.git] / drivers / clocksource / i8253.c
blob9c38895542f4abb5bff8c487ff22701e008443a2
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * i8253 PIT clocksource
4 */
5 #include <linux/clockchips.h>
6 #include <linux/init.h>
7 #include <linux/io.h>
8 #include <linux/spinlock.h>
9 #include <linux/timex.h>
10 #include <linux/module.h>
11 #include <linux/i8253.h>
12 #include <linux/smp.h>
15 * Protects access to I/O ports
17 * 0040-0043 : timer0, i8253 / i8254
18 * 0061-0061 : NMI Control Register which contains two speaker control bits.
20 DEFINE_RAW_SPINLOCK(i8253_lock);
21 EXPORT_SYMBOL(i8253_lock);
23 #ifdef CONFIG_CLKSRC_I8253
25 * Since the PIT overflows every tick, its not very useful
26 * to just read by itself. So use jiffies to emulate a free
27 * running counter:
29 static u64 i8253_read(struct clocksource *cs)
31 static int old_count;
32 static u32 old_jifs;
33 unsigned long flags;
34 int count;
35 u32 jifs;
37 raw_spin_lock_irqsave(&i8253_lock, flags);
39 * Although our caller may have the read side of jiffies_lock,
40 * this is now a seqlock, and we are cheating in this routine
41 * by having side effects on state that we cannot undo if
42 * there is a collision on the seqlock and our caller has to
43 * retry. (Namely, old_jifs and old_count.) So we must treat
44 * jiffies as volatile despite the lock. We read jiffies
45 * before latching the timer count to guarantee that although
46 * the jiffies value might be older than the count (that is,
47 * the counter may underflow between the last point where
48 * jiffies was incremented and the point where we latch the
49 * count), it cannot be newer.
51 jifs = jiffies;
52 outb_p(0x00, PIT_MODE); /* latch the count ASAP */
53 count = inb_p(PIT_CH0); /* read the latched count */
54 count |= inb_p(PIT_CH0) << 8;
56 /* VIA686a test code... reset the latch if count > max + 1 */
57 if (count > PIT_LATCH) {
58 outb_p(0x34, PIT_MODE);
59 outb_p(PIT_LATCH & 0xff, PIT_CH0);
60 outb_p(PIT_LATCH >> 8, PIT_CH0);
61 count = PIT_LATCH - 1;
65 * It's possible for count to appear to go the wrong way for a
66 * couple of reasons:
68 * 1. The timer counter underflows, but we haven't handled the
69 * resulting interrupt and incremented jiffies yet.
70 * 2. Hardware problem with the timer, not giving us continuous time,
71 * the counter does small "jumps" upwards on some Pentium systems,
72 * (see c't 95/10 page 335 for Neptun bug.)
74 * Previous attempts to handle these cases intelligently were
75 * buggy, so we just do the simple thing now.
77 if (count > old_count && jifs == old_jifs)
78 count = old_count;
80 old_count = count;
81 old_jifs = jifs;
83 raw_spin_unlock_irqrestore(&i8253_lock, flags);
85 count = (PIT_LATCH - 1) - count;
87 return (u64)(jifs * PIT_LATCH) + count;
90 static struct clocksource i8253_cs = {
91 .name = "pit",
92 .rating = 110,
93 .read = i8253_read,
94 .mask = CLOCKSOURCE_MASK(32),
97 int __init clocksource_i8253_init(void)
99 return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
101 #endif
103 #ifdef CONFIG_CLKEVT_I8253
104 static int pit_shutdown(struct clock_event_device *evt)
106 if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt))
107 return 0;
109 raw_spin_lock(&i8253_lock);
111 outb_p(0x30, PIT_MODE);
112 outb_p(0, PIT_CH0);
113 outb_p(0, PIT_CH0);
115 raw_spin_unlock(&i8253_lock);
116 return 0;
119 static int pit_set_oneshot(struct clock_event_device *evt)
121 raw_spin_lock(&i8253_lock);
122 outb_p(0x38, PIT_MODE);
123 raw_spin_unlock(&i8253_lock);
124 return 0;
127 static int pit_set_periodic(struct clock_event_device *evt)
129 raw_spin_lock(&i8253_lock);
131 /* binary, mode 2, LSB/MSB, ch 0 */
132 outb_p(0x34, PIT_MODE);
133 outb_p(PIT_LATCH & 0xff, PIT_CH0); /* LSB */
134 outb_p(PIT_LATCH >> 8, PIT_CH0); /* MSB */
136 raw_spin_unlock(&i8253_lock);
137 return 0;
141 * Program the next event in oneshot mode
143 * Delta is given in PIT ticks
145 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
147 raw_spin_lock(&i8253_lock);
148 outb_p(delta & 0xff , PIT_CH0); /* LSB */
149 outb_p(delta >> 8 , PIT_CH0); /* MSB */
150 raw_spin_unlock(&i8253_lock);
152 return 0;
156 * On UP the PIT can serve all of the possible timer functions. On SMP systems
157 * it can be solely used for the global tick.
159 struct clock_event_device i8253_clockevent = {
160 .name = "pit",
161 .features = CLOCK_EVT_FEAT_PERIODIC,
162 .set_state_shutdown = pit_shutdown,
163 .set_state_periodic = pit_set_periodic,
164 .set_next_event = pit_next_event,
168 * Initialize the conversion factor and the min/max deltas of the clock event
169 * structure and register the clock event source with the framework.
171 void __init clockevent_i8253_init(bool oneshot)
173 if (oneshot) {
174 i8253_clockevent.features |= CLOCK_EVT_FEAT_ONESHOT;
175 i8253_clockevent.set_state_oneshot = pit_set_oneshot;
178 * Start pit with the boot cpu mask. x86 might make it global
179 * when it is used as broadcast device later.
181 i8253_clockevent.cpumask = cpumask_of(smp_processor_id());
183 clockevents_config_and_register(&i8253_clockevent, PIT_TICK_RATE,
184 0xF, 0x7FFF);
186 #endif