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ipv6: change route cache aging logic
[linux/fpc-iii.git] / drivers / pci / pci-sysfs.c
blob06c7f0b85cd23dc5385993cd1d50e6a595b301e5
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * drivers/pci/pci-sysfs.c
4 *
5 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
6 * (C) Copyright 2002-2004 IBM Corp.
7 * (C) Copyright 2003 Matthew Wilcox
8 * (C) Copyright 2003 Hewlett-Packard
9 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
10 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
11 *
12 * File attributes for PCI devices
13 *
14 * Modeled after usb's driverfs.c
15 *
16 */
17
18
19 #include <linux/kernel.h>
20 #include <linux/sched.h>
21 #include <linux/pci.h>
22 #include <linux/stat.h>
23 #include <linux/export.h>
24 #include <linux/topology.h>
25 #include <linux/mm.h>
26 #include <linux/fs.h>
27 #include <linux/capability.h>
28 #include <linux/security.h>
29 #include <linux/pci-aspm.h>
30 #include <linux/slab.h>
31 #include <linux/vgaarb.h>
32 #include <linux/pm_runtime.h>
33 #include <linux/of.h>
34 #include "pci.h"
35
36 static int sysfs_initialized; /* = 0 */
37
38 /* show configuration fields */
39 #define pci_config_attr(field, format_string) \
40 static ssize_t \
41 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
42 { \
43 struct pci_dev *pdev; \
44 \
45 pdev = to_pci_dev(dev); \
46 return sprintf(buf, format_string, pdev->field); \
47 } \
48 static DEVICE_ATTR_RO(field)
49
50 pci_config_attr(vendor, "0x%04x\n");
51 pci_config_attr(device, "0x%04x\n");
52 pci_config_attr(subsystem_vendor, "0x%04x\n");
53 pci_config_attr(subsystem_device, "0x%04x\n");
54 pci_config_attr(revision, "0x%02x\n");
55 pci_config_attr(class, "0x%06x\n");
56 pci_config_attr(irq, "%u\n");
57
58 static ssize_t broken_parity_status_show(struct device *dev,
59 struct device_attribute *attr,
60 char *buf)
61 {
62 struct pci_dev *pdev = to_pci_dev(dev);
63 return sprintf(buf, "%u\n", pdev->broken_parity_status);
64 }
65
66 static ssize_t broken_parity_status_store(struct device *dev,
67 struct device_attribute *attr,
68 const char *buf, size_t count)
69 {
70 struct pci_dev *pdev = to_pci_dev(dev);
71 unsigned long val;
72
73 if (kstrtoul(buf, 0, &val) < 0)
74 return -EINVAL;
75
76 pdev->broken_parity_status = !!val;
77
78 return count;
79 }
80 static DEVICE_ATTR_RW(broken_parity_status);
81
82 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
83 struct device_attribute *attr, char *buf)
84 {
85 const struct cpumask *mask;
86
87 #ifdef CONFIG_NUMA
88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
89 cpumask_of_node(dev_to_node(dev));
90 #else
91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
92 #endif
93 return cpumap_print_to_pagebuf(list, buf, mask);
94 }
95
96 static ssize_t local_cpus_show(struct device *dev,
97 struct device_attribute *attr, char *buf)
98 {
99 return pci_dev_show_local_cpu(dev, false, attr, buf);
100 }
101 static DEVICE_ATTR_RO(local_cpus);
102
103 static ssize_t local_cpulist_show(struct device *dev,
104 struct device_attribute *attr, char *buf)
105 {
106 return pci_dev_show_local_cpu(dev, true, attr, buf);
107 }
108 static DEVICE_ATTR_RO(local_cpulist);
109
110 /*
111 * PCI Bus Class Devices
112 */
113 static ssize_t cpuaffinity_show(struct device *dev,
114 struct device_attribute *attr, char *buf)
115 {
116 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
117
118 return cpumap_print_to_pagebuf(false, buf, cpumask);
119 }
120 static DEVICE_ATTR_RO(cpuaffinity);
121
122 static ssize_t cpulistaffinity_show(struct device *dev,
123 struct device_attribute *attr, char *buf)
124 {
125 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
126
127 return cpumap_print_to_pagebuf(true, buf, cpumask);
128 }
129 static DEVICE_ATTR_RO(cpulistaffinity);
130
131 /* show resources */
132 static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
133 char *buf)
134 {
135 struct pci_dev *pci_dev = to_pci_dev(dev);
136 char *str = buf;
137 int i;
138 int max;
139 resource_size_t start, end;
140
141 if (pci_dev->subordinate)
142 max = DEVICE_COUNT_RESOURCE;
143 else
144 max = PCI_BRIDGE_RESOURCES;
145
146 for (i = 0; i < max; i++) {
147 struct resource *res = &pci_dev->resource[i];
148 pci_resource_to_user(pci_dev, i, res, &start, &end);
149 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
150 (unsigned long long)start,
151 (unsigned long long)end,
152 (unsigned long long)res->flags);
153 }
154 return (str - buf);
155 }
156 static DEVICE_ATTR_RO(resource);
157
158 static ssize_t max_link_speed_show(struct device *dev,
159 struct device_attribute *attr, char *buf)
160 {
161 struct pci_dev *pci_dev = to_pci_dev(dev);
162 u32 linkcap;
163 int err;
164 const char *speed;
165
166 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
167 if (err)
168 return -EINVAL;
169
170 switch (linkcap & PCI_EXP_LNKCAP_SLS) {
171 case PCI_EXP_LNKCAP_SLS_8_0GB:
172 speed = "8 GT/s";
173 break;
174 case PCI_EXP_LNKCAP_SLS_5_0GB:
175 speed = "5 GT/s";
176 break;
177 case PCI_EXP_LNKCAP_SLS_2_5GB:
178 speed = "2.5 GT/s";
179 break;
180 default:
181 speed = "Unknown speed";
182 }
183
184 return sprintf(buf, "%s\n", speed);
185 }
186 static DEVICE_ATTR_RO(max_link_speed);
187
188 static ssize_t max_link_width_show(struct device *dev,
189 struct device_attribute *attr, char *buf)
190 {
191 struct pci_dev *pci_dev = to_pci_dev(dev);
192 u32 linkcap;
193 int err;
194
195 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
196 if (err)
197 return -EINVAL;
198
199 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4);
200 }
201 static DEVICE_ATTR_RO(max_link_width);
202
203 static ssize_t current_link_speed_show(struct device *dev,
204 struct device_attribute *attr, char *buf)
205 {
206 struct pci_dev *pci_dev = to_pci_dev(dev);
207 u16 linkstat;
208 int err;
209 const char *speed;
210
211 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
212 if (err)
213 return -EINVAL;
214
215 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
216 case PCI_EXP_LNKSTA_CLS_8_0GB:
217 speed = "8 GT/s";
218 break;
219 case PCI_EXP_LNKSTA_CLS_5_0GB:
220 speed = "5 GT/s";
221 break;
222 case PCI_EXP_LNKSTA_CLS_2_5GB:
223 speed = "2.5 GT/s";
224 break;
225 default:
226 speed = "Unknown speed";
227 }
228
229 return sprintf(buf, "%s\n", speed);
230 }
231 static DEVICE_ATTR_RO(current_link_speed);
232
233 static ssize_t current_link_width_show(struct device *dev,
234 struct device_attribute *attr, char *buf)
235 {
236 struct pci_dev *pci_dev = to_pci_dev(dev);
237 u16 linkstat;
238 int err;
239
240 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
241 if (err)
242 return -EINVAL;
243
244 return sprintf(buf, "%u\n",
245 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
246 }
247 static DEVICE_ATTR_RO(current_link_width);
248
249 static ssize_t secondary_bus_number_show(struct device *dev,
250 struct device_attribute *attr,
251 char *buf)
252 {
253 struct pci_dev *pci_dev = to_pci_dev(dev);
254 u8 sec_bus;
255 int err;
256
257 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
258 if (err)
259 return -EINVAL;
260
261 return sprintf(buf, "%u\n", sec_bus);
262 }
263 static DEVICE_ATTR_RO(secondary_bus_number);
264
265 static ssize_t subordinate_bus_number_show(struct device *dev,
266 struct device_attribute *attr,
267 char *buf)
268 {
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270 u8 sub_bus;
271 int err;
272
273 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
274 if (err)
275 return -EINVAL;
276
277 return sprintf(buf, "%u\n", sub_bus);
278 }
279 static DEVICE_ATTR_RO(subordinate_bus_number);
280
281 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
282 char *buf)
283 {
284 struct pci_dev *pci_dev = to_pci_dev(dev);
285
286 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
287 pci_dev->vendor, pci_dev->device,
288 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
289 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
290 (u8)(pci_dev->class));
291 }
292 static DEVICE_ATTR_RO(modalias);
293
294 static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
295 const char *buf, size_t count)
296 {
297 struct pci_dev *pdev = to_pci_dev(dev);
298 unsigned long val;
299 ssize_t result = kstrtoul(buf, 0, &val);
300
301 if (result < 0)
302 return result;
303
304 /* this can crash the machine when done on the "wrong" device */
305 if (!capable(CAP_SYS_ADMIN))
306 return -EPERM;
307
308 if (!val) {
309 if (pci_is_enabled(pdev))
310 pci_disable_device(pdev);
311 else
312 result = -EIO;
313 } else
314 result = pci_enable_device(pdev);
315
316 return result < 0 ? result : count;
317 }
318
319 static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
320 char *buf)
321 {
322 struct pci_dev *pdev;
323
324 pdev = to_pci_dev(dev);
325 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
326 }
327 static DEVICE_ATTR_RW(enable);
328
329 #ifdef CONFIG_NUMA
330 static ssize_t numa_node_store(struct device *dev,
331 struct device_attribute *attr, const char *buf,
332 size_t count)
333 {
334 struct pci_dev *pdev = to_pci_dev(dev);
335 int node, ret;
336
337 if (!capable(CAP_SYS_ADMIN))
338 return -EPERM;
339
340 ret = kstrtoint(buf, 0, &node);
341 if (ret)
342 return ret;
343
344 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
345 return -EINVAL;
346
347 if (node != NUMA_NO_NODE && !node_online(node))
348 return -EINVAL;
349
350 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
351 dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
352 node);
353
354 dev->numa_node = node;
355 return count;
356 }
357
358 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
359 char *buf)
360 {
361 return sprintf(buf, "%d\n", dev->numa_node);
362 }
363 static DEVICE_ATTR_RW(numa_node);
364 #endif
365
366 static ssize_t dma_mask_bits_show(struct device *dev,
367 struct device_attribute *attr, char *buf)
368 {
369 struct pci_dev *pdev = to_pci_dev(dev);
370
371 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
372 }
373 static DEVICE_ATTR_RO(dma_mask_bits);
374
375 static ssize_t consistent_dma_mask_bits_show(struct device *dev,
376 struct device_attribute *attr,
377 char *buf)
378 {
379 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
380 }
381 static DEVICE_ATTR_RO(consistent_dma_mask_bits);
382
383 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
384 char *buf)
385 {
386 struct pci_dev *pdev = to_pci_dev(dev);
387 struct pci_bus *subordinate = pdev->subordinate;
388
389 return sprintf(buf, "%u\n", subordinate ?
390 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
391 : !pdev->no_msi);
392 }
393
394 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
395 const char *buf, size_t count)
396 {
397 struct pci_dev *pdev = to_pci_dev(dev);
398 struct pci_bus *subordinate = pdev->subordinate;
399 unsigned long val;
400
401 if (kstrtoul(buf, 0, &val) < 0)
402 return -EINVAL;
403
404 if (!capable(CAP_SYS_ADMIN))
405 return -EPERM;
406
407 /*
408 * "no_msi" and "bus_flags" only affect what happens when a driver
409 * requests MSI or MSI-X. They don't affect any drivers that have
410 * already requested MSI or MSI-X.
411 */
412 if (!subordinate) {
413 pdev->no_msi = !val;
414 dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
415 val ? "allowed" : "disallowed");
416 return count;
417 }
418
419 if (val)
420 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
421 else
422 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
423
424 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
425 val ? "allowed" : "disallowed");
426 return count;
427 }
428 static DEVICE_ATTR_RW(msi_bus);
429
430 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
431 size_t count)
432 {
433 unsigned long val;
434 struct pci_bus *b = NULL;
435
436 if (kstrtoul(buf, 0, &val) < 0)
437 return -EINVAL;
438
439 if (val) {
440 pci_lock_rescan_remove();
441 while ((b = pci_find_next_bus(b)) != NULL)
442 pci_rescan_bus(b);
443 pci_unlock_rescan_remove();
444 }
445 return count;
446 }
447 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
448
449 static struct attribute *pci_bus_attrs[] = {
450 &bus_attr_rescan.attr,
451 NULL,
452 };
453
454 static const struct attribute_group pci_bus_group = {
455 .attrs = pci_bus_attrs,
456 };
457
458 const struct attribute_group *pci_bus_groups[] = {
459 &pci_bus_group,
460 NULL,
461 };
462
463 static ssize_t dev_rescan_store(struct device *dev,
464 struct device_attribute *attr, const char *buf,
465 size_t count)
466 {
467 unsigned long val;
468 struct pci_dev *pdev = to_pci_dev(dev);
469
470 if (kstrtoul(buf, 0, &val) < 0)
471 return -EINVAL;
472
473 if (val) {
474 pci_lock_rescan_remove();
475 pci_rescan_bus(pdev->bus);
476 pci_unlock_rescan_remove();
477 }
478 return count;
479 }
480 static struct device_attribute dev_rescan_attr = __ATTR(rescan,
481 (S_IWUSR|S_IWGRP),
482 NULL, dev_rescan_store);
483
484 static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
485 const char *buf, size_t count)
486 {
487 unsigned long val;
488
489 if (kstrtoul(buf, 0, &val) < 0)
490 return -EINVAL;
491
492 if (val && device_remove_file_self(dev, attr))
493 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
494 return count;
495 }
496 static struct device_attribute dev_remove_attr = __ATTR(remove,
497 (S_IWUSR|S_IWGRP),
498 NULL, remove_store);
499
500 static ssize_t dev_bus_rescan_store(struct device *dev,
501 struct device_attribute *attr,
502 const char *buf, size_t count)
503 {
504 unsigned long val;
505 struct pci_bus *bus = to_pci_bus(dev);
506
507 if (kstrtoul(buf, 0, &val) < 0)
508 return -EINVAL;
509
510 if (val) {
511 pci_lock_rescan_remove();
512 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
513 pci_rescan_bus_bridge_resize(bus->self);
514 else
515 pci_rescan_bus(bus);
516 pci_unlock_rescan_remove();
517 }
518 return count;
519 }
520 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
521
522 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
523 static ssize_t d3cold_allowed_store(struct device *dev,
524 struct device_attribute *attr,
525 const char *buf, size_t count)
526 {
527 struct pci_dev *pdev = to_pci_dev(dev);
528 unsigned long val;
529
530 if (kstrtoul(buf, 0, &val) < 0)
531 return -EINVAL;
532
533 pdev->d3cold_allowed = !!val;
534 if (pdev->d3cold_allowed)
535 pci_d3cold_enable(pdev);
536 else
537 pci_d3cold_disable(pdev);
538
539 pm_runtime_resume(dev);
540
541 return count;
542 }
543
544 static ssize_t d3cold_allowed_show(struct device *dev,
545 struct device_attribute *attr, char *buf)
546 {
547 struct pci_dev *pdev = to_pci_dev(dev);
548 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
549 }
550 static DEVICE_ATTR_RW(d3cold_allowed);
551 #endif
552
553 #ifdef CONFIG_OF
554 static ssize_t devspec_show(struct device *dev,
555 struct device_attribute *attr, char *buf)
556 {
557 struct pci_dev *pdev = to_pci_dev(dev);
558 struct device_node *np = pci_device_to_OF_node(pdev);
559
560 if (np == NULL)
561 return 0;
562 return sprintf(buf, "%pOF", np);
563 }
564 static DEVICE_ATTR_RO(devspec);
565 #endif
566
567 #ifdef CONFIG_PCI_IOV
568 static ssize_t sriov_totalvfs_show(struct device *dev,
569 struct device_attribute *attr,
570 char *buf)
571 {
572 struct pci_dev *pdev = to_pci_dev(dev);
573
574 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
575 }
576
577
578 static ssize_t sriov_numvfs_show(struct device *dev,
579 struct device_attribute *attr,
580 char *buf)
581 {
582 struct pci_dev *pdev = to_pci_dev(dev);
583
584 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
585 }
586
587 /*
588 * num_vfs > 0; number of VFs to enable
589 * num_vfs = 0; disable all VFs
590 *
591 * Note: SRIOV spec doesn't allow partial VF
592 * disable, so it's all or none.
593 */
594 static ssize_t sriov_numvfs_store(struct device *dev,
595 struct device_attribute *attr,
596 const char *buf, size_t count)
597 {
598 struct pci_dev *pdev = to_pci_dev(dev);
599 int ret;
600 u16 num_vfs;
601
602 ret = kstrtou16(buf, 0, &num_vfs);
603 if (ret < 0)
604 return ret;
605
606 if (num_vfs > pci_sriov_get_totalvfs(pdev))
607 return -ERANGE;
608
609 device_lock(&pdev->dev);
610
611 if (num_vfs == pdev->sriov->num_VFs)
612 goto exit;
613
614 /* is PF driver loaded w/callback */
615 if (!pdev->driver || !pdev->driver->sriov_configure) {
616 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
617 ret = -ENOENT;
618 goto exit;
619 }
620
621 if (num_vfs == 0) {
622 /* disable VFs */
623 ret = pdev->driver->sriov_configure(pdev, 0);
624 goto exit;
625 }
626
627 /* enable VFs */
628 if (pdev->sriov->num_VFs) {
629 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
630 pdev->sriov->num_VFs, num_vfs);
631 ret = -EBUSY;
632 goto exit;
633 }
634
635 ret = pdev->driver->sriov_configure(pdev, num_vfs);
636 if (ret < 0)
637 goto exit;
638
639 if (ret != num_vfs)
640 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
641 num_vfs, ret);
642
643 exit:
644 device_unlock(&pdev->dev);
645
646 if (ret < 0)
647 return ret;
648
649 return count;
650 }
651
652 static ssize_t sriov_offset_show(struct device *dev,
653 struct device_attribute *attr,
654 char *buf)
655 {
656 struct pci_dev *pdev = to_pci_dev(dev);
657
658 return sprintf(buf, "%u\n", pdev->sriov->offset);
659 }
660
661 static ssize_t sriov_stride_show(struct device *dev,
662 struct device_attribute *attr,
663 char *buf)
664 {
665 struct pci_dev *pdev = to_pci_dev(dev);
666
667 return sprintf(buf, "%u\n", pdev->sriov->stride);
668 }
669
670 static ssize_t sriov_vf_device_show(struct device *dev,
671 struct device_attribute *attr,
672 char *buf)
673 {
674 struct pci_dev *pdev = to_pci_dev(dev);
675
676 return sprintf(buf, "%x\n", pdev->sriov->vf_device);
677 }
678
679 static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
680 struct device_attribute *attr,
681 char *buf)
682 {
683 struct pci_dev *pdev = to_pci_dev(dev);
684
685 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
686 }
687
688 static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
689 struct device_attribute *attr,
690 const char *buf, size_t count)
691 {
692 struct pci_dev *pdev = to_pci_dev(dev);
693 bool drivers_autoprobe;
694
695 if (kstrtobool(buf, &drivers_autoprobe) < 0)
696 return -EINVAL;
697
698 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
699
700 return count;
701 }
702
703 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
704 static struct device_attribute sriov_numvfs_attr =
705 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
706 sriov_numvfs_show, sriov_numvfs_store);
707 static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
708 static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
709 static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
710 static struct device_attribute sriov_drivers_autoprobe_attr =
711 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
712 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
713 #endif /* CONFIG_PCI_IOV */
714
715 static ssize_t driver_override_store(struct device *dev,
716 struct device_attribute *attr,
717 const char *buf, size_t count)
718 {
719 struct pci_dev *pdev = to_pci_dev(dev);
720 char *driver_override, *old, *cp;
721
722 /* We need to keep extra room for a newline */
723 if (count >= (PAGE_SIZE - 1))
724 return -EINVAL;
725
726 driver_override = kstrndup(buf, count, GFP_KERNEL);
727 if (!driver_override)
728 return -ENOMEM;
729
730 cp = strchr(driver_override, '\n');
731 if (cp)
732 *cp = '\0';
733
734 device_lock(dev);
735 old = pdev->driver_override;
736 if (strlen(driver_override)) {
737 pdev->driver_override = driver_override;
738 } else {
739 kfree(driver_override);
740 pdev->driver_override = NULL;
741 }
742 device_unlock(dev);
743
744 kfree(old);
745
746 return count;
747 }
748
749 static ssize_t driver_override_show(struct device *dev,
750 struct device_attribute *attr, char *buf)
751 {
752 struct pci_dev *pdev = to_pci_dev(dev);
753 ssize_t len;
754
755 device_lock(dev);
756 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
757 device_unlock(dev);
758 return len;
759 }
760 static DEVICE_ATTR_RW(driver_override);
761
762 static struct attribute *pci_dev_attrs[] = {
763 &dev_attr_resource.attr,
764 &dev_attr_vendor.attr,
765 &dev_attr_device.attr,
766 &dev_attr_subsystem_vendor.attr,
767 &dev_attr_subsystem_device.attr,
768 &dev_attr_revision.attr,
769 &dev_attr_class.attr,
770 &dev_attr_irq.attr,
771 &dev_attr_local_cpus.attr,
772 &dev_attr_local_cpulist.attr,
773 &dev_attr_modalias.attr,
774 #ifdef CONFIG_NUMA
775 &dev_attr_numa_node.attr,
776 #endif
777 &dev_attr_dma_mask_bits.attr,
778 &dev_attr_consistent_dma_mask_bits.attr,
779 &dev_attr_enable.attr,
780 &dev_attr_broken_parity_status.attr,
781 &dev_attr_msi_bus.attr,
782 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
783 &dev_attr_d3cold_allowed.attr,
784 #endif
785 #ifdef CONFIG_OF
786 &dev_attr_devspec.attr,
787 #endif
788 &dev_attr_driver_override.attr,
789 NULL,
790 };
791
792 static struct attribute *pci_bridge_attrs[] = {
793 &dev_attr_subordinate_bus_number.attr,
794 &dev_attr_secondary_bus_number.attr,
795 NULL,
796 };
797
798 static struct attribute *pcie_dev_attrs[] = {
799 &dev_attr_current_link_speed.attr,
800 &dev_attr_current_link_width.attr,
801 &dev_attr_max_link_width.attr,
802 &dev_attr_max_link_speed.attr,
803 NULL,
804 };
805
806 static struct attribute *pcibus_attrs[] = {
807 &dev_attr_rescan.attr,
808 &dev_attr_cpuaffinity.attr,
809 &dev_attr_cpulistaffinity.attr,
810 NULL,
811 };
812
813 static const struct attribute_group pcibus_group = {
814 .attrs = pcibus_attrs,
815 };
816
817 const struct attribute_group *pcibus_groups[] = {
818 &pcibus_group,
819 NULL,
820 };
821
822 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
823 char *buf)
824 {
825 struct pci_dev *pdev = to_pci_dev(dev);
826 struct pci_dev *vga_dev = vga_default_device();
827
828 if (vga_dev)
829 return sprintf(buf, "%u\n", (pdev == vga_dev));
830
831 return sprintf(buf, "%u\n",
832 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
833 IORESOURCE_ROM_SHADOW));
834 }
835 static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
836
837 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
838 struct bin_attribute *bin_attr, char *buf,
839 loff_t off, size_t count)
840 {
841 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
842 unsigned int size = 64;
843 loff_t init_off = off;
844 u8 *data = (u8 *) buf;
845
846 /* Several chips lock up trying to read undefined config space */
847 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
848 size = dev->cfg_size;
849 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
850 size = 128;
851
852 if (off > size)
853 return 0;
854 if (off + count > size) {
855 size -= off;
856 count = size;
857 } else {
858 size = count;
859 }
860
861 pci_config_pm_runtime_get(dev);
862
863 if ((off & 1) && size) {
864 u8 val;
865 pci_user_read_config_byte(dev, off, &val);
866 data[off - init_off] = val;
867 off++;
868 size--;
869 }
870
871 if ((off & 3) && size > 2) {
872 u16 val;
873 pci_user_read_config_word(dev, off, &val);
874 data[off - init_off] = val & 0xff;
875 data[off - init_off + 1] = (val >> 8) & 0xff;
876 off += 2;
877 size -= 2;
878 }
879
880 while (size > 3) {
881 u32 val;
882 pci_user_read_config_dword(dev, off, &val);
883 data[off - init_off] = val & 0xff;
884 data[off - init_off + 1] = (val >> 8) & 0xff;
885 data[off - init_off + 2] = (val >> 16) & 0xff;
886 data[off - init_off + 3] = (val >> 24) & 0xff;
887 off += 4;
888 size -= 4;
889 }
890
891 if (size >= 2) {
892 u16 val;
893 pci_user_read_config_word(dev, off, &val);
894 data[off - init_off] = val & 0xff;
895 data[off - init_off + 1] = (val >> 8) & 0xff;
896 off += 2;
897 size -= 2;
898 }
899
900 if (size > 0) {
901 u8 val;
902 pci_user_read_config_byte(dev, off, &val);
903 data[off - init_off] = val;
904 off++;
905 --size;
906 }
907
908 pci_config_pm_runtime_put(dev);
909
910 return count;
911 }
912
913 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
914 struct bin_attribute *bin_attr, char *buf,
915 loff_t off, size_t count)
916 {
917 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
918 unsigned int size = count;
919 loff_t init_off = off;
920 u8 *data = (u8 *) buf;
921
922 if (off > dev->cfg_size)
923 return 0;
924 if (off + count > dev->cfg_size) {
925 size = dev->cfg_size - off;
926 count = size;
927 }
928
929 pci_config_pm_runtime_get(dev);
930
931 if ((off & 1) && size) {
932 pci_user_write_config_byte(dev, off, data[off - init_off]);
933 off++;
934 size--;
935 }
936
937 if ((off & 3) && size > 2) {
938 u16 val = data[off - init_off];
939 val |= (u16) data[off - init_off + 1] << 8;
940 pci_user_write_config_word(dev, off, val);
941 off += 2;
942 size -= 2;
943 }
944
945 while (size > 3) {
946 u32 val = data[off - init_off];
947 val |= (u32) data[off - init_off + 1] << 8;
948 val |= (u32) data[off - init_off + 2] << 16;
949 val |= (u32) data[off - init_off + 3] << 24;
950 pci_user_write_config_dword(dev, off, val);
951 off += 4;
952 size -= 4;
953 }
954
955 if (size >= 2) {
956 u16 val = data[off - init_off];
957 val |= (u16) data[off - init_off + 1] << 8;
958 pci_user_write_config_word(dev, off, val);
959 off += 2;
960 size -= 2;
961 }
962
963 if (size) {
964 pci_user_write_config_byte(dev, off, data[off - init_off]);
965 off++;
966 --size;
967 }
968
969 pci_config_pm_runtime_put(dev);
970
971 return count;
972 }
973
974 static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
975 struct bin_attribute *bin_attr, char *buf,
976 loff_t off, size_t count)
977 {
978 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
979
980 if (bin_attr->size > 0) {
981 if (off > bin_attr->size)
982 count = 0;
983 else if (count > bin_attr->size - off)
984 count = bin_attr->size - off;
985 }
986
987 return pci_read_vpd(dev, off, count, buf);
988 }
989
990 static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
991 struct bin_attribute *bin_attr, char *buf,
992 loff_t off, size_t count)
993 {
994 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
995
996 if (bin_attr->size > 0) {
997 if (off > bin_attr->size)
998 count = 0;
999 else if (count > bin_attr->size - off)
1000 count = bin_attr->size - off;
1001 }
1002
1003 return pci_write_vpd(dev, off, count, buf);
1004 }
1005
1006 #ifdef HAVE_PCI_LEGACY
1007 /**
1008 * pci_read_legacy_io - read byte(s) from legacy I/O port space
1009 * @filp: open sysfs file
1010 * @kobj: kobject corresponding to file to read from
1011 * @bin_attr: struct bin_attribute for this file
1012 * @buf: buffer to store results
1013 * @off: offset into legacy I/O port space
1014 * @count: number of bytes to read
1015 *
1016 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1017 * callback routine (pci_legacy_read).
1018 */
1019 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
1020 struct bin_attribute *bin_attr, char *buf,
1021 loff_t off, size_t count)
1022 {
1023 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1024
1025 /* Only support 1, 2 or 4 byte accesses */
1026 if (count != 1 && count != 2 && count != 4)
1027 return -EINVAL;
1028
1029 return pci_legacy_read(bus, off, (u32 *)buf, count);
1030 }
1031
1032 /**
1033 * pci_write_legacy_io - write byte(s) to legacy I/O port space
1034 * @filp: open sysfs file
1035 * @kobj: kobject corresponding to file to read from
1036 * @bin_attr: struct bin_attribute for this file
1037 * @buf: buffer containing value to be written
1038 * @off: offset into legacy I/O port space
1039 * @count: number of bytes to write
1040 *
1041 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1042 * callback routine (pci_legacy_write).
1043 */
1044 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
1045 struct bin_attribute *bin_attr, char *buf,
1046 loff_t off, size_t count)
1047 {
1048 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1049
1050 /* Only support 1, 2 or 4 byte accesses */
1051 if (count != 1 && count != 2 && count != 4)
1052 return -EINVAL;
1053
1054 return pci_legacy_write(bus, off, *(u32 *)buf, count);
1055 }
1056
1057 /**
1058 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
1059 * @filp: open sysfs file
1060 * @kobj: kobject corresponding to device to be mapped
1061 * @attr: struct bin_attribute for this file
1062 * @vma: struct vm_area_struct passed to mmap
1063 *
1064 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1065 * legacy memory space (first meg of bus space) into application virtual
1066 * memory space.
1067 */
1068 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1069 struct bin_attribute *attr,
1070 struct vm_area_struct *vma)
1071 {
1072 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1073
1074 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
1075 }
1076
1077 /**
1078 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
1079 * @filp: open sysfs file
1080 * @kobj: kobject corresponding to device to be mapped
1081 * @attr: struct bin_attribute for this file
1082 * @vma: struct vm_area_struct passed to mmap
1083 *
1084 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1085 * legacy IO space (first meg of bus space) into application virtual
1086 * memory space. Returns -ENOSYS if the operation isn't supported
1087 */
1088 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1089 struct bin_attribute *attr,
1090 struct vm_area_struct *vma)
1091 {
1092 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1093
1094 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
1095 }
1096
1097 /**
1098 * pci_adjust_legacy_attr - adjustment of legacy file attributes
1099 * @b: bus to create files under
1100 * @mmap_type: I/O port or memory
1101 *
1102 * Stub implementation. Can be overridden by arch if necessary.
1103 */
1104 void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1105 enum pci_mmap_state mmap_type)
1106 {
1107 }
1108
1109 /**
1110 * pci_create_legacy_files - create legacy I/O port and memory files
1111 * @b: bus to create files under
1112 *
1113 * Some platforms allow access to legacy I/O port and ISA memory space on
1114 * a per-bus basis. This routine creates the files and ties them into
1115 * their associated read, write and mmap files from pci-sysfs.c
1116 *
1117 * On error unwind, but don't propagate the error to the caller
1118 * as it is ok to set up the PCI bus without these files.
1119 */
1120 void pci_create_legacy_files(struct pci_bus *b)
1121 {
1122 int error;
1123
1124 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
1125 GFP_ATOMIC);
1126 if (!b->legacy_io)
1127 goto kzalloc_err;
1128
1129 sysfs_bin_attr_init(b->legacy_io);
1130 b->legacy_io->attr.name = "legacy_io";
1131 b->legacy_io->size = 0xffff;
1132 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1133 b->legacy_io->read = pci_read_legacy_io;
1134 b->legacy_io->write = pci_write_legacy_io;
1135 b->legacy_io->mmap = pci_mmap_legacy_io;
1136 pci_adjust_legacy_attr(b, pci_mmap_io);
1137 error = device_create_bin_file(&b->dev, b->legacy_io);
1138 if (error)
1139 goto legacy_io_err;
1140
1141 /* Allocated above after the legacy_io struct */
1142 b->legacy_mem = b->legacy_io + 1;
1143 sysfs_bin_attr_init(b->legacy_mem);
1144 b->legacy_mem->attr.name = "legacy_mem";
1145 b->legacy_mem->size = 1024*1024;
1146 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1147 b->legacy_mem->mmap = pci_mmap_legacy_mem;
1148 pci_adjust_legacy_attr(b, pci_mmap_mem);
1149 error = device_create_bin_file(&b->dev, b->legacy_mem);
1150 if (error)
1151 goto legacy_mem_err;
1152
1153 return;
1154
1155 legacy_mem_err:
1156 device_remove_bin_file(&b->dev, b->legacy_io);
1157 legacy_io_err:
1158 kfree(b->legacy_io);
1159 b->legacy_io = NULL;
1160 kzalloc_err:
1161 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
1162 return;
1163 }
1164
1165 void pci_remove_legacy_files(struct pci_bus *b)
1166 {
1167 if (b->legacy_io) {
1168 device_remove_bin_file(&b->dev, b->legacy_io);
1169 device_remove_bin_file(&b->dev, b->legacy_mem);
1170 kfree(b->legacy_io); /* both are allocated here */
1171 }
1172 }
1173 #endif /* HAVE_PCI_LEGACY */
1174
1175 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1176
1177 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1178 enum pci_mmap_api mmap_api)
1179 {
1180 unsigned long nr, start, size;
1181 resource_size_t pci_start = 0, pci_end;
1182
1183 if (pci_resource_len(pdev, resno) == 0)
1184 return 0;
1185 nr = vma_pages(vma);
1186 start = vma->vm_pgoff;
1187 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
1188 if (mmap_api == PCI_MMAP_PROCFS) {
1189 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1190 &pci_start, &pci_end);
1191 pci_start >>= PAGE_SHIFT;
1192 }
1193 if (start >= pci_start && start < pci_start + size &&
1194 start + nr <= pci_start + size)
1195 return 1;
1196 return 0;
1197 }
1198
1199 /**
1200 * pci_mmap_resource - map a PCI resource into user memory space
1201 * @kobj: kobject for mapping
1202 * @attr: struct bin_attribute for the file being mapped
1203 * @vma: struct vm_area_struct passed into the mmap
1204 * @write_combine: 1 for write_combine mapping
1205 *
1206 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1207 */
1208 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1209 struct vm_area_struct *vma, int write_combine)
1210 {
1211 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1212 int bar = (unsigned long)attr->private;
1213 enum pci_mmap_state mmap_type;
1214 struct resource *res = &pdev->resource[bar];
1215
1216 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1217 return -EINVAL;
1218
1219 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) {
1220 WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
1221 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
1222 pci_name(pdev), bar,
1223 (u64)pci_resource_start(pdev, bar),
1224 (u64)pci_resource_len(pdev, bar));
1225 return -EINVAL;
1226 }
1227 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1228
1229 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1230 }
1231
1232 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1233 struct bin_attribute *attr,
1234 struct vm_area_struct *vma)
1235 {
1236 return pci_mmap_resource(kobj, attr, vma, 0);
1237 }
1238
1239 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1240 struct bin_attribute *attr,
1241 struct vm_area_struct *vma)
1242 {
1243 return pci_mmap_resource(kobj, attr, vma, 1);
1244 }
1245
1246 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1247 struct bin_attribute *attr, char *buf,
1248 loff_t off, size_t count, bool write)
1249 {
1250 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1251 int bar = (unsigned long)attr->private;
1252 unsigned long port = off;
1253
1254 port += pci_resource_start(pdev, bar);
1255
1256 if (port > pci_resource_end(pdev, bar))
1257 return 0;
1258
1259 if (port + count - 1 > pci_resource_end(pdev, bar))
1260 return -EINVAL;
1261
1262 switch (count) {
1263 case 1:
1264 if (write)
1265 outb(*(u8 *)buf, port);
1266 else
1267 *(u8 *)buf = inb(port);
1268 return 1;
1269 case 2:
1270 if (write)
1271 outw(*(u16 *)buf, port);
1272 else
1273 *(u16 *)buf = inw(port);
1274 return 2;
1275 case 4:
1276 if (write)
1277 outl(*(u32 *)buf, port);
1278 else
1279 *(u32 *)buf = inl(port);
1280 return 4;
1281 }
1282 return -EINVAL;
1283 }
1284
1285 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1286 struct bin_attribute *attr, char *buf,
1287 loff_t off, size_t count)
1288 {
1289 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1290 }
1291
1292 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1293 struct bin_attribute *attr, char *buf,
1294 loff_t off, size_t count)
1295 {
1296 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1297 }
1298
1299 /**
1300 * pci_remove_resource_files - cleanup resource files
1301 * @pdev: dev to cleanup
1302 *
1303 * If we created resource files for @pdev, remove them from sysfs and
1304 * free their resources.
1305 */
1306 static void pci_remove_resource_files(struct pci_dev *pdev)
1307 {
1308 int i;
1309
1310 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1311 struct bin_attribute *res_attr;
1312
1313 res_attr = pdev->res_attr[i];
1314 if (res_attr) {
1315 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1316 kfree(res_attr);
1317 }
1318
1319 res_attr = pdev->res_attr_wc[i];
1320 if (res_attr) {
1321 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1322 kfree(res_attr);
1323 }
1324 }
1325 }
1326
1327 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1328 {
1329 /* allocate attribute structure, piggyback attribute name */
1330 int name_len = write_combine ? 13 : 10;
1331 struct bin_attribute *res_attr;
1332 char *res_attr_name;
1333 int retval;
1334
1335 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1336 if (!res_attr)
1337 return -ENOMEM;
1338
1339 res_attr_name = (char *)(res_attr + 1);
1340
1341 sysfs_bin_attr_init(res_attr);
1342 if (write_combine) {
1343 pdev->res_attr_wc[num] = res_attr;
1344 sprintf(res_attr_name, "resource%d_wc", num);
1345 res_attr->mmap = pci_mmap_resource_wc;
1346 } else {
1347 pdev->res_attr[num] = res_attr;
1348 sprintf(res_attr_name, "resource%d", num);
1349 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1350 res_attr->read = pci_read_resource_io;
1351 res_attr->write = pci_write_resource_io;
1352 if (arch_can_pci_mmap_io())
1353 res_attr->mmap = pci_mmap_resource_uc;
1354 } else {
1355 res_attr->mmap = pci_mmap_resource_uc;
1356 }
1357 }
1358 res_attr->attr.name = res_attr_name;
1359 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1360 res_attr->size = pci_resource_len(pdev, num);
1361 res_attr->private = (void *)(unsigned long)num;
1362 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1363 if (retval)
1364 kfree(res_attr);
1365
1366 return retval;
1367 }
1368
1369 /**
1370 * pci_create_resource_files - create resource files in sysfs for @dev
1371 * @pdev: dev in question
1372 *
1373 * Walk the resources in @pdev creating files for each resource available.
1374 */
1375 static int pci_create_resource_files(struct pci_dev *pdev)
1376 {
1377 int i;
1378 int retval;
1379
1380 /* Expose the PCI resources from this device as files */
1381 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1382
1383 /* skip empty resources */
1384 if (!pci_resource_len(pdev, i))
1385 continue;
1386
1387 retval = pci_create_attr(pdev, i, 0);
1388 /* for prefetchable resources, create a WC mappable file */
1389 if (!retval && arch_can_pci_mmap_wc() &&
1390 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1391 retval = pci_create_attr(pdev, i, 1);
1392 if (retval) {
1393 pci_remove_resource_files(pdev);
1394 return retval;
1395 }
1396 }
1397 return 0;
1398 }
1399 #else /* !HAVE_PCI_MMAP */
1400 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1401 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1402 #endif /* HAVE_PCI_MMAP */
1403
1404 /**
1405 * pci_write_rom - used to enable access to the PCI ROM display
1406 * @filp: sysfs file
1407 * @kobj: kernel object handle
1408 * @bin_attr: struct bin_attribute for this file
1409 * @buf: user input
1410 * @off: file offset
1411 * @count: number of byte in input
1412 *
1413 * writing anything except 0 enables it
1414 */
1415 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1416 struct bin_attribute *bin_attr, char *buf,
1417 loff_t off, size_t count)
1418 {
1419 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1420
1421 if ((off == 0) && (*buf == '0') && (count == 2))
1422 pdev->rom_attr_enabled = 0;
1423 else
1424 pdev->rom_attr_enabled = 1;
1425
1426 return count;
1427 }
1428
1429 /**
1430 * pci_read_rom - read a PCI ROM
1431 * @filp: sysfs file
1432 * @kobj: kernel object handle
1433 * @bin_attr: struct bin_attribute for this file
1434 * @buf: where to put the data we read from the ROM
1435 * @off: file offset
1436 * @count: number of bytes to read
1437 *
1438 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1439 * device corresponding to @kobj.
1440 */
1441 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1442 struct bin_attribute *bin_attr, char *buf,
1443 loff_t off, size_t count)
1444 {
1445 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1446 void __iomem *rom;
1447 size_t size;
1448
1449 if (!pdev->rom_attr_enabled)
1450 return -EINVAL;
1451
1452 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1453 if (!rom || !size)
1454 return -EIO;
1455
1456 if (off >= size)
1457 count = 0;
1458 else {
1459 if (off + count > size)
1460 count = size - off;
1461
1462 memcpy_fromio(buf, rom + off, count);
1463 }
1464 pci_unmap_rom(pdev, rom);
1465
1466 return count;
1467 }
1468
1469 static const struct bin_attribute pci_config_attr = {
1470 .attr = {
1471 .name = "config",
1472 .mode = S_IRUGO | S_IWUSR,
1473 },
1474 .size = PCI_CFG_SPACE_SIZE,
1475 .read = pci_read_config,
1476 .write = pci_write_config,
1477 };
1478
1479 static const struct bin_attribute pcie_config_attr = {
1480 .attr = {
1481 .name = "config",
1482 .mode = S_IRUGO | S_IWUSR,
1483 },
1484 .size = PCI_CFG_SPACE_EXP_SIZE,
1485 .read = pci_read_config,
1486 .write = pci_write_config,
1487 };
1488
1489 static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1490 const char *buf, size_t count)
1491 {
1492 struct pci_dev *pdev = to_pci_dev(dev);
1493 unsigned long val;
1494 ssize_t result = kstrtoul(buf, 0, &val);
1495
1496 if (result < 0)
1497 return result;
1498
1499 if (val != 1)
1500 return -EINVAL;
1501
1502 result = pci_reset_function(pdev);
1503 if (result < 0)
1504 return result;
1505
1506 return count;
1507 }
1508
1509 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1510
1511 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1512 {
1513 int retval;
1514 struct bin_attribute *attr;
1515
1516 /* If the device has VPD, try to expose it in sysfs. */
1517 if (dev->vpd) {
1518 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1519 if (!attr)
1520 return -ENOMEM;
1521
1522 sysfs_bin_attr_init(attr);
1523 attr->size = 0;
1524 attr->attr.name = "vpd";
1525 attr->attr.mode = S_IRUSR | S_IWUSR;
1526 attr->read = read_vpd_attr;
1527 attr->write = write_vpd_attr;
1528 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1529 if (retval) {
1530 kfree(attr);
1531 return retval;
1532 }
1533 dev->vpd->attr = attr;
1534 }
1535
1536 /* Active State Power Management */
1537 pcie_aspm_create_sysfs_dev_files(dev);
1538
1539 if (!pci_probe_reset_function(dev)) {
1540 retval = device_create_file(&dev->dev, &reset_attr);
1541 if (retval)
1542 goto error;
1543 dev->reset_fn = 1;
1544 }
1545 return 0;
1546
1547 error:
1548 pcie_aspm_remove_sysfs_dev_files(dev);
1549 if (dev->vpd && dev->vpd->attr) {
1550 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1551 kfree(dev->vpd->attr);
1552 }
1553
1554 return retval;
1555 }
1556
1557 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1558 {
1559 int retval;
1560 int rom_size;
1561 struct bin_attribute *attr;
1562
1563 if (!sysfs_initialized)
1564 return -EACCES;
1565
1566 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1567 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1568 else
1569 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1570 if (retval)
1571 goto err;
1572
1573 retval = pci_create_resource_files(pdev);
1574 if (retval)
1575 goto err_config_file;
1576
1577 /* If the device has a ROM, try to expose it in sysfs. */
1578 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1579 if (rom_size) {
1580 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1581 if (!attr) {
1582 retval = -ENOMEM;
1583 goto err_resource_files;
1584 }
1585 sysfs_bin_attr_init(attr);
1586 attr->size = rom_size;
1587 attr->attr.name = "rom";
1588 attr->attr.mode = S_IRUSR | S_IWUSR;
1589 attr->read = pci_read_rom;
1590 attr->write = pci_write_rom;
1591 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1592 if (retval) {
1593 kfree(attr);
1594 goto err_resource_files;
1595 }
1596 pdev->rom_attr = attr;
1597 }
1598
1599 /* add sysfs entries for various capabilities */
1600 retval = pci_create_capabilities_sysfs(pdev);
1601 if (retval)
1602 goto err_rom_file;
1603
1604 pci_create_firmware_label_files(pdev);
1605
1606 return 0;
1607
1608 err_rom_file:
1609 if (pdev->rom_attr) {
1610 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1611 kfree(pdev->rom_attr);
1612 pdev->rom_attr = NULL;
1613 }
1614 err_resource_files:
1615 pci_remove_resource_files(pdev);
1616 err_config_file:
1617 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1618 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1619 else
1620 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1621 err:
1622 return retval;
1623 }
1624
1625 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1626 {
1627 if (dev->vpd && dev->vpd->attr) {
1628 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1629 kfree(dev->vpd->attr);
1630 }
1631
1632 pcie_aspm_remove_sysfs_dev_files(dev);
1633 if (dev->reset_fn) {
1634 device_remove_file(&dev->dev, &reset_attr);
1635 dev->reset_fn = 0;
1636 }
1637 }
1638
1639 /**
1640 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1641 * @pdev: device whose entries we should free
1642 *
1643 * Cleanup when @pdev is removed from sysfs.
1644 */
1645 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1646 {
1647 if (!sysfs_initialized)
1648 return;
1649
1650 pci_remove_capabilities_sysfs(pdev);
1651
1652 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1653 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1654 else
1655 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1656
1657 pci_remove_resource_files(pdev);
1658
1659 if (pdev->rom_attr) {
1660 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1661 kfree(pdev->rom_attr);
1662 pdev->rom_attr = NULL;
1663 }
1664
1665 pci_remove_firmware_label_files(pdev);
1666 }
1667
1668 static int __init pci_sysfs_init(void)
1669 {
1670 struct pci_dev *pdev = NULL;
1671 int retval;
1672
1673 sysfs_initialized = 1;
1674 for_each_pci_dev(pdev) {
1675 retval = pci_create_sysfs_dev_files(pdev);
1676 if (retval) {
1677 pci_dev_put(pdev);
1678 return retval;
1679 }
1680 }
1681
1682 return 0;
1683 }
1684 late_initcall(pci_sysfs_init);
1685
1686 static struct attribute *pci_dev_dev_attrs[] = {
1687 &vga_attr.attr,
1688 NULL,
1689 };
1690
1691 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1692 struct attribute *a, int n)
1693 {
1694 struct device *dev = kobj_to_dev(kobj);
1695 struct pci_dev *pdev = to_pci_dev(dev);
1696
1697 if (a == &vga_attr.attr)
1698 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1699 return 0;
1700
1701 return a->mode;
1702 }
1703
1704 static struct attribute *pci_dev_hp_attrs[] = {
1705 &dev_remove_attr.attr,
1706 &dev_rescan_attr.attr,
1707 NULL,
1708 };
1709
1710 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1711 struct attribute *a, int n)
1712 {
1713 struct device *dev = kobj_to_dev(kobj);
1714 struct pci_dev *pdev = to_pci_dev(dev);
1715
1716 if (pdev->is_virtfn)
1717 return 0;
1718
1719 return a->mode;
1720 }
1721
1722 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1723 struct attribute *a, int n)
1724 {
1725 struct device *dev = kobj_to_dev(kobj);
1726 struct pci_dev *pdev = to_pci_dev(dev);
1727
1728 if (pci_is_bridge(pdev))
1729 return a->mode;
1730
1731 return 0;
1732 }
1733
1734 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1735 struct attribute *a, int n)
1736 {
1737 struct device *dev = kobj_to_dev(kobj);
1738 struct pci_dev *pdev = to_pci_dev(dev);
1739
1740 if (pci_is_pcie(pdev))
1741 return a->mode;
1742
1743 return 0;
1744 }
1745
1746 static const struct attribute_group pci_dev_group = {
1747 .attrs = pci_dev_attrs,
1748 };
1749
1750 const struct attribute_group *pci_dev_groups[] = {
1751 &pci_dev_group,
1752 NULL,
1753 };
1754
1755 static const struct attribute_group pci_bridge_group = {
1756 .attrs = pci_bridge_attrs,
1757 };
1758
1759 const struct attribute_group *pci_bridge_groups[] = {
1760 &pci_bridge_group,
1761 NULL,
1762 };
1763
1764 static const struct attribute_group pcie_dev_group = {
1765 .attrs = pcie_dev_attrs,
1766 };
1767
1768 const struct attribute_group *pcie_dev_groups[] = {
1769 &pcie_dev_group,
1770 NULL,
1771 };
1772
1773 static const struct attribute_group pci_dev_hp_attr_group = {
1774 .attrs = pci_dev_hp_attrs,
1775 .is_visible = pci_dev_hp_attrs_are_visible,
1776 };
1777
1778 #ifdef CONFIG_PCI_IOV
1779 static struct attribute *sriov_dev_attrs[] = {
1780 &sriov_totalvfs_attr.attr,
1781 &sriov_numvfs_attr.attr,
1782 &sriov_offset_attr.attr,
1783 &sriov_stride_attr.attr,
1784 &sriov_vf_device_attr.attr,
1785 &sriov_drivers_autoprobe_attr.attr,
1786 NULL,
1787 };
1788
1789 static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1790 struct attribute *a, int n)
1791 {
1792 struct device *dev = kobj_to_dev(kobj);
1793
1794 if (!dev_is_pf(dev))
1795 return 0;
1796
1797 return a->mode;
1798 }
1799
1800 static const struct attribute_group sriov_dev_attr_group = {
1801 .attrs = sriov_dev_attrs,
1802 .is_visible = sriov_attrs_are_visible,
1803 };
1804 #endif /* CONFIG_PCI_IOV */
1805
1806 static const struct attribute_group pci_dev_attr_group = {
1807 .attrs = pci_dev_dev_attrs,
1808 .is_visible = pci_dev_attrs_are_visible,
1809 };
1810
1811 static const struct attribute_group pci_bridge_attr_group = {
1812 .attrs = pci_bridge_attrs,
1813 .is_visible = pci_bridge_attrs_are_visible,
1814 };
1815
1816 static const struct attribute_group pcie_dev_attr_group = {
1817 .attrs = pcie_dev_attrs,
1818 .is_visible = pcie_dev_attrs_are_visible,
1819 };
1820
1821 static const struct attribute_group *pci_dev_attr_groups[] = {
1822 &pci_dev_attr_group,
1823 &pci_dev_hp_attr_group,
1824 #ifdef CONFIG_PCI_IOV
1825 &sriov_dev_attr_group,
1826 #endif
1827 &pci_bridge_attr_group,
1828 &pcie_dev_attr_group,
1829 NULL,
1830 };
1831
1832 const struct device_type pci_dev_type = {
1833 .groups = pci_dev_attr_groups,
1834 };
Linux with added FPC-III support