1 Atmel AT91 device tree bindings.
2 ================================
4 Boards with a SoC of the Atmel AT91 or SMART family shall have the following
7 Required root node properties:
8 compatible: must be one of:
11 * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
12 the specific SoC family or compatible:
16 o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
28 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
30 o "atmel,sama5d2" shall be extended with the specific SoC compatible:
32 o "atmel,sama5d3" shall be extended with the specific SoC compatible:
38 o "atmel,sama5d4" shall be extended with the specific SoC compatible:
44 * "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific
46 o "atmel,sams70" shall be extended with the specific MCU compatible:
56 o "atmel,samv70" shall be extended with the specific MCU compatible:
63 o "atmel,samv71" shall be extended with the specific MCU compatible:
74 Chipid required properties:
75 - compatible: Should be "atmel,sama5d2-chipid"
76 - reg : Should contain registers location and length
78 PIT Timer required properties:
79 - compatible: Should be "atmel,at91sam9260-pit"
80 - reg: Should contain registers location and length
81 - interrupts: Should contain interrupt for the PIT which is the IRQ line
82 shared across all System Controller members.
84 System Timer (ST) required properties:
85 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
86 - reg: Should contain registers location and length
87 - interrupts: Should contain interrupt for the ST which is the IRQ line
88 shared across all System Controller members.
89 - clocks: phandle to input clock.
91 - watchdog: compatible should be "atmel,at91rm9200-wdt"
93 RSTC Reset Controller required properties:
94 - compatible: Should be "atmel,<chip>-rstc".
95 <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
96 - reg: Should contain registers location and length
97 - clocks: phandle to input clock.
102 compatible = "atmel,at91sam9260-rstc";
103 reg = <0xfffffd00 0x10>;
107 RAMC SDRAM/DDR Controller required properties:
108 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
109 "atmel,at91sam9260-sdramc",
110 "atmel,at91sam9g45-ddramc",
111 "atmel,sama5d3-ddramc",
112 - reg: Should contain registers location and length
116 ramc0: ramc@ffffe800 {
117 compatible = "atmel,at91sam9g45-ddramc";
118 reg = <0xffffe800 0x200>;
121 SHDWC Shutdown Controller
124 - compatible: Should be "atmel,<chip>-shdwc".
125 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
126 - reg: Should contain registers location and length
127 - clocks: phandle to input clock.
130 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
131 Supported values are: "none", "high", "low", "any".
132 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
134 optional at91sam9260 properties:
135 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
137 optional at91sam9rl properties:
138 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
139 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
141 optional at91sam9x5 properties:
142 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
147 compatible = "atmel,at91sam9260-shdwc";
148 reg = <0xfffffd10 0x10>;
152 SHDWC SAMA5D2-Compatible Shutdown Controller
157 - compatible: should be "atmel,sama5d2-shdwc".
158 - reg: should contain registers location and length
159 - clocks: phandle to input clock.
160 - #address-cells: should be one. The cell is the wake-up input index.
161 - #size-cells: should be zero.
165 - debounce-delay-us: minimum wake-up inputs debouncer period in
166 microseconds. It's usually a board-related property.
167 - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
169 The node contains child nodes for each wake-up input that the platform uses.
173 Wake-up input nodes are usually described in the "board" part of the Device
174 Tree. Note also that input 0 is linked to the wake-up pin and is frequently
178 - reg: should contain the wake-up input index [0 - 15].
181 - atmel,wakeup-active-high: boolean, the corresponding wake-up input described
182 by the child, forces the wake-up of the core power supply on a high level.
183 The default is to be active low.
189 compatible = "atmel,sama5d2-shdwc";
190 reg = <0xf8048010 0x10>;
192 #address-cells = <1>;
194 atmel,wakeup-rtc-timer;
199 debounce-delay-us = <976>;
207 atmel,wakeup-active-high;
211 Special Function Registers (SFR)
213 Special Function Registers (SFR) manage specific aspects of the integrated
214 memory, bridge implementations, processor and other functionality not controlled
218 - compatible: Should be "atmel,<chip>-sfr", "syscon" or
219 "atmel,<chip>-sfrbu", "syscon"
220 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
221 - reg: Should contain registers location and length
224 compatible = "atmel,sama5d3-sfr", "syscon";
225 reg = <0xf0038000 0x60>;
228 Security Module (SECUMOD)
230 The Security Module macrocell provides all necessary secure functions to avoid
231 voltage, temperature, frequency and mechanical attacks on the chip. It also
232 embeds secure memories that can be scrambled
235 - compatible: Should be "atmel,<chip>-secumod", "syscon".
236 <chip> can be "sama5d2".
237 - reg: Should contain registers location and length
240 compatible = "atmel,sama5d2-secumod", "syscon";
241 reg = <0xfc040000 0x100>;