Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt

   1 Altera FPGA/HPS Bridge Driver
   2
   3 Required properties:
   4 - regs          : base address and size for AXI bridge module
   5 - compatible    : Should contain one of:
   6                   "altr,socfpga-lwhps2fpga-bridge",
   7                   "altr,socfpga-hps2fpga-bridge", or
   8                   "altr,socfpga-fpga2hps-bridge"
   9 - resets        : Phandle and reset specifier for this bridge's reset
  10 - clocks        : Clocks used by this module.
  11
  12 Optional properties:
  13 - bridge-enable : 0 if driver should disable bridge at startup.
  14                   1 if driver should enable bridge at startup.
  15                   Default is to leave bridge in its current state.
  16
  17 Example:
  18         fpga_bridge0: fpga-bridge@ff400000 {
  19                 compatible = "altr,socfpga-lwhps2fpga-bridge";
  20                 reg = <0xff400000 0x100000>;
  21                 resets = <&rst LWHPS2FPGA_RESET>;
  22                 clocks = <&l4_main_clk>;
  23                 bridge-enable = <0>;
  24         };
  25
  26         fpga_bridge1: fpga-bridge@ff500000 {
  27                 compatible = "altr,socfpga-hps2fpga-bridge";
  28                 reg = <0xff500000 0x10000>;
  29                 resets = <&rst HPS2FPGA_RESET>;
  30                 clocks = <&l4_main_clk>;
  31                 bridge-enable = <1>;
  32         };
  33
  34         fpga_bridge2: fpga-bridge@ff600000 {
  35                 compatible = "altr,socfpga-fpga2hps-bridge";
  36                 reg = <0xff600000 0x100000>;
  37                 resets = <&rst FPGA2HPS_RESET>;
  38                 clocks = <&l4_main_clk>;
  39         };