rtc: stm32: fix misspelling and misalignment issues
[linux/fpc-iii.git] / Documentation / devicetree / bindings / mfd / sun6i-prcm.txt
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1 * Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device
3 PRCM is an MFD device exposing several Power Management related devices
4 (like clks and reset controllers).
6 Required properties:
7  - compatible: "allwinner,sun6i-a31-prcm" or "allwinner,sun8i-a23-prcm"
8  - reg: The PRCM registers range
10 The prcm node may contain several subdevices definitions:
11  - see Documentation/devicetree/clk/sunxi.txt for clock devices
12  - see Documentation/devicetree/reset/allwinner,sunxi-clock-reset.txt for reset
13    controller devices
16 Example:
18         prcm: prcm@1f01400 {
19                 compatible = "allwinner,sun6i-a31-prcm";
20                 reg = <0x01f01400 0x200>;
22                 /* Put subdevices here */
23                 ar100: ar100_clk {
24                         compatible = "allwinner,sun6i-a31-ar100-clk";
25                         #clock-cells = <0>;
26                         clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
27                 };
29                 ahb0: ahb0_clk {
30                         compatible = "fixed-factor-clock";
31                         #clock-cells = <0>;
32                         clock-div = <1>;
33                         clock-mult = <1>;
34                         clocks = <&ar100_div>;
35                         clock-output-names = "ahb0";
36                 };
38                 apb0: apb0_clk {
39                         compatible = "allwinner,sun6i-a31-apb0-clk";
40                         #clock-cells = <0>;
41                         clocks = <&ahb0>;
42                         clock-output-names = "apb0";
43                 };
45                 apb0_gates: apb0_gates_clk {
46                         compatible = "allwinner,sun6i-a31-apb0-gates-clk";
47                         #clock-cells = <1>;
48                         clocks = <&apb0>;
49                         clock-output-names = "apb0_pio", "apb0_ir",
50                                         "apb0_timer01", "apb0_p2wi",
51                                         "apb0_uart", "apb0_1wire",
52                                         "apb0_i2c";
53                 };
55                 apb0_rst: apb0_rst {
56                         compatible = "allwinner,sun6i-a31-clock-reset";
57                         #reset-cells = <1>;
58                 };
59         };