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rtc: stm32: fix misspelling and misalignment issues
[linux/fpc-iii.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_debugfs.c
blob251d5bdc972f3daf0b6e3f241797ea966eb1ab5f
1 /*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
40
41 #include "cxgb4.h"
42 #include "t4_regs.h"
43 #include "t4_values.h"
44 #include "t4fw_api.h"
45 #include "cxgb4_debugfs.h"
46 #include "clip_tbl.h"
47 #include "l2t.h"
48 #include "cudbg_if.h"
49 #include "cudbg_lib_common.h"
50 #include "cudbg_entity.h"
51 #include "cudbg_lib.h"
52
53 /* generic seq_file support for showing a table of size rows x width. */
54 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
55 {
56 pos -= tb->skip_first;
57 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
58 }
59
60 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
61 {
62 struct seq_tab *tb = seq->private;
63
64 if (tb->skip_first && *pos == 0)
65 return SEQ_START_TOKEN;
66
67 return seq_tab_get_idx(tb, *pos);
68 }
69
70 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
71 {
72 v = seq_tab_get_idx(seq->private, *pos + 1);
73 if (v)
74 ++*pos;
75 return v;
76 }
77
78 static void seq_tab_stop(struct seq_file *seq, void *v)
79 {
80 }
81
82 static int seq_tab_show(struct seq_file *seq, void *v)
83 {
84 const struct seq_tab *tb = seq->private;
85
86 return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
87 }
88
89 static const struct seq_operations seq_tab_ops = {
90 .start = seq_tab_start,
91 .next = seq_tab_next,
92 .stop = seq_tab_stop,
93 .show = seq_tab_show
94 };
95
96 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
97 unsigned int width, unsigned int have_header,
98 int (*show)(struct seq_file *seq, void *v, int i))
99 {
100 struct seq_tab *p;
101
102 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
103 if (p) {
104 p->show = show;
105 p->rows = rows;
106 p->width = width;
107 p->skip_first = have_header != 0;
108 }
109 return p;
110 }
111
112 /* Trim the size of a seq_tab to the supplied number of rows. The operation is
113 * irreversible.
114 */
115 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
116 {
117 if (new_rows > p->rows)
118 return -EINVAL;
119 p->rows = new_rows;
120 return 0;
121 }
122
123 static int cim_la_show(struct seq_file *seq, void *v, int idx)
124 {
125 if (v == SEQ_START_TOKEN)
126 seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
127 " LS0Data\n");
128 else {
129 const u32 *p = v;
130
131 seq_printf(seq,
132 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
133 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
134 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
135 p[6], p[7]);
136 }
137 return 0;
138 }
139
140 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
141 {
142 if (v == SEQ_START_TOKEN) {
143 seq_puts(seq, "Status Data PC\n");
144 } else {
145 const u32 *p = v;
146
147 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
148 p[7]);
149 seq_printf(seq, " %02x %02x%06x %02x%06x\n",
150 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
151 p[4] & 0xff, p[5] >> 8);
152 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
153 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
154 }
155 return 0;
156 }
157
158 static int cim_la_show_t6(struct seq_file *seq, void *v, int idx)
159 {
160 if (v == SEQ_START_TOKEN) {
161 seq_puts(seq, "Status Inst Data PC LS0Stat "
162 "LS0Addr LS0Data LS1Stat LS1Addr LS1Data\n");
163 } else {
164 const u32 *p = v;
165
166 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n",
167 (p[9] >> 16) & 0xff, /* Status */
168 p[9] & 0xffff, p[8] >> 16, /* Inst */
169 p[8] & 0xffff, p[7] >> 16, /* Data */
170 p[7] & 0xffff, p[6] >> 16, /* PC */
171 p[2], p[1], p[0], /* LS0 Stat, Addr and Data */
172 p[5], p[4], p[3]); /* LS1 Stat, Addr and Data */
173 }
174 return 0;
175 }
176
177 static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx)
178 {
179 if (v == SEQ_START_TOKEN) {
180 seq_puts(seq, "Status Inst Data PC\n");
181 } else {
182 const u32 *p = v;
183
184 seq_printf(seq, " %02x %08x %08x %08x\n",
185 p[3] & 0xff, p[2], p[1], p[0]);
186 seq_printf(seq, " %02x %02x%06x %02x%06x %02x%06x\n",
187 (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
188 p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8);
189 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x\n",
190 (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16,
191 p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff,
192 p[6] >> 16);
193 }
194 return 0;
195 }
196
197 static int cim_la_open(struct inode *inode, struct file *file)
198 {
199 int ret;
200 unsigned int cfg;
201 struct seq_tab *p;
202 struct adapter *adap = inode->i_private;
203
204 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
205 if (ret)
206 return ret;
207
208 if (is_t6(adap->params.chip)) {
209 /* +1 to account for integer division of CIMLA_SIZE/10 */
210 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1,
211 10 * sizeof(u32), 1,
212 cfg & UPDBGLACAPTPCONLY_F ?
213 cim_la_show_pc_t6 : cim_la_show_t6);
214 } else {
215 p = seq_open_tab(file, adap->params.cim_la_size / 8,
216 8 * sizeof(u32), 1,
217 cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 :
218 cim_la_show);
219 }
220 if (!p)
221 return -ENOMEM;
222
223 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
224 if (ret)
225 seq_release_private(inode, file);
226 return ret;
227 }
228
229 static const struct file_operations cim_la_fops = {
230 .owner = THIS_MODULE,
231 .open = cim_la_open,
232 .read = seq_read,
233 .llseek = seq_lseek,
234 .release = seq_release_private
235 };
236
237 static int cim_pif_la_show(struct seq_file *seq, void *v, int idx)
238 {
239 const u32 *p = v;
240
241 if (v == SEQ_START_TOKEN) {
242 seq_puts(seq, "Cntl ID DataBE Addr Data\n");
243 } else if (idx < CIM_PIFLA_SIZE) {
244 seq_printf(seq, " %02x %02x %04x %08x %08x%08x%08x%08x\n",
245 (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f,
246 p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]);
247 } else {
248 if (idx == CIM_PIFLA_SIZE)
249 seq_puts(seq, "\nCntl ID Data\n");
250 seq_printf(seq, " %02x %02x %08x%08x%08x%08x\n",
251 (p[4] >> 6) & 0xff, p[4] & 0x3f,
252 p[3], p[2], p[1], p[0]);
253 }
254 return 0;
255 }
256
257 static int cim_pif_la_open(struct inode *inode, struct file *file)
258 {
259 struct seq_tab *p;
260 struct adapter *adap = inode->i_private;
261
262 p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1,
263 cim_pif_la_show);
264 if (!p)
265 return -ENOMEM;
266
267 t4_cim_read_pif_la(adap, (u32 *)p->data,
268 (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL);
269 return 0;
270 }
271
272 static const struct file_operations cim_pif_la_fops = {
273 .owner = THIS_MODULE,
274 .open = cim_pif_la_open,
275 .read = seq_read,
276 .llseek = seq_lseek,
277 .release = seq_release_private
278 };
279
280 static int cim_ma_la_show(struct seq_file *seq, void *v, int idx)
281 {
282 const u32 *p = v;
283
284 if (v == SEQ_START_TOKEN) {
285 seq_puts(seq, "\n");
286 } else if (idx < CIM_MALA_SIZE) {
287 seq_printf(seq, "%02x%08x%08x%08x%08x\n",
288 p[4], p[3], p[2], p[1], p[0]);
289 } else {
290 if (idx == CIM_MALA_SIZE)
291 seq_puts(seq,
292 "\nCnt ID Tag UE Data RDY VLD\n");
293 seq_printf(seq, "%3u %2u %x %u %08x%08x %u %u\n",
294 (p[2] >> 10) & 0xff, (p[2] >> 7) & 7,
295 (p[2] >> 3) & 0xf, (p[2] >> 2) & 1,
296 (p[1] >> 2) | ((p[2] & 3) << 30),
297 (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1,
298 p[0] & 1);
299 }
300 return 0;
301 }
302
303 static int cim_ma_la_open(struct inode *inode, struct file *file)
304 {
305 struct seq_tab *p;
306 struct adapter *adap = inode->i_private;
307
308 p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1,
309 cim_ma_la_show);
310 if (!p)
311 return -ENOMEM;
312
313 t4_cim_read_ma_la(adap, (u32 *)p->data,
314 (u32 *)p->data + 5 * CIM_MALA_SIZE);
315 return 0;
316 }
317
318 static const struct file_operations cim_ma_la_fops = {
319 .owner = THIS_MODULE,
320 .open = cim_ma_la_open,
321 .read = seq_read,
322 .llseek = seq_lseek,
323 .release = seq_release_private
324 };
325
326 static int cim_qcfg_show(struct seq_file *seq, void *v)
327 {
328 static const char * const qname[] = {
329 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
330 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
331 "SGE0-RX", "SGE1-RX"
332 };
333
334 int i;
335 struct adapter *adap = seq->private;
336 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
337 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
338 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
339 u16 thres[CIM_NUM_IBQ];
340 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
341 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
342 u32 *p = stat;
343 int cim_num_obq = is_t4(adap->params.chip) ?
344 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
345
346 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
347 UP_IBQ_0_SHADOW_RDADDR_A,
348 ARRAY_SIZE(stat), stat);
349 if (!i) {
350 if (is_t4(adap->params.chip)) {
351 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
352 ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
353 wr = obq_wr_t4;
354 } else {
355 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
356 ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
357 wr = obq_wr_t5;
358 }
359 }
360 if (i)
361 return i;
362
363 t4_read_cimq_cfg(adap, base, size, thres);
364
365 seq_printf(seq,
366 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
367 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
368 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
369 qname[i], base[i], size[i], thres[i],
370 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
371 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
372 QUEREMFLITS_G(p[2]) * 16);
373 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
374 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
375 qname[i], base[i], size[i],
376 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
377 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
378 QUEREMFLITS_G(p[2]) * 16);
379 return 0;
380 }
381
382 static int cim_qcfg_open(struct inode *inode, struct file *file)
383 {
384 return single_open(file, cim_qcfg_show, inode->i_private);
385 }
386
387 static const struct file_operations cim_qcfg_fops = {
388 .owner = THIS_MODULE,
389 .open = cim_qcfg_open,
390 .read = seq_read,
391 .llseek = seq_lseek,
392 .release = single_release,
393 };
394
395 static int cimq_show(struct seq_file *seq, void *v, int idx)
396 {
397 const u32 *p = v;
398
399 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
400 p[2], p[3]);
401 return 0;
402 }
403
404 static int cim_ibq_open(struct inode *inode, struct file *file)
405 {
406 int ret;
407 struct seq_tab *p;
408 unsigned int qid = (uintptr_t)inode->i_private & 7;
409 struct adapter *adap = inode->i_private - qid;
410
411 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
412 if (!p)
413 return -ENOMEM;
414
415 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
416 if (ret < 0)
417 seq_release_private(inode, file);
418 else
419 ret = 0;
420 return ret;
421 }
422
423 static const struct file_operations cim_ibq_fops = {
424 .owner = THIS_MODULE,
425 .open = cim_ibq_open,
426 .read = seq_read,
427 .llseek = seq_lseek,
428 .release = seq_release_private
429 };
430
431 static int cim_obq_open(struct inode *inode, struct file *file)
432 {
433 int ret;
434 struct seq_tab *p;
435 unsigned int qid = (uintptr_t)inode->i_private & 7;
436 struct adapter *adap = inode->i_private - qid;
437
438 p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
439 if (!p)
440 return -ENOMEM;
441
442 ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
443 if (ret < 0) {
444 seq_release_private(inode, file);
445 } else {
446 seq_tab_trim(p, ret / 4);
447 ret = 0;
448 }
449 return ret;
450 }
451
452 static const struct file_operations cim_obq_fops = {
453 .owner = THIS_MODULE,
454 .open = cim_obq_open,
455 .read = seq_read,
456 .llseek = seq_lseek,
457 .release = seq_release_private
458 };
459
460 struct field_desc {
461 const char *name;
462 unsigned int start;
463 unsigned int width;
464 };
465
466 static void field_desc_show(struct seq_file *seq, u64 v,
467 const struct field_desc *p)
468 {
469 char buf[32];
470 int line_size = 0;
471
472 while (p->name) {
473 u64 mask = (1ULL << p->width) - 1;
474 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
475 ((unsigned long long)v >> p->start) & mask);
476
477 if (line_size + len >= 79) {
478 line_size = 8;
479 seq_puts(seq, "\n ");
480 }
481 seq_printf(seq, "%s ", buf);
482 line_size += len + 1;
483 p++;
484 }
485 seq_putc(seq, '\n');
486 }
487
488 static struct field_desc tp_la0[] = {
489 { "RcfOpCodeOut", 60, 4 },
490 { "State", 56, 4 },
491 { "WcfState", 52, 4 },
492 { "RcfOpcSrcOut", 50, 2 },
493 { "CRxError", 49, 1 },
494 { "ERxError", 48, 1 },
495 { "SanityFailed", 47, 1 },
496 { "SpuriousMsg", 46, 1 },
497 { "FlushInputMsg", 45, 1 },
498 { "FlushInputCpl", 44, 1 },
499 { "RssUpBit", 43, 1 },
500 { "RssFilterHit", 42, 1 },
501 { "Tid", 32, 10 },
502 { "InitTcb", 31, 1 },
503 { "LineNumber", 24, 7 },
504 { "Emsg", 23, 1 },
505 { "EdataOut", 22, 1 },
506 { "Cmsg", 21, 1 },
507 { "CdataOut", 20, 1 },
508 { "EreadPdu", 19, 1 },
509 { "CreadPdu", 18, 1 },
510 { "TunnelPkt", 17, 1 },
511 { "RcfPeerFin", 16, 1 },
512 { "RcfReasonOut", 12, 4 },
513 { "TxCchannel", 10, 2 },
514 { "RcfTxChannel", 8, 2 },
515 { "RxEchannel", 6, 2 },
516 { "RcfRxChannel", 5, 1 },
517 { "RcfDataOutSrdy", 4, 1 },
518 { "RxDvld", 3, 1 },
519 { "RxOoDvld", 2, 1 },
520 { "RxCongestion", 1, 1 },
521 { "TxCongestion", 0, 1 },
522 { NULL }
523 };
524
525 static int tp_la_show(struct seq_file *seq, void *v, int idx)
526 {
527 const u64 *p = v;
528
529 field_desc_show(seq, *p, tp_la0);
530 return 0;
531 }
532
533 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
534 {
535 const u64 *p = v;
536
537 if (idx)
538 seq_putc(seq, '\n');
539 field_desc_show(seq, p[0], tp_la0);
540 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
541 field_desc_show(seq, p[1], tp_la0);
542 return 0;
543 }
544
545 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
546 {
547 static struct field_desc tp_la1[] = {
548 { "CplCmdIn", 56, 8 },
549 { "CplCmdOut", 48, 8 },
550 { "ESynOut", 47, 1 },
551 { "EAckOut", 46, 1 },
552 { "EFinOut", 45, 1 },
553 { "ERstOut", 44, 1 },
554 { "SynIn", 43, 1 },
555 { "AckIn", 42, 1 },
556 { "FinIn", 41, 1 },
557 { "RstIn", 40, 1 },
558 { "DataIn", 39, 1 },
559 { "DataInVld", 38, 1 },
560 { "PadIn", 37, 1 },
561 { "RxBufEmpty", 36, 1 },
562 { "RxDdp", 35, 1 },
563 { "RxFbCongestion", 34, 1 },
564 { "TxFbCongestion", 33, 1 },
565 { "TxPktSumSrdy", 32, 1 },
566 { "RcfUlpType", 28, 4 },
567 { "Eread", 27, 1 },
568 { "Ebypass", 26, 1 },
569 { "Esave", 25, 1 },
570 { "Static0", 24, 1 },
571 { "Cread", 23, 1 },
572 { "Cbypass", 22, 1 },
573 { "Csave", 21, 1 },
574 { "CPktOut", 20, 1 },
575 { "RxPagePoolFull", 18, 2 },
576 { "RxLpbkPkt", 17, 1 },
577 { "TxLpbkPkt", 16, 1 },
578 { "RxVfValid", 15, 1 },
579 { "SynLearned", 14, 1 },
580 { "SetDelEntry", 13, 1 },
581 { "SetInvEntry", 12, 1 },
582 { "CpcmdDvld", 11, 1 },
583 { "CpcmdSave", 10, 1 },
584 { "RxPstructsFull", 8, 2 },
585 { "EpcmdDvld", 7, 1 },
586 { "EpcmdFlush", 6, 1 },
587 { "EpcmdTrimPrefix", 5, 1 },
588 { "EpcmdTrimPostfix", 4, 1 },
589 { "ERssIp4Pkt", 3, 1 },
590 { "ERssIp6Pkt", 2, 1 },
591 { "ERssTcpUdpPkt", 1, 1 },
592 { "ERssFceFipPkt", 0, 1 },
593 { NULL }
594 };
595 static struct field_desc tp_la2[] = {
596 { "CplCmdIn", 56, 8 },
597 { "MpsVfVld", 55, 1 },
598 { "MpsPf", 52, 3 },
599 { "MpsVf", 44, 8 },
600 { "SynIn", 43, 1 },
601 { "AckIn", 42, 1 },
602 { "FinIn", 41, 1 },
603 { "RstIn", 40, 1 },
604 { "DataIn", 39, 1 },
605 { "DataInVld", 38, 1 },
606 { "PadIn", 37, 1 },
607 { "RxBufEmpty", 36, 1 },
608 { "RxDdp", 35, 1 },
609 { "RxFbCongestion", 34, 1 },
610 { "TxFbCongestion", 33, 1 },
611 { "TxPktSumSrdy", 32, 1 },
612 { "RcfUlpType", 28, 4 },
613 { "Eread", 27, 1 },
614 { "Ebypass", 26, 1 },
615 { "Esave", 25, 1 },
616 { "Static0", 24, 1 },
617 { "Cread", 23, 1 },
618 { "Cbypass", 22, 1 },
619 { "Csave", 21, 1 },
620 { "CPktOut", 20, 1 },
621 { "RxPagePoolFull", 18, 2 },
622 { "RxLpbkPkt", 17, 1 },
623 { "TxLpbkPkt", 16, 1 },
624 { "RxVfValid", 15, 1 },
625 { "SynLearned", 14, 1 },
626 { "SetDelEntry", 13, 1 },
627 { "SetInvEntry", 12, 1 },
628 { "CpcmdDvld", 11, 1 },
629 { "CpcmdSave", 10, 1 },
630 { "RxPstructsFull", 8, 2 },
631 { "EpcmdDvld", 7, 1 },
632 { "EpcmdFlush", 6, 1 },
633 { "EpcmdTrimPrefix", 5, 1 },
634 { "EpcmdTrimPostfix", 4, 1 },
635 { "ERssIp4Pkt", 3, 1 },
636 { "ERssIp6Pkt", 2, 1 },
637 { "ERssTcpUdpPkt", 1, 1 },
638 { "ERssFceFipPkt", 0, 1 },
639 { NULL }
640 };
641 const u64 *p = v;
642
643 if (idx)
644 seq_putc(seq, '\n');
645 field_desc_show(seq, p[0], tp_la0);
646 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
647 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
648 return 0;
649 }
650
651 static int tp_la_open(struct inode *inode, struct file *file)
652 {
653 struct seq_tab *p;
654 struct adapter *adap = inode->i_private;
655
656 switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
657 case 2:
658 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
659 tp_la_show2);
660 break;
661 case 3:
662 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
663 tp_la_show3);
664 break;
665 default:
666 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
667 }
668 if (!p)
669 return -ENOMEM;
670
671 t4_tp_read_la(adap, (u64 *)p->data, NULL);
672 return 0;
673 }
674
675 static ssize_t tp_la_write(struct file *file, const char __user *buf,
676 size_t count, loff_t *pos)
677 {
678 int err;
679 char s[32];
680 unsigned long val;
681 size_t size = min(sizeof(s) - 1, count);
682 struct adapter *adap = file_inode(file)->i_private;
683
684 if (copy_from_user(s, buf, size))
685 return -EFAULT;
686 s[size] = '\0';
687 err = kstrtoul(s, 0, &val);
688 if (err)
689 return err;
690 if (val > 0xffff)
691 return -EINVAL;
692 adap->params.tp.la_mask = val << 16;
693 t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
694 adap->params.tp.la_mask);
695 return count;
696 }
697
698 static const struct file_operations tp_la_fops = {
699 .owner = THIS_MODULE,
700 .open = tp_la_open,
701 .read = seq_read,
702 .llseek = seq_lseek,
703 .release = seq_release_private,
704 .write = tp_la_write
705 };
706
707 static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
708 {
709 const u32 *p = v;
710
711 if (v == SEQ_START_TOKEN)
712 seq_puts(seq, " Pcmd Type Message"
713 " Data\n");
714 else
715 seq_printf(seq, "%08x%08x %4x %08x %08x%08x%08x%08x\n",
716 p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
717 return 0;
718 }
719
720 static int ulprx_la_open(struct inode *inode, struct file *file)
721 {
722 struct seq_tab *p;
723 struct adapter *adap = inode->i_private;
724
725 p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
726 ulprx_la_show);
727 if (!p)
728 return -ENOMEM;
729
730 t4_ulprx_read_la(adap, (u32 *)p->data);
731 return 0;
732 }
733
734 static const struct file_operations ulprx_la_fops = {
735 .owner = THIS_MODULE,
736 .open = ulprx_la_open,
737 .read = seq_read,
738 .llseek = seq_lseek,
739 .release = seq_release_private
740 };
741
742 /* Show the PM memory stats. These stats include:
743 *
744 * TX:
745 * Read: memory read operation
746 * Write Bypass: cut-through
747 * Bypass + mem: cut-through and save copy
748 *
749 * RX:
750 * Read: memory read
751 * Write Bypass: cut-through
752 * Flush: payload trim or drop
753 */
754 static int pm_stats_show(struct seq_file *seq, void *v)
755 {
756 static const char * const tx_pm_stats[] = {
757 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
758 };
759 static const char * const rx_pm_stats[] = {
760 "Read:", "Write bypass:", "Write mem:", "Flush:"
761 };
762
763 int i;
764 u32 tx_cnt[T6_PM_NSTATS], rx_cnt[T6_PM_NSTATS];
765 u64 tx_cyc[T6_PM_NSTATS], rx_cyc[T6_PM_NSTATS];
766 struct adapter *adap = seq->private;
767
768 t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
769 t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
770
771 seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
772 for (i = 0; i < PM_NSTATS - 1; i++)
773 seq_printf(seq, "%-13s %10u %20llu\n",
774 tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
775
776 seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
777 for (i = 0; i < PM_NSTATS - 1; i++)
778 seq_printf(seq, "%-13s %10u %20llu\n",
779 rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
780
781 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) {
782 /* In T5 the granularity of the total wait is too fine.
783 * It is not useful as it reaches the max value too fast.
784 * Hence display this Input FIFO wait for T6 onwards.
785 */
786 seq_printf(seq, "%13s %10s %20s\n",
787 " ", "Total wait", "Total Occupancy");
788 seq_printf(seq, "Tx FIFO wait %10u %20llu\n",
789 tx_cnt[i], tx_cyc[i]);
790 seq_printf(seq, "Rx FIFO wait %10u %20llu\n",
791 rx_cnt[i], rx_cyc[i]);
792
793 /* Skip index 6 as there is nothing useful ihere */
794 i += 2;
795
796 /* At index 7, a new stat for read latency (count, total wait)
797 * is added.
798 */
799 seq_printf(seq, "%13s %10s %20s\n",
800 " ", "Reads", "Total wait");
801 seq_printf(seq, "Tx latency %10u %20llu\n",
802 tx_cnt[i], tx_cyc[i]);
803 seq_printf(seq, "Rx latency %10u %20llu\n",
804 rx_cnt[i], rx_cyc[i]);
805 }
806 return 0;
807 }
808
809 static int pm_stats_open(struct inode *inode, struct file *file)
810 {
811 return single_open(file, pm_stats_show, inode->i_private);
812 }
813
814 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
815 size_t count, loff_t *pos)
816 {
817 struct adapter *adap = file_inode(file)->i_private;
818
819 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
820 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
821 return count;
822 }
823
824 static const struct file_operations pm_stats_debugfs_fops = {
825 .owner = THIS_MODULE,
826 .open = pm_stats_open,
827 .read = seq_read,
828 .llseek = seq_lseek,
829 .release = single_release,
830 .write = pm_stats_clear
831 };
832
833 static int tx_rate_show(struct seq_file *seq, void *v)
834 {
835 u64 nrate[NCHAN], orate[NCHAN];
836 struct adapter *adap = seq->private;
837
838 t4_get_chan_txrate(adap, nrate, orate);
839 if (adap->params.arch.nchan == NCHAN) {
840 seq_puts(seq, " channel 0 channel 1 "
841 "channel 2 channel 3\n");
842 seq_printf(seq, "NIC B/s: %10llu %10llu %10llu %10llu\n",
843 (unsigned long long)nrate[0],
844 (unsigned long long)nrate[1],
845 (unsigned long long)nrate[2],
846 (unsigned long long)nrate[3]);
847 seq_printf(seq, "Offload B/s: %10llu %10llu %10llu %10llu\n",
848 (unsigned long long)orate[0],
849 (unsigned long long)orate[1],
850 (unsigned long long)orate[2],
851 (unsigned long long)orate[3]);
852 } else {
853 seq_puts(seq, " channel 0 channel 1\n");
854 seq_printf(seq, "NIC B/s: %10llu %10llu\n",
855 (unsigned long long)nrate[0],
856 (unsigned long long)nrate[1]);
857 seq_printf(seq, "Offload B/s: %10llu %10llu\n",
858 (unsigned long long)orate[0],
859 (unsigned long long)orate[1]);
860 }
861 return 0;
862 }
863
864 DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate);
865
866 static int cctrl_tbl_show(struct seq_file *seq, void *v)
867 {
868 static const char * const dec_fac[] = {
869 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
870 "0.9375" };
871
872 int i;
873 u16 (*incr)[NCCTRL_WIN];
874 struct adapter *adap = seq->private;
875
876 incr = kmalloc(sizeof(*incr) * NMTUS, GFP_KERNEL);
877 if (!incr)
878 return -ENOMEM;
879
880 t4_read_cong_tbl(adap, incr);
881
882 for (i = 0; i < NCCTRL_WIN; ++i) {
883 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
884 incr[0][i], incr[1][i], incr[2][i], incr[3][i],
885 incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
886 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
887 incr[8][i], incr[9][i], incr[10][i], incr[11][i],
888 incr[12][i], incr[13][i], incr[14][i], incr[15][i],
889 adap->params.a_wnd[i],
890 dec_fac[adap->params.b_wnd[i]]);
891 }
892
893 kfree(incr);
894 return 0;
895 }
896
897 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
898
899 /* Format a value in a unit that differs from the value's native unit by the
900 * given factor.
901 */
902 static char *unit_conv(char *buf, size_t len, unsigned int val,
903 unsigned int factor)
904 {
905 unsigned int rem = val % factor;
906
907 if (rem == 0) {
908 snprintf(buf, len, "%u", val / factor);
909 } else {
910 while (rem % 10 == 0)
911 rem /= 10;
912 snprintf(buf, len, "%u.%u", val / factor, rem);
913 }
914 return buf;
915 }
916
917 static int clk_show(struct seq_file *seq, void *v)
918 {
919 char buf[32];
920 struct adapter *adap = seq->private;
921 unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
922 u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
923 unsigned int tre = TIMERRESOLUTION_G(res);
924 unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
925 unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
926
927 seq_printf(seq, "Core clock period: %s ns\n",
928 unit_conv(buf, sizeof(buf), cclk_ps, 1000));
929 seq_printf(seq, "TP timer tick: %s us\n",
930 unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
931 seq_printf(seq, "TCP timestamp tick: %s us\n",
932 unit_conv(buf, sizeof(buf),
933 (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
934 seq_printf(seq, "DACK tick: %s us\n",
935 unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
936 seq_printf(seq, "DACK timer: %u us\n",
937 ((cclk_ps << dack_re) / 1000000) *
938 t4_read_reg(adap, TP_DACK_TIMER_A));
939 seq_printf(seq, "Retransmit min: %llu us\n",
940 tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
941 seq_printf(seq, "Retransmit max: %llu us\n",
942 tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
943 seq_printf(seq, "Persist timer min: %llu us\n",
944 tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
945 seq_printf(seq, "Persist timer max: %llu us\n",
946 tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
947 seq_printf(seq, "Keepalive idle timer: %llu us\n",
948 tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
949 seq_printf(seq, "Keepalive interval: %llu us\n",
950 tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
951 seq_printf(seq, "Initial SRTT: %llu us\n",
952 tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
953 seq_printf(seq, "FINWAIT2 timer: %llu us\n",
954 tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
955
956 return 0;
957 }
958
959 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
960
961 /* Firmware Device Log dump. */
962 static const char * const devlog_level_strings[] = {
963 [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
964 [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
965 [FW_DEVLOG_LEVEL_ERR] = "ERR",
966 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
967 [FW_DEVLOG_LEVEL_INFO] = "INFO",
968 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
969 };
970
971 static const char * const devlog_facility_strings[] = {
972 [FW_DEVLOG_FACILITY_CORE] = "CORE",
973 [FW_DEVLOG_FACILITY_CF] = "CF",
974 [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
975 [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
976 [FW_DEVLOG_FACILITY_RES] = "RES",
977 [FW_DEVLOG_FACILITY_HW] = "HW",
978 [FW_DEVLOG_FACILITY_FLR] = "FLR",
979 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
980 [FW_DEVLOG_FACILITY_PHY] = "PHY",
981 [FW_DEVLOG_FACILITY_MAC] = "MAC",
982 [FW_DEVLOG_FACILITY_PORT] = "PORT",
983 [FW_DEVLOG_FACILITY_VI] = "VI",
984 [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
985 [FW_DEVLOG_FACILITY_ACL] = "ACL",
986 [FW_DEVLOG_FACILITY_TM] = "TM",
987 [FW_DEVLOG_FACILITY_QFC] = "QFC",
988 [FW_DEVLOG_FACILITY_DCB] = "DCB",
989 [FW_DEVLOG_FACILITY_ETH] = "ETH",
990 [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
991 [FW_DEVLOG_FACILITY_RI] = "RI",
992 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
993 [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
994 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
995 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
996 };
997
998 /* Information gathered by Device Log Open routine for the display routine.
999 */
1000 struct devlog_info {
1001 unsigned int nentries; /* number of entries in log[] */
1002 unsigned int first; /* first [temporal] entry in log[] */
1003 struct fw_devlog_e log[0]; /* Firmware Device Log */
1004 };
1005
1006 /* Dump a Firmaware Device Log entry.
1007 */
1008 static int devlog_show(struct seq_file *seq, void *v)
1009 {
1010 if (v == SEQ_START_TOKEN)
1011 seq_printf(seq, "%10s %15s %8s %8s %s\n",
1012 "Seq#", "Tstamp", "Level", "Facility", "Message");
1013 else {
1014 struct devlog_info *dinfo = seq->private;
1015 int fidx = (uintptr_t)v - 2;
1016 unsigned long index;
1017 struct fw_devlog_e *e;
1018
1019 /* Get a pointer to the log entry to display. Skip unused log
1020 * entries.
1021 */
1022 index = dinfo->first + fidx;
1023 if (index >= dinfo->nentries)
1024 index -= dinfo->nentries;
1025 e = &dinfo->log[index];
1026 if (e->timestamp == 0)
1027 return 0;
1028
1029 /* Print the message. This depends on the firmware using
1030 * exactly the same formating strings as the kernel so we may
1031 * eventually have to put a format interpreter in here ...
1032 */
1033 seq_printf(seq, "%10d %15llu %8s %8s ",
1034 be32_to_cpu(e->seqno),
1035 be64_to_cpu(e->timestamp),
1036 (e->level < ARRAY_SIZE(devlog_level_strings)
1037 ? devlog_level_strings[e->level]
1038 : "UNKNOWN"),
1039 (e->facility < ARRAY_SIZE(devlog_facility_strings)
1040 ? devlog_facility_strings[e->facility]
1041 : "UNKNOWN"));
1042 seq_printf(seq, e->fmt,
1043 be32_to_cpu(e->params[0]),
1044 be32_to_cpu(e->params[1]),
1045 be32_to_cpu(e->params[2]),
1046 be32_to_cpu(e->params[3]),
1047 be32_to_cpu(e->params[4]),
1048 be32_to_cpu(e->params[5]),
1049 be32_to_cpu(e->params[6]),
1050 be32_to_cpu(e->params[7]));
1051 }
1052 return 0;
1053 }
1054
1055 /* Sequential File Operations for Device Log.
1056 */
1057 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
1058 {
1059 if (pos > dinfo->nentries)
1060 return NULL;
1061
1062 return (void *)(uintptr_t)(pos + 1);
1063 }
1064
1065 static void *devlog_start(struct seq_file *seq, loff_t *pos)
1066 {
1067 struct devlog_info *dinfo = seq->private;
1068
1069 return (*pos
1070 ? devlog_get_idx(dinfo, *pos)
1071 : SEQ_START_TOKEN);
1072 }
1073
1074 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
1075 {
1076 struct devlog_info *dinfo = seq->private;
1077
1078 (*pos)++;
1079 return devlog_get_idx(dinfo, *pos);
1080 }
1081
1082 static void devlog_stop(struct seq_file *seq, void *v)
1083 {
1084 }
1085
1086 static const struct seq_operations devlog_seq_ops = {
1087 .start = devlog_start,
1088 .next = devlog_next,
1089 .stop = devlog_stop,
1090 .show = devlog_show
1091 };
1092
1093 /* Set up for reading the firmware's device log. We read the entire log here
1094 * and then display it incrementally in devlog_show().
1095 */
1096 static int devlog_open(struct inode *inode, struct file *file)
1097 {
1098 struct adapter *adap = inode->i_private;
1099 struct devlog_params *dparams = &adap->params.devlog;
1100 struct devlog_info *dinfo;
1101 unsigned int index;
1102 u32 fseqno;
1103 int ret;
1104
1105 /* If we don't know where the log is we can't do anything.
1106 */
1107 if (dparams->start == 0)
1108 return -ENXIO;
1109
1110 /* Allocate the space to read in the firmware's device log and set up
1111 * for the iterated call to our display function.
1112 */
1113 dinfo = __seq_open_private(file, &devlog_seq_ops,
1114 sizeof(*dinfo) + dparams->size);
1115 if (!dinfo)
1116 return -ENOMEM;
1117
1118 /* Record the basic log buffer information and read in the raw log.
1119 */
1120 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
1121 dinfo->first = 0;
1122 spin_lock(&adap->win0_lock);
1123 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
1124 dparams->start, dparams->size, (__be32 *)dinfo->log,
1125 T4_MEMORY_READ);
1126 spin_unlock(&adap->win0_lock);
1127 if (ret) {
1128 seq_release_private(inode, file);
1129 return ret;
1130 }
1131
1132 /* Find the earliest (lowest Sequence Number) log entry in the
1133 * circular Device Log.
1134 */
1135 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
1136 struct fw_devlog_e *e = &dinfo->log[index];
1137 __u32 seqno;
1138
1139 if (e->timestamp == 0)
1140 continue;
1141
1142 seqno = be32_to_cpu(e->seqno);
1143 if (seqno < fseqno) {
1144 fseqno = seqno;
1145 dinfo->first = index;
1146 }
1147 }
1148 return 0;
1149 }
1150
1151 static const struct file_operations devlog_fops = {
1152 .owner = THIS_MODULE,
1153 .open = devlog_open,
1154 .read = seq_read,
1155 .llseek = seq_lseek,
1156 .release = seq_release_private
1157 };
1158
1159 /* Show Firmware Mailbox Command/Reply Log
1160 *
1161 * Note that we don't do any locking when dumping the Firmware Mailbox Log so
1162 * it's possible that we can catch things during a log update and therefore
1163 * see partially corrupted log entries. But it's probably Good Enough(tm).
1164 * If we ever decide that we want to make sure that we're dumping a coherent
1165 * log, we'd need to perform locking in the mailbox logging and in
1166 * mboxlog_open() where we'd need to grab the entire mailbox log in one go
1167 * like we do for the Firmware Device Log.
1168 */
1169 static int mboxlog_show(struct seq_file *seq, void *v)
1170 {
1171 struct adapter *adapter = seq->private;
1172 struct mbox_cmd_log *log = adapter->mbox_log;
1173 struct mbox_cmd *entry;
1174 int entry_idx, i;
1175
1176 if (v == SEQ_START_TOKEN) {
1177 seq_printf(seq,
1178 "%10s %15s %5s %5s %s\n",
1179 "Seq#", "Tstamp", "Atime", "Etime",
1180 "Command/Reply");
1181 return 0;
1182 }
1183
1184 entry_idx = log->cursor + ((uintptr_t)v - 2);
1185 if (entry_idx >= log->size)
1186 entry_idx -= log->size;
1187 entry = mbox_cmd_log_entry(log, entry_idx);
1188
1189 /* skip over unused entries */
1190 if (entry->timestamp == 0)
1191 return 0;
1192
1193 seq_printf(seq, "%10u %15llu %5d %5d",
1194 entry->seqno, entry->timestamp,
1195 entry->access, entry->execute);
1196 for (i = 0; i < MBOX_LEN / 8; i++) {
1197 u64 flit = entry->cmd[i];
1198 u32 hi = (u32)(flit >> 32);
1199 u32 lo = (u32)flit;
1200
1201 seq_printf(seq, " %08x %08x", hi, lo);
1202 }
1203 seq_puts(seq, "\n");
1204 return 0;
1205 }
1206
1207 static inline void *mboxlog_get_idx(struct seq_file *seq, loff_t pos)
1208 {
1209 struct adapter *adapter = seq->private;
1210 struct mbox_cmd_log *log = adapter->mbox_log;
1211
1212 return ((pos <= log->size) ? (void *)(uintptr_t)(pos + 1) : NULL);
1213 }
1214
1215 static void *mboxlog_start(struct seq_file *seq, loff_t *pos)
1216 {
1217 return *pos ? mboxlog_get_idx(seq, *pos) : SEQ_START_TOKEN;
1218 }
1219
1220 static void *mboxlog_next(struct seq_file *seq, void *v, loff_t *pos)
1221 {
1222 ++*pos;
1223 return mboxlog_get_idx(seq, *pos);
1224 }
1225
1226 static void mboxlog_stop(struct seq_file *seq, void *v)
1227 {
1228 }
1229
1230 static const struct seq_operations mboxlog_seq_ops = {
1231 .start = mboxlog_start,
1232 .next = mboxlog_next,
1233 .stop = mboxlog_stop,
1234 .show = mboxlog_show
1235 };
1236
1237 static int mboxlog_open(struct inode *inode, struct file *file)
1238 {
1239 int res = seq_open(file, &mboxlog_seq_ops);
1240
1241 if (!res) {
1242 struct seq_file *seq = file->private_data;
1243
1244 seq->private = inode->i_private;
1245 }
1246 return res;
1247 }
1248
1249 static const struct file_operations mboxlog_fops = {
1250 .owner = THIS_MODULE,
1251 .open = mboxlog_open,
1252 .read = seq_read,
1253 .llseek = seq_lseek,
1254 .release = seq_release,
1255 };
1256
1257 static int mbox_show(struct seq_file *seq, void *v)
1258 {
1259 static const char * const owner[] = { "none", "FW", "driver",
1260 "unknown", "<unread>" };
1261
1262 int i;
1263 unsigned int mbox = (uintptr_t)seq->private & 7;
1264 struct adapter *adap = seq->private - mbox;
1265 void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1266
1267 /* For T4 we don't have a shadow copy of the Mailbox Control register.
1268 * And since reading that real register causes a side effect of
1269 * granting ownership, we're best of simply not reading it at all.
1270 */
1271 if (is_t4(adap->params.chip)) {
1272 i = 4; /* index of "<unread>" */
1273 } else {
1274 unsigned int ctrl_reg = CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A;
1275 void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
1276
1277 i = MBOWNER_G(readl(ctrl));
1278 }
1279
1280 seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
1281
1282 for (i = 0; i < MBOX_LEN; i += 8)
1283 seq_printf(seq, "%016llx\n",
1284 (unsigned long long)readq(addr + i));
1285 return 0;
1286 }
1287
1288 static int mbox_open(struct inode *inode, struct file *file)
1289 {
1290 return single_open(file, mbox_show, inode->i_private);
1291 }
1292
1293 static ssize_t mbox_write(struct file *file, const char __user *buf,
1294 size_t count, loff_t *pos)
1295 {
1296 int i;
1297 char c = '\n', s[256];
1298 unsigned long long data[8];
1299 const struct inode *ino;
1300 unsigned int mbox;
1301 struct adapter *adap;
1302 void __iomem *addr;
1303 void __iomem *ctrl;
1304
1305 if (count > sizeof(s) - 1 || !count)
1306 return -EINVAL;
1307 if (copy_from_user(s, buf, count))
1308 return -EFAULT;
1309 s[count] = '\0';
1310
1311 if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
1312 &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
1313 &data[7], &c) < 8 || c != '\n')
1314 return -EINVAL;
1315
1316 ino = file_inode(file);
1317 mbox = (uintptr_t)ino->i_private & 7;
1318 adap = ino->i_private - mbox;
1319 addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1320 ctrl = addr + MBOX_LEN;
1321
1322 if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1323 return -EBUSY;
1324
1325 for (i = 0; i < 8; i++)
1326 writeq(data[i], addr + 8 * i);
1327
1328 writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1329 return count;
1330 }
1331
1332 static const struct file_operations mbox_debugfs_fops = {
1333 .owner = THIS_MODULE,
1334 .open = mbox_open,
1335 .read = seq_read,
1336 .llseek = seq_lseek,
1337 .release = single_release,
1338 .write = mbox_write
1339 };
1340
1341 static int mps_trc_show(struct seq_file *seq, void *v)
1342 {
1343 int enabled, i;
1344 struct trace_params tp;
1345 unsigned int trcidx = (uintptr_t)seq->private & 3;
1346 struct adapter *adap = seq->private - trcidx;
1347
1348 t4_get_trace_filter(adap, &tp, trcidx, &enabled);
1349 if (!enabled) {
1350 seq_puts(seq, "tracer is disabled\n");
1351 return 0;
1352 }
1353
1354 if (tp.skip_ofst * 8 >= TRACE_LEN) {
1355 dev_err(adap->pdev_dev, "illegal trace pattern skip offset\n");
1356 return -EINVAL;
1357 }
1358 if (tp.port < 8) {
1359 i = adap->chan_map[tp.port & 3];
1360 if (i >= MAX_NPORTS) {
1361 dev_err(adap->pdev_dev, "tracer %u is assigned "
1362 "to non-existing port\n", trcidx);
1363 return -EINVAL;
1364 }
1365 seq_printf(seq, "tracer is capturing %s %s, ",
1366 adap->port[i]->name, tp.port < 4 ? "Rx" : "Tx");
1367 } else
1368 seq_printf(seq, "tracer is capturing loopback %d, ",
1369 tp.port - 8);
1370 seq_printf(seq, "snap length: %u, min length: %u\n", tp.snap_len,
1371 tp.min_len);
1372 seq_printf(seq, "packets captured %smatch filter\n",
1373 tp.invert ? "do not " : "");
1374
1375 if (tp.skip_ofst) {
1376 seq_puts(seq, "filter pattern: ");
1377 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1378 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1379 seq_putc(seq, '/');
1380 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1381 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1382 seq_puts(seq, "@0\n");
1383 }
1384
1385 seq_puts(seq, "filter pattern: ");
1386 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1387 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1388 seq_putc(seq, '/');
1389 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1390 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1391 seq_printf(seq, "@%u\n", (tp.skip_ofst + tp.skip_len) * 8);
1392 return 0;
1393 }
1394
1395 static int mps_trc_open(struct inode *inode, struct file *file)
1396 {
1397 return single_open(file, mps_trc_show, inode->i_private);
1398 }
1399
1400 static unsigned int xdigit2int(unsigned char c)
1401 {
1402 return isdigit(c) ? c - '0' : tolower(c) - 'a' + 10;
1403 }
1404
1405 #define TRC_PORT_NONE 0xff
1406 #define TRC_RSS_ENABLE 0x33
1407 #define TRC_RSS_DISABLE 0x13
1408
1409 /* Set an MPS trace filter. Syntax is:
1410 *
1411 * disable
1412 *
1413 * to disable tracing, or
1414 *
1415 * interface qid=<qid no> [snaplen=<val>] [minlen=<val>] [not] [<pattern>]...
1416 *
1417 * where interface is one of rxN, txN, or loopbackN, N = 0..3, qid can be one
1418 * of the NIC's response qid obtained from sge_qinfo and pattern has the form
1419 *
1420 * <pattern data>[/<pattern mask>][@<anchor>]
1421 *
1422 * Up to 2 filter patterns can be specified. If 2 are supplied the first one
1423 * must be anchored at 0. An omitted mask is taken as a mask of 1s, an omitted
1424 * anchor is taken as 0.
1425 */
1426 static ssize_t mps_trc_write(struct file *file, const char __user *buf,
1427 size_t count, loff_t *pos)
1428 {
1429 int i, enable, ret;
1430 u32 *data, *mask;
1431 struct trace_params tp;
1432 const struct inode *ino;
1433 unsigned int trcidx;
1434 char *s, *p, *word, *end;
1435 struct adapter *adap;
1436 u32 j;
1437
1438 ino = file_inode(file);
1439 trcidx = (uintptr_t)ino->i_private & 3;
1440 adap = ino->i_private - trcidx;
1441
1442 /* Don't accept input more than 1K, can't be anything valid except lots
1443 * of whitespace. Well, use less.
1444 */
1445 if (count > 1024)
1446 return -EFBIG;
1447 p = s = kzalloc(count + 1, GFP_USER);
1448 if (!s)
1449 return -ENOMEM;
1450 if (copy_from_user(s, buf, count)) {
1451 count = -EFAULT;
1452 goto out;
1453 }
1454
1455 if (s[count - 1] == '\n')
1456 s[count - 1] = '\0';
1457
1458 enable = strcmp("disable", s) != 0;
1459 if (!enable)
1460 goto apply;
1461
1462 /* enable or disable trace multi rss filter */
1463 if (adap->trace_rss)
1464 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE);
1465 else
1466 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE);
1467
1468 memset(&tp, 0, sizeof(tp));
1469 tp.port = TRC_PORT_NONE;
1470 i = 0; /* counts pattern nibbles */
1471
1472 while (p) {
1473 while (isspace(*p))
1474 p++;
1475 word = strsep(&p, " ");
1476 if (!*word)
1477 break;
1478
1479 if (!strncmp(word, "qid=", 4)) {
1480 end = (char *)word + 4;
1481 ret = kstrtouint(end, 10, &j);
1482 if (ret)
1483 goto out;
1484 if (!adap->trace_rss) {
1485 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j);
1486 continue;
1487 }
1488
1489 switch (trcidx) {
1490 case 0:
1491 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j);
1492 break;
1493 case 1:
1494 t4_write_reg(adap,
1495 MPS_TRC_FILTER1_RSS_CONTROL_A, j);
1496 break;
1497 case 2:
1498 t4_write_reg(adap,
1499 MPS_TRC_FILTER2_RSS_CONTROL_A, j);
1500 break;
1501 case 3:
1502 t4_write_reg(adap,
1503 MPS_TRC_FILTER3_RSS_CONTROL_A, j);
1504 break;
1505 }
1506 continue;
1507 }
1508 if (!strncmp(word, "snaplen=", 8)) {
1509 end = (char *)word + 8;
1510 ret = kstrtouint(end, 10, &j);
1511 if (ret || j > 9600) {
1512 inval: count = -EINVAL;
1513 goto out;
1514 }
1515 tp.snap_len = j;
1516 continue;
1517 }
1518 if (!strncmp(word, "minlen=", 7)) {
1519 end = (char *)word + 7;
1520 ret = kstrtouint(end, 10, &j);
1521 if (ret || j > TFMINPKTSIZE_M)
1522 goto inval;
1523 tp.min_len = j;
1524 continue;
1525 }
1526 if (!strcmp(word, "not")) {
1527 tp.invert = !tp.invert;
1528 continue;
1529 }
1530 if (!strncmp(word, "loopback", 8) && tp.port == TRC_PORT_NONE) {
1531 if (word[8] < '0' || word[8] > '3' || word[9])
1532 goto inval;
1533 tp.port = word[8] - '0' + 8;
1534 continue;
1535 }
1536 if (!strncmp(word, "tx", 2) && tp.port == TRC_PORT_NONE) {
1537 if (word[2] < '0' || word[2] > '3' || word[3])
1538 goto inval;
1539 tp.port = word[2] - '0' + 4;
1540 if (adap->chan_map[tp.port & 3] >= MAX_NPORTS)
1541 goto inval;
1542 continue;
1543 }
1544 if (!strncmp(word, "rx", 2) && tp.port == TRC_PORT_NONE) {
1545 if (word[2] < '0' || word[2] > '3' || word[3])
1546 goto inval;
1547 tp.port = word[2] - '0';
1548 if (adap->chan_map[tp.port] >= MAX_NPORTS)
1549 goto inval;
1550 continue;
1551 }
1552 if (!isxdigit(*word))
1553 goto inval;
1554
1555 /* we have found a trace pattern */
1556 if (i) { /* split pattern */
1557 if (tp.skip_len) /* too many splits */
1558 goto inval;
1559 tp.skip_ofst = i / 16;
1560 }
1561
1562 data = &tp.data[i / 8];
1563 mask = &tp.mask[i / 8];
1564 j = i;
1565
1566 while (isxdigit(*word)) {
1567 if (i >= TRACE_LEN * 2) {
1568 count = -EFBIG;
1569 goto out;
1570 }
1571 *data = (*data << 4) + xdigit2int(*word++);
1572 if (++i % 8 == 0)
1573 data++;
1574 }
1575 if (*word == '/') {
1576 word++;
1577 while (isxdigit(*word)) {
1578 if (j >= i) /* mask longer than data */
1579 goto inval;
1580 *mask = (*mask << 4) + xdigit2int(*word++);
1581 if (++j % 8 == 0)
1582 mask++;
1583 }
1584 if (i != j) /* mask shorter than data */
1585 goto inval;
1586 } else { /* no mask, use all 1s */
1587 for ( ; i - j >= 8; j += 8)
1588 *mask++ = 0xffffffff;
1589 if (i % 8)
1590 *mask = (1 << (i % 8) * 4) - 1;
1591 }
1592 if (*word == '@') {
1593 end = (char *)word + 1;
1594 ret = kstrtouint(end, 10, &j);
1595 if (*end && *end != '\n')
1596 goto inval;
1597 if (j & 7) /* doesn't start at multiple of 8 */
1598 goto inval;
1599 j /= 8;
1600 if (j < tp.skip_ofst) /* overlaps earlier pattern */
1601 goto inval;
1602 if (j - tp.skip_ofst > 31) /* skip too big */
1603 goto inval;
1604 tp.skip_len = j - tp.skip_ofst;
1605 }
1606 if (i % 8) {
1607 *data <<= (8 - i % 8) * 4;
1608 *mask <<= (8 - i % 8) * 4;
1609 i = (i + 15) & ~15; /* 8-byte align */
1610 }
1611 }
1612
1613 if (tp.port == TRC_PORT_NONE)
1614 goto inval;
1615
1616 apply:
1617 i = t4_set_trace_filter(adap, &tp, trcidx, enable);
1618 if (i)
1619 count = i;
1620 out:
1621 kfree(s);
1622 return count;
1623 }
1624
1625 static const struct file_operations mps_trc_debugfs_fops = {
1626 .owner = THIS_MODULE,
1627 .open = mps_trc_open,
1628 .read = seq_read,
1629 .llseek = seq_lseek,
1630 .release = single_release,
1631 .write = mps_trc_write
1632 };
1633
1634 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1635 loff_t *ppos)
1636 {
1637 loff_t pos = *ppos;
1638 loff_t avail = file_inode(file)->i_size;
1639 struct adapter *adap = file->private_data;
1640
1641 if (pos < 0)
1642 return -EINVAL;
1643 if (pos >= avail)
1644 return 0;
1645 if (count > avail - pos)
1646 count = avail - pos;
1647
1648 while (count) {
1649 size_t len;
1650 int ret, ofst;
1651 u8 data[256];
1652
1653 ofst = pos & 3;
1654 len = min(count + ofst, sizeof(data));
1655 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1656 (u32 *)data, 1);
1657 if (ret)
1658 return ret;
1659
1660 len -= ofst;
1661 if (copy_to_user(buf, data + ofst, len))
1662 return -EFAULT;
1663
1664 buf += len;
1665 pos += len;
1666 count -= len;
1667 }
1668 count = pos - *ppos;
1669 *ppos = pos;
1670 return count;
1671 }
1672
1673 static const struct file_operations flash_debugfs_fops = {
1674 .owner = THIS_MODULE,
1675 .open = mem_open,
1676 .read = flash_read,
1677 .llseek = default_llseek,
1678 };
1679
1680 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1681 {
1682 *mask = x | y;
1683 y = (__force u64)cpu_to_be64(y);
1684 memcpy(addr, (char *)&y + 2, ETH_ALEN);
1685 }
1686
1687 static int mps_tcam_show(struct seq_file *seq, void *v)
1688 {
1689 struct adapter *adap = seq->private;
1690 unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip);
1691 if (v == SEQ_START_TOKEN) {
1692 if (chip_ver > CHELSIO_T5) {
1693 seq_puts(seq, "Idx Ethernet address Mask "
1694 " VNI Mask IVLAN Vld "
1695 "DIP_Hit Lookup Port "
1696 "Vld Ports PF VF "
1697 "Replication "
1698 " P0 P1 P2 P3 ML\n");
1699 } else {
1700 if (adap->params.arch.mps_rplc_size > 128)
1701 seq_puts(seq, "Idx Ethernet address Mask "
1702 "Vld Ports PF VF "
1703 "Replication "
1704 " P0 P1 P2 P3 ML\n");
1705 else
1706 seq_puts(seq, "Idx Ethernet address Mask "
1707 "Vld Ports PF VF Replication"
1708 " P0 P1 P2 P3 ML\n");
1709 }
1710 } else {
1711 u64 mask;
1712 u8 addr[ETH_ALEN];
1713 bool replicate, dip_hit = false, vlan_vld = false;
1714 unsigned int idx = (uintptr_t)v - 2;
1715 u64 tcamy, tcamx, val;
1716 u32 cls_lo, cls_hi, ctl, data2, vnix = 0, vniy = 0;
1717 u32 rplc[8] = {0};
1718 u8 lookup_type = 0, port_num = 0;
1719 u16 ivlan = 0;
1720
1721 if (chip_ver > CHELSIO_T5) {
1722 /* CtlCmdType - 0: Read, 1: Write
1723 * CtlTcamSel - 0: TCAM0, 1: TCAM1
1724 * CtlXYBitSel- 0: Y bit, 1: X bit
1725 */
1726
1727 /* Read tcamy */
1728 ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1729 if (idx < 256)
1730 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0);
1731 else
1732 ctl |= CTLTCAMINDEX_V(idx - 256) |
1733 CTLTCAMSEL_V(1);
1734 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1735 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1736 tcamy = DMACH_G(val) << 32;
1737 tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1738 data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1739 lookup_type = DATALKPTYPE_G(data2);
1740 /* 0 - Outer header, 1 - Inner header
1741 * [71:48] bit locations are overloaded for
1742 * outer vs. inner lookup types.
1743 */
1744 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1745 /* Inner header VNI */
1746 vniy = (data2 & DATAVIDH2_F) |
1747 (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1748 dip_hit = data2 & DATADIPHIT_F;
1749 } else {
1750 vlan_vld = data2 & DATAVIDH2_F;
1751 ivlan = VIDL_G(val);
1752 }
1753 port_num = DATAPORTNUM_G(data2);
1754
1755 /* Read tcamx. Change the control param */
1756 vnix = 0;
1757 ctl |= CTLXYBITSEL_V(1);
1758 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1759 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1760 tcamx = DMACH_G(val) << 32;
1761 tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1762 data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1763 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1764 /* Inner header VNI mask */
1765 vnix = (data2 & DATAVIDH2_F) |
1766 (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1767 }
1768 } else {
1769 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1770 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1771 }
1772
1773 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1774 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
1775
1776 if (tcamx & tcamy) {
1777 seq_printf(seq, "%3u -\n", idx);
1778 goto out;
1779 }
1780
1781 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0;
1782 if (chip_ver > CHELSIO_T5)
1783 replicate = (cls_lo & T6_REPLICATE_F);
1784 else
1785 replicate = (cls_lo & REPLICATE_F);
1786
1787 if (replicate) {
1788 struct fw_ldst_cmd ldst_cmd;
1789 int ret;
1790 struct fw_ldst_mps_rplc mps_rplc;
1791 u32 ldst_addrspc;
1792
1793 memset(&ldst_cmd, 0, sizeof(ldst_cmd));
1794 ldst_addrspc =
1795 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS);
1796 ldst_cmd.op_to_addrspace =
1797 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1798 FW_CMD_REQUEST_F |
1799 FW_CMD_READ_F |
1800 ldst_addrspc);
1801 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
1802 ldst_cmd.u.mps.rplc.fid_idx =
1803 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
1804 FW_LDST_CMD_IDX_V(idx));
1805 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1806 sizeof(ldst_cmd), &ldst_cmd);
1807 if (ret)
1808 dev_warn(adap->pdev_dev, "Can't read MPS "
1809 "replication map for idx %d: %d\n",
1810 idx, -ret);
1811 else {
1812 mps_rplc = ldst_cmd.u.mps.rplc;
1813 rplc[0] = ntohl(mps_rplc.rplc31_0);
1814 rplc[1] = ntohl(mps_rplc.rplc63_32);
1815 rplc[2] = ntohl(mps_rplc.rplc95_64);
1816 rplc[3] = ntohl(mps_rplc.rplc127_96);
1817 if (adap->params.arch.mps_rplc_size > 128) {
1818 rplc[4] = ntohl(mps_rplc.rplc159_128);
1819 rplc[5] = ntohl(mps_rplc.rplc191_160);
1820 rplc[6] = ntohl(mps_rplc.rplc223_192);
1821 rplc[7] = ntohl(mps_rplc.rplc255_224);
1822 }
1823 }
1824 }
1825
1826 tcamxy2valmask(tcamx, tcamy, addr, &mask);
1827 if (chip_ver > CHELSIO_T5) {
1828 /* Inner header lookup */
1829 if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1830 seq_printf(seq,
1831 "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1832 "%012llx %06x %06x - - %3c"
1833 " 'I' %4x "
1834 "%3c %#x%4u%4d", idx, addr[0],
1835 addr[1], addr[2], addr[3],
1836 addr[4], addr[5],
1837 (unsigned long long)mask,
1838 vniy, (vnix | vniy),
1839 dip_hit ? 'Y' : 'N',
1840 port_num,
1841 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1842 PORTMAP_G(cls_hi),
1843 T6_PF_G(cls_lo),
1844 (cls_lo & T6_VF_VALID_F) ?
1845 T6_VF_G(cls_lo) : -1);
1846 } else {
1847 seq_printf(seq,
1848 "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1849 "%012llx - - ",
1850 idx, addr[0], addr[1], addr[2],
1851 addr[3], addr[4], addr[5],
1852 (unsigned long long)mask);
1853
1854 if (vlan_vld)
1855 seq_printf(seq, "%4u Y ", ivlan);
1856 else
1857 seq_puts(seq, " - N ");
1858
1859 seq_printf(seq,
1860 "- %3c %4x %3c %#x%4u%4d",
1861 lookup_type ? 'I' : 'O', port_num,
1862 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1863 PORTMAP_G(cls_hi),
1864 T6_PF_G(cls_lo),
1865 (cls_lo & T6_VF_VALID_F) ?
1866 T6_VF_G(cls_lo) : -1);
1867 }
1868 } else
1869 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1870 "%012llx%3c %#x%4u%4d",
1871 idx, addr[0], addr[1], addr[2], addr[3],
1872 addr[4], addr[5], (unsigned long long)mask,
1873 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N',
1874 PORTMAP_G(cls_hi),
1875 PF_G(cls_lo),
1876 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1877
1878 if (replicate) {
1879 if (adap->params.arch.mps_rplc_size > 128)
1880 seq_printf(seq, " %08x %08x %08x %08x "
1881 "%08x %08x %08x %08x",
1882 rplc[7], rplc[6], rplc[5], rplc[4],
1883 rplc[3], rplc[2], rplc[1], rplc[0]);
1884 else
1885 seq_printf(seq, " %08x %08x %08x %08x",
1886 rplc[3], rplc[2], rplc[1], rplc[0]);
1887 } else {
1888 if (adap->params.arch.mps_rplc_size > 128)
1889 seq_printf(seq, "%72c", ' ');
1890 else
1891 seq_printf(seq, "%36c", ' ');
1892 }
1893
1894 if (chip_ver > CHELSIO_T5)
1895 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1896 T6_SRAM_PRIO0_G(cls_lo),
1897 T6_SRAM_PRIO1_G(cls_lo),
1898 T6_SRAM_PRIO2_G(cls_lo),
1899 T6_SRAM_PRIO3_G(cls_lo),
1900 (cls_lo >> T6_MULTILISTEN0_S) & 0xf);
1901 else
1902 seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1903 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1904 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1905 (cls_lo >> MULTILISTEN0_S) & 0xf);
1906 }
1907 out: return 0;
1908 }
1909
1910 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1911 {
1912 struct adapter *adap = seq->private;
1913 int max_mac_addr = is_t4(adap->params.chip) ?
1914 NUM_MPS_CLS_SRAM_L_INSTANCES :
1915 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1916 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1917 }
1918
1919 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1920 {
1921 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1922 }
1923
1924 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1925 {
1926 ++*pos;
1927 return mps_tcam_get_idx(seq, *pos);
1928 }
1929
1930 static void mps_tcam_stop(struct seq_file *seq, void *v)
1931 {
1932 }
1933
1934 static const struct seq_operations mps_tcam_seq_ops = {
1935 .start = mps_tcam_start,
1936 .next = mps_tcam_next,
1937 .stop = mps_tcam_stop,
1938 .show = mps_tcam_show
1939 };
1940
1941 static int mps_tcam_open(struct inode *inode, struct file *file)
1942 {
1943 int res = seq_open(file, &mps_tcam_seq_ops);
1944
1945 if (!res) {
1946 struct seq_file *seq = file->private_data;
1947
1948 seq->private = inode->i_private;
1949 }
1950 return res;
1951 }
1952
1953 static const struct file_operations mps_tcam_debugfs_fops = {
1954 .owner = THIS_MODULE,
1955 .open = mps_tcam_open,
1956 .read = seq_read,
1957 .llseek = seq_lseek,
1958 .release = seq_release,
1959 };
1960
1961 /* Display various sensor information.
1962 */
1963 static int sensors_show(struct seq_file *seq, void *v)
1964 {
1965 struct adapter *adap = seq->private;
1966 u32 param[7], val[7];
1967 int ret;
1968
1969 /* Note that if the sensors haven't been initialized and turned on
1970 * we'll get values of 0, so treat those as "<unknown>" ...
1971 */
1972 param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1973 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1974 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1975 param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1976 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1977 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1978 ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
1979 param, val);
1980
1981 if (ret < 0 || val[0] == 0)
1982 seq_puts(seq, "Temperature: <unknown>\n");
1983 else
1984 seq_printf(seq, "Temperature: %dC\n", val[0]);
1985
1986 if (ret < 0 || val[1] == 0)
1987 seq_puts(seq, "Core VDD: <unknown>\n");
1988 else
1989 seq_printf(seq, "Core VDD: %dmV\n", val[1]);
1990
1991 return 0;
1992 }
1993
1994 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1995
1996 #if IS_ENABLED(CONFIG_IPV6)
1997 static int clip_tbl_open(struct inode *inode, struct file *file)
1998 {
1999 return single_open(file, clip_tbl_show, inode->i_private);
2000 }
2001
2002 static const struct file_operations clip_tbl_debugfs_fops = {
2003 .owner = THIS_MODULE,
2004 .open = clip_tbl_open,
2005 .read = seq_read,
2006 .llseek = seq_lseek,
2007 .release = single_release
2008 };
2009 #endif
2010
2011 /*RSS Table.
2012 */
2013
2014 static int rss_show(struct seq_file *seq, void *v, int idx)
2015 {
2016 u16 *entry = v;
2017
2018 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
2019 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
2020 entry[5], entry[6], entry[7]);
2021 return 0;
2022 }
2023
2024 static int rss_open(struct inode *inode, struct file *file)
2025 {
2026 struct adapter *adap = inode->i_private;
2027 int ret, nentries;
2028 struct seq_tab *p;
2029
2030 nentries = t4_chip_rss_size(adap);
2031 p = seq_open_tab(file, nentries / 8, 8 * sizeof(u16), 0, rss_show);
2032 if (!p)
2033 return -ENOMEM;
2034
2035 ret = t4_read_rss(adap, (u16 *)p->data);
2036 if (ret)
2037 seq_release_private(inode, file);
2038
2039 return ret;
2040 }
2041
2042 static const struct file_operations rss_debugfs_fops = {
2043 .owner = THIS_MODULE,
2044 .open = rss_open,
2045 .read = seq_read,
2046 .llseek = seq_lseek,
2047 .release = seq_release_private
2048 };
2049
2050 /* RSS Configuration.
2051 */
2052
2053 /* Small utility function to return the strings "yes" or "no" if the supplied
2054 * argument is non-zero.
2055 */
2056 static const char *yesno(int x)
2057 {
2058 static const char *yes = "yes";
2059 static const char *no = "no";
2060
2061 return x ? yes : no;
2062 }
2063
2064 static int rss_config_show(struct seq_file *seq, void *v)
2065 {
2066 struct adapter *adapter = seq->private;
2067 static const char * const keymode[] = {
2068 "global",
2069 "global and per-VF scramble",
2070 "per-PF and per-VF scramble",
2071 "per-VF and per-VF scramble",
2072 };
2073 u32 rssconf;
2074
2075 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
2076 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
2077 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
2078 TNL4TUPENIPV6_F));
2079 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
2080 TNL2TUPENIPV6_F));
2081 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
2082 TNL4TUPENIPV4_F));
2083 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
2084 TNL2TUPENIPV4_F));
2085 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
2086 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
2087 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
2088 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
2089 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
2090 OFDHASHSAVE_F));
2091 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
2092 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
2093 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
2094 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
2095 SYN4TUPENIPV6_F));
2096 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
2097 SYN2TUPENIPV6_F));
2098 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
2099 SYN4TUPENIPV4_F));
2100 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
2101 SYN2TUPENIPV4_F));
2102 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
2103 SYN4TUPENIPV6_F));
2104 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
2105 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
2106 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
2107 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
2108 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
2109 CHANNELENABLE_F));
2110 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
2111 PORTENABLE_F));
2112 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
2113 TNLALLLOOKUP_F));
2114 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
2115 VIRTENABLE_F));
2116 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
2117 CONGESTIONENABLE_F));
2118 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
2119 HASHTOEPLITZ_F));
2120 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
2121 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
2122
2123 seq_puts(seq, "\n");
2124
2125 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
2126 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
2127 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2128 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
2129 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2130 seq_printf(seq, " HashAll: %3s\n",
2131 yesno(rssconf & HASHALL_F));
2132 seq_printf(seq, " HashEth: %3s\n",
2133 yesno(rssconf & HASHETH_F));
2134 }
2135 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
2136
2137 seq_puts(seq, "\n");
2138
2139 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
2140 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
2141 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2142 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
2143 RRCPLMAPEN_F));
2144 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
2145
2146 seq_puts(seq, "\n");
2147
2148 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
2149 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
2150 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
2151 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
2152
2153 seq_puts(seq, "\n");
2154
2155 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
2156 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
2157 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2158 seq_printf(seq, " KeyWrAddrX: %3d\n",
2159 KEYWRADDRX_G(rssconf));
2160 seq_printf(seq, " KeyExtend: %3s\n",
2161 yesno(rssconf & KEYEXTEND_F));
2162 }
2163 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
2164 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
2165 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
2166 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
2167 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
2168 DISABLEVLAN_F));
2169 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
2170 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
2171 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
2172 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
2173 else
2174 seq_printf(seq, " VfWrAddr: %3d\n",
2175 T6_VFWRADDR_G(rssconf));
2176 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
2177 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
2178 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
2179 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
2180
2181 seq_puts(seq, "\n");
2182
2183 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
2184 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
2185 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
2186 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
2187 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
2188 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
2189 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
2190 CHNUNDFLOW3_F));
2191 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
2192 CHNUNDFLOW2_F));
2193 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
2194 CHNUNDFLOW1_F));
2195 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
2196 CHNUNDFLOW0_F));
2197 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
2198 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
2199 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
2200 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
2201 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
2202 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
2203 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
2204 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
2205 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
2206 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
2207 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
2208
2209 return 0;
2210 }
2211
2212 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
2213
2214 /* RSS Secret Key.
2215 */
2216
2217 static int rss_key_show(struct seq_file *seq, void *v)
2218 {
2219 u32 key[10];
2220
2221 t4_read_rss_key(seq->private, key, true);
2222 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
2223 key[9], key[8], key[7], key[6], key[5], key[4], key[3],
2224 key[2], key[1], key[0]);
2225 return 0;
2226 }
2227
2228 static int rss_key_open(struct inode *inode, struct file *file)
2229 {
2230 return single_open(file, rss_key_show, inode->i_private);
2231 }
2232
2233 static ssize_t rss_key_write(struct file *file, const char __user *buf,
2234 size_t count, loff_t *pos)
2235 {
2236 int i, j;
2237 u32 key[10];
2238 char s[100], *p;
2239 struct adapter *adap = file_inode(file)->i_private;
2240
2241 if (count > sizeof(s) - 1)
2242 return -EINVAL;
2243 if (copy_from_user(s, buf, count))
2244 return -EFAULT;
2245 for (i = count; i > 0 && isspace(s[i - 1]); i--)
2246 ;
2247 s[i] = '\0';
2248
2249 for (p = s, i = 9; i >= 0; i--) {
2250 key[i] = 0;
2251 for (j = 0; j < 8; j++, p++) {
2252 if (!isxdigit(*p))
2253 return -EINVAL;
2254 key[i] = (key[i] << 4) | hex2val(*p);
2255 }
2256 }
2257
2258 t4_write_rss_key(adap, key, -1, true);
2259 return count;
2260 }
2261
2262 static const struct file_operations rss_key_debugfs_fops = {
2263 .owner = THIS_MODULE,
2264 .open = rss_key_open,
2265 .read = seq_read,
2266 .llseek = seq_lseek,
2267 .release = single_release,
2268 .write = rss_key_write
2269 };
2270
2271 /* PF RSS Configuration.
2272 */
2273
2274 struct rss_pf_conf {
2275 u32 rss_pf_map;
2276 u32 rss_pf_mask;
2277 u32 rss_pf_config;
2278 };
2279
2280 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
2281 {
2282 struct rss_pf_conf *pfconf;
2283
2284 if (v == SEQ_START_TOKEN) {
2285 /* use the 0th entry to dump the PF Map Index Size */
2286 pfconf = seq->private + offsetof(struct seq_tab, data);
2287 seq_printf(seq, "PF Map Index Size = %d\n\n",
2288 LKPIDXSIZE_G(pfconf->rss_pf_map));
2289
2290 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
2291 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
2292 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
2293 } else {
2294 #define G_PFnLKPIDX(map, n) \
2295 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
2296 #define G_PFnMSKSIZE(mask, n) \
2297 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
2298
2299 pfconf = v;
2300 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
2301 idx,
2302 yesno(pfconf->rss_pf_config & MAPENABLE_F),
2303 yesno(pfconf->rss_pf_config & CHNENABLE_F),
2304 yesno(pfconf->rss_pf_config & PRTENABLE_F),
2305 G_PFnLKPIDX(pfconf->rss_pf_map, idx),
2306 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
2307 IVFWIDTH_G(pfconf->rss_pf_config),
2308 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
2309 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
2310 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
2311 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
2312 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
2313 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
2314 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
2315
2316 #undef G_PFnLKPIDX
2317 #undef G_PFnMSKSIZE
2318 }
2319 return 0;
2320 }
2321
2322 static int rss_pf_config_open(struct inode *inode, struct file *file)
2323 {
2324 struct adapter *adapter = inode->i_private;
2325 struct seq_tab *p;
2326 u32 rss_pf_map, rss_pf_mask;
2327 struct rss_pf_conf *pfconf;
2328 int pf;
2329
2330 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
2331 if (!p)
2332 return -ENOMEM;
2333
2334 pfconf = (struct rss_pf_conf *)p->data;
2335 rss_pf_map = t4_read_rss_pf_map(adapter, true);
2336 rss_pf_mask = t4_read_rss_pf_mask(adapter, true);
2337 for (pf = 0; pf < 8; pf++) {
2338 pfconf[pf].rss_pf_map = rss_pf_map;
2339 pfconf[pf].rss_pf_mask = rss_pf_mask;
2340 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config,
2341 true);
2342 }
2343 return 0;
2344 }
2345
2346 static const struct file_operations rss_pf_config_debugfs_fops = {
2347 .owner = THIS_MODULE,
2348 .open = rss_pf_config_open,
2349 .read = seq_read,
2350 .llseek = seq_lseek,
2351 .release = seq_release_private
2352 };
2353
2354 /* VF RSS Configuration.
2355 */
2356
2357 struct rss_vf_conf {
2358 u32 rss_vf_vfl;
2359 u32 rss_vf_vfh;
2360 };
2361
2362 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
2363 {
2364 if (v == SEQ_START_TOKEN) {
2365 seq_puts(seq, " RSS Hash Tuple Enable\n");
2366 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
2367 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
2368 } else {
2369 struct rss_vf_conf *vfconf = v;
2370
2371 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
2372 idx,
2373 yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
2374 yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
2375 VFLKPIDX_G(vfconf->rss_vf_vfh),
2376 yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
2377 yesno(vfconf->rss_vf_vfh & VFUPEN_F),
2378 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2379 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
2380 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2381 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
2382 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
2383 DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
2384 KEYINDEX_G(vfconf->rss_vf_vfh),
2385 vfconf->rss_vf_vfl);
2386 }
2387 return 0;
2388 }
2389
2390 static int rss_vf_config_open(struct inode *inode, struct file *file)
2391 {
2392 struct adapter *adapter = inode->i_private;
2393 struct seq_tab *p;
2394 struct rss_vf_conf *vfconf;
2395 int vf, vfcount = adapter->params.arch.vfcount;
2396
2397 p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show);
2398 if (!p)
2399 return -ENOMEM;
2400
2401 vfconf = (struct rss_vf_conf *)p->data;
2402 for (vf = 0; vf < vfcount; vf++) {
2403 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
2404 &vfconf[vf].rss_vf_vfh, true);
2405 }
2406 return 0;
2407 }
2408
2409 static const struct file_operations rss_vf_config_debugfs_fops = {
2410 .owner = THIS_MODULE,
2411 .open = rss_vf_config_open,
2412 .read = seq_read,
2413 .llseek = seq_lseek,
2414 .release = seq_release_private
2415 };
2416
2417 /**
2418 * ethqset2pinfo - return port_info of an Ethernet Queue Set
2419 * @adap: the adapter
2420 * @qset: Ethernet Queue Set
2421 */
2422 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
2423 {
2424 int pidx;
2425
2426 for_each_port(adap, pidx) {
2427 struct port_info *pi = adap2pinfo(adap, pidx);
2428
2429 if (qset >= pi->first_qset &&
2430 qset < pi->first_qset + pi->nqsets)
2431 return pi;
2432 }
2433
2434 /* should never happen! */
2435 BUG_ON(1);
2436 return NULL;
2437 }
2438
2439 static int sge_qinfo_show(struct seq_file *seq, void *v)
2440 {
2441 struct adapter *adap = seq->private;
2442 int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
2443 int ofld_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
2444 int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
2445 int i, r = (uintptr_t)v - 1;
2446 int ofld_idx = r - eth_entries;
2447 int ctrl_idx = ofld_idx - ofld_entries;
2448 int fq_idx = ctrl_idx - ctrl_entries;
2449
2450 if (r)
2451 seq_putc(seq, '\n');
2452
2453 #define S3(fmt_spec, s, v) \
2454 do { \
2455 seq_printf(seq, "%-12s", s); \
2456 for (i = 0; i < n; ++i) \
2457 seq_printf(seq, " %16" fmt_spec, v); \
2458 seq_putc(seq, '\n'); \
2459 } while (0)
2460 #define S(s, v) S3("s", s, v)
2461 #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v)
2462 #define T(s, v) S3("u", s, tx[i].v)
2463 #define TL(s, v) T3("lu", s, v)
2464 #define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v)
2465 #define R(s, v) S3("u", s, rx[i].v)
2466 #define RL(s, v) R3("lu", s, v)
2467
2468 if (r < eth_entries) {
2469 int base_qset = r * 4;
2470 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
2471 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
2472 int n = min(4, adap->sge.ethqsets - 4 * r);
2473
2474 S("QType:", "Ethernet");
2475 S("Interface:",
2476 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2477 T("TxQ ID:", q.cntxt_id);
2478 T("TxQ size:", q.size);
2479 T("TxQ inuse:", q.in_use);
2480 T("TxQ CIDX:", q.cidx);
2481 T("TxQ PIDX:", q.pidx);
2482 #ifdef CONFIG_CHELSIO_T4_DCB
2483 T("DCB Prio:", dcb_prio);
2484 S3("u", "DCB PGID:",
2485 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
2486 4*(7-tx[i].dcb_prio)) & 0xf);
2487 S3("u", "DCB PFC:",
2488 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
2489 1*(7-tx[i].dcb_prio)) & 0x1);
2490 #endif
2491 R("RspQ ID:", rspq.abs_id);
2492 R("RspQ size:", rspq.size);
2493 R("RspQE size:", rspq.iqe_len);
2494 R("RspQ CIDX:", rspq.cidx);
2495 R("RspQ Gen:", rspq.gen);
2496 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2497 S3("u", "Intr pktcnt:",
2498 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2499 R("FL ID:", fl.cntxt_id);
2500 R("FL size:", fl.size - 8);
2501 R("FL pend:", fl.pend_cred);
2502 R("FL avail:", fl.avail);
2503 R("FL PIDX:", fl.pidx);
2504 R("FL CIDX:", fl.cidx);
2505 RL("RxPackets:", stats.pkts);
2506 RL("RxCSO:", stats.rx_cso);
2507 RL("VLANxtract:", stats.vlan_ex);
2508 RL("LROmerged:", stats.lro_merged);
2509 RL("LROpackets:", stats.lro_pkts);
2510 RL("RxDrops:", stats.rx_drops);
2511 TL("TSO:", tso);
2512 TL("TxCSO:", tx_cso);
2513 TL("VLANins:", vlan_ins);
2514 TL("TxQFull:", q.stops);
2515 TL("TxQRestarts:", q.restarts);
2516 TL("TxMapErr:", mapping_err);
2517 RL("FLAllocErr:", fl.alloc_failed);
2518 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2519 RL("FLMapErr:", fl.mapping_err);
2520 RL("FLLow:", fl.low);
2521 RL("FLStarving:", fl.starving);
2522
2523 } else if (ctrl_idx < ctrl_entries) {
2524 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
2525 int n = min(4, adap->params.nports - 4 * ctrl_idx);
2526
2527 S("QType:", "Control");
2528 T("TxQ ID:", q.cntxt_id);
2529 T("TxQ size:", q.size);
2530 T("TxQ inuse:", q.in_use);
2531 T("TxQ CIDX:", q.cidx);
2532 T("TxQ PIDX:", q.pidx);
2533 TL("TxQFull:", q.stops);
2534 TL("TxQRestarts:", q.restarts);
2535 } else if (fq_idx == 0) {
2536 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
2537
2538 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
2539 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
2540 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
2541 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
2542 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
2543 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
2544 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
2545 qtimer_val(adap, evtq));
2546 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
2547 adap->sge.counter_val[evtq->pktcnt_idx]);
2548 }
2549 #undef R
2550 #undef RL
2551 #undef T
2552 #undef TL
2553 #undef S
2554 #undef R3
2555 #undef T3
2556 #undef S3
2557 return 0;
2558 }
2559
2560 static int sge_queue_entries(const struct adapter *adap)
2561 {
2562 return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
2563 DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
2564 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
2565 }
2566
2567 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
2568 {
2569 int entries = sge_queue_entries(seq->private);
2570
2571 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2572 }
2573
2574 static void sge_queue_stop(struct seq_file *seq, void *v)
2575 {
2576 }
2577
2578 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
2579 {
2580 int entries = sge_queue_entries(seq->private);
2581
2582 ++*pos;
2583 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2584 }
2585
2586 static const struct seq_operations sge_qinfo_seq_ops = {
2587 .start = sge_queue_start,
2588 .next = sge_queue_next,
2589 .stop = sge_queue_stop,
2590 .show = sge_qinfo_show
2591 };
2592
2593 static int sge_qinfo_open(struct inode *inode, struct file *file)
2594 {
2595 int res = seq_open(file, &sge_qinfo_seq_ops);
2596
2597 if (!res) {
2598 struct seq_file *seq = file->private_data;
2599
2600 seq->private = inode->i_private;
2601 }
2602 return res;
2603 }
2604
2605 static const struct file_operations sge_qinfo_debugfs_fops = {
2606 .owner = THIS_MODULE,
2607 .open = sge_qinfo_open,
2608 .read = seq_read,
2609 .llseek = seq_lseek,
2610 .release = seq_release,
2611 };
2612
2613 int mem_open(struct inode *inode, struct file *file)
2614 {
2615 unsigned int mem;
2616 struct adapter *adap;
2617
2618 file->private_data = inode->i_private;
2619
2620 mem = (uintptr_t)file->private_data & 0x7;
2621 adap = file->private_data - mem;
2622
2623 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
2624
2625 return 0;
2626 }
2627
2628 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
2629 loff_t *ppos)
2630 {
2631 loff_t pos = *ppos;
2632 loff_t avail = file_inode(file)->i_size;
2633 unsigned int mem = (uintptr_t)file->private_data & 0x7;
2634 struct adapter *adap = file->private_data - mem;
2635 __be32 *data;
2636 int ret;
2637
2638 if (pos < 0)
2639 return -EINVAL;
2640 if (pos >= avail)
2641 return 0;
2642 if (count > avail - pos)
2643 count = avail - pos;
2644
2645 data = kvzalloc(count, GFP_KERNEL);
2646 if (!data)
2647 return -ENOMEM;
2648
2649 spin_lock(&adap->win0_lock);
2650 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
2651 spin_unlock(&adap->win0_lock);
2652 if (ret) {
2653 kvfree(data);
2654 return ret;
2655 }
2656 ret = copy_to_user(buf, data, count);
2657
2658 kvfree(data);
2659 if (ret)
2660 return -EFAULT;
2661
2662 *ppos = pos + count;
2663 return count;
2664 }
2665 static const struct file_operations mem_debugfs_fops = {
2666 .owner = THIS_MODULE,
2667 .open = simple_open,
2668 .read = mem_read,
2669 .llseek = default_llseek,
2670 };
2671
2672 static int tid_info_show(struct seq_file *seq, void *v)
2673 {
2674 unsigned int tid_start = 0;
2675 struct adapter *adap = seq->private;
2676 const struct tid_info *t = &adap->tids;
2677 enum chip_type chip = CHELSIO_CHIP_VERSION(adap->params.chip);
2678
2679 if (chip > CHELSIO_T5)
2680 tid_start = t4_read_reg(adap, LE_DB_ACTIVE_TABLE_START_INDEX_A);
2681
2682 if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2683 unsigned int sb;
2684 seq_printf(seq, "Connections in use: %u\n",
2685 atomic_read(&t->conns_in_use));
2686
2687 if (chip <= CHELSIO_T5)
2688 sb = t4_read_reg(adap, LE_DB_SERVER_INDEX_A) / 4;
2689 else
2690 sb = t4_read_reg(adap, LE_DB_SRVR_START_INDEX_A);
2691
2692 if (sb) {
2693 seq_printf(seq, "TID range: %u..%u/%u..%u", tid_start,
2694 sb - 1, adap->tids.hash_base,
2695 t->ntids - 1);
2696 seq_printf(seq, ", in use: %u/%u\n",
2697 atomic_read(&t->tids_in_use),
2698 atomic_read(&t->hash_tids_in_use));
2699 } else if (adap->flags & FW_OFLD_CONN) {
2700 seq_printf(seq, "TID range: %u..%u/%u..%u",
2701 t->aftid_base,
2702 t->aftid_end,
2703 adap->tids.hash_base,
2704 t->ntids - 1);
2705 seq_printf(seq, ", in use: %u/%u\n",
2706 atomic_read(&t->tids_in_use),
2707 atomic_read(&t->hash_tids_in_use));
2708 } else {
2709 seq_printf(seq, "TID range: %u..%u",
2710 adap->tids.hash_base,
2711 t->ntids - 1);
2712 seq_printf(seq, ", in use: %u\n",
2713 atomic_read(&t->hash_tids_in_use));
2714 }
2715 } else if (t->ntids) {
2716 seq_printf(seq, "Connections in use: %u\n",
2717 atomic_read(&t->conns_in_use));
2718
2719 seq_printf(seq, "TID range: %u..%u", tid_start,
2720 tid_start + t->ntids - 1);
2721 seq_printf(seq, ", in use: %u\n",
2722 atomic_read(&t->tids_in_use));
2723 }
2724
2725 if (t->nstids)
2726 seq_printf(seq, "STID range: %u..%u, in use-IPv4/IPv6: %u/%u\n",
2727 (!t->stid_base &&
2728 (chip <= CHELSIO_T5)) ?
2729 t->stid_base + 1 : t->stid_base,
2730 t->stid_base + t->nstids - 1,
2731 t->stids_in_use - t->v6_stids_in_use,
2732 t->v6_stids_in_use);
2733
2734 if (t->natids)
2735 seq_printf(seq, "ATID range: 0..%u, in use: %u\n",
2736 t->natids - 1, t->atids_in_use);
2737 seq_printf(seq, "FTID range: %u..%u\n", t->ftid_base,
2738 t->ftid_base + t->nftids - 1);
2739 if (t->nsftids)
2740 seq_printf(seq, "SFTID range: %u..%u in use: %u\n",
2741 t->sftid_base, t->sftid_base + t->nsftids - 2,
2742 t->sftids_in_use);
2743 if (t->ntids)
2744 seq_printf(seq, "HW TID usage: %u IP users, %u IPv6 users\n",
2745 t4_read_reg(adap, LE_DB_ACT_CNT_IPV4_A),
2746 t4_read_reg(adap, LE_DB_ACT_CNT_IPV6_A));
2747 return 0;
2748 }
2749
2750 DEFINE_SIMPLE_DEBUGFS_FILE(tid_info);
2751
2752 static void add_debugfs_mem(struct adapter *adap, const char *name,
2753 unsigned int idx, unsigned int size_mb)
2754 {
2755 debugfs_create_file_size(name, 0400, adap->debugfs_root,
2756 (void *)adap + idx, &mem_debugfs_fops,
2757 size_mb << 20);
2758 }
2759
2760 static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf,
2761 size_t count, loff_t *ppos)
2762 {
2763 int len;
2764 const struct adapter *adap = filp->private_data;
2765 char *buf;
2766 ssize_t size = (adap->sge.egr_sz + 3) / 4 +
2767 adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */
2768
2769 buf = kzalloc(size, GFP_KERNEL);
2770 if (!buf)
2771 return -ENOMEM;
2772
2773 len = snprintf(buf, size - 1, "%*pb\n",
2774 adap->sge.egr_sz, adap->sge.blocked_fl);
2775 len += sprintf(buf + len, "\n");
2776 size = simple_read_from_buffer(ubuf, count, ppos, buf, len);
2777 kvfree(buf);
2778 return size;
2779 }
2780
2781 static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf,
2782 size_t count, loff_t *ppos)
2783 {
2784 int err;
2785 unsigned long *t;
2786 struct adapter *adap = filp->private_data;
2787
2788 t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL);
2789 if (!t)
2790 return -ENOMEM;
2791
2792 err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz);
2793 if (err)
2794 return err;
2795
2796 bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz);
2797 kvfree(t);
2798 return count;
2799 }
2800
2801 static const struct file_operations blocked_fl_fops = {
2802 .owner = THIS_MODULE,
2803 .open = simple_open,
2804 .read = blocked_fl_read,
2805 .write = blocked_fl_write,
2806 .llseek = generic_file_llseek,
2807 };
2808
2809 static void mem_region_show(struct seq_file *seq, const char *name,
2810 unsigned int from, unsigned int to)
2811 {
2812 char buf[40];
2813
2814 string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf,
2815 sizeof(buf));
2816 seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf);
2817 }
2818
2819 static int meminfo_show(struct seq_file *seq, void *v)
2820 {
2821 static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
2822 "MC0:", "MC1:", "HMA:"};
2823 struct adapter *adap = seq->private;
2824 struct cudbg_meminfo meminfo;
2825 int i, rc;
2826
2827 memset(&meminfo, 0, sizeof(struct cudbg_meminfo));
2828 rc = cudbg_fill_meminfo(adap, &meminfo);
2829 if (rc)
2830 return -ENXIO;
2831
2832 for (i = 0; i < meminfo.avail_c; i++)
2833 mem_region_show(seq, memory[meminfo.avail[i].idx],
2834 meminfo.avail[i].base,
2835 meminfo.avail[i].limit - 1);
2836
2837 seq_putc(seq, '\n');
2838 for (i = 0; i < meminfo.mem_c; i++) {
2839 if (meminfo.mem[i].idx >= ARRAY_SIZE(cudbg_region))
2840 continue; /* skip holes */
2841 if (!meminfo.mem[i].limit)
2842 meminfo.mem[i].limit =
2843 i < meminfo.mem_c - 1 ?
2844 meminfo.mem[i + 1].base - 1 : ~0;
2845 mem_region_show(seq, cudbg_region[meminfo.mem[i].idx],
2846 meminfo.mem[i].base, meminfo.mem[i].limit);
2847 }
2848
2849 seq_putc(seq, '\n');
2850 mem_region_show(seq, "uP RAM:", meminfo.up_ram_lo, meminfo.up_ram_hi);
2851 mem_region_show(seq, "uP Extmem2:", meminfo.up_extmem2_lo,
2852 meminfo.up_extmem2_hi);
2853
2854 seq_printf(seq, "\n%u Rx pages of size %uKiB for %u channels\n",
2855 meminfo.rx_pages_data[0], meminfo.rx_pages_data[1],
2856 meminfo.rx_pages_data[2]);
2857
2858 seq_printf(seq, "%u Tx pages of size %u%ciB for %u channels\n",
2859 meminfo.tx_pages_data[0], meminfo.tx_pages_data[1],
2860 meminfo.tx_pages_data[2], meminfo.tx_pages_data[3]);
2861
2862 seq_printf(seq, "%u p-structs\n\n", meminfo.p_structs);
2863
2864 for (i = 0; i < 4; i++)
2865 /* For T6 these are MAC buffer groups */
2866 seq_printf(seq, "Port %d using %u pages out of %u allocated\n",
2867 i, meminfo.port_used[i], meminfo.port_alloc[i]);
2868
2869 for (i = 0; i < adap->params.arch.nchan; i++)
2870 /* For T6 these are MAC buffer groups */
2871 seq_printf(seq,
2872 "Loopback %d using %u pages out of %u allocated\n",
2873 i, meminfo.loopback_used[i],
2874 meminfo.loopback_alloc[i]);
2875
2876 return 0;
2877 }
2878
2879 static int meminfo_open(struct inode *inode, struct file *file)
2880 {
2881 return single_open(file, meminfo_show, inode->i_private);
2882 }
2883
2884 static const struct file_operations meminfo_fops = {
2885 .owner = THIS_MODULE,
2886 .open = meminfo_open,
2887 .read = seq_read,
2888 .llseek = seq_lseek,
2889 .release = single_release,
2890 };
2891
2892 static int chcr_show(struct seq_file *seq, void *v)
2893 {
2894 struct adapter *adap = seq->private;
2895
2896 seq_puts(seq, "Chelsio Crypto Accelerator Stats \n");
2897 seq_printf(seq, "Cipher Ops: %10u \n",
2898 atomic_read(&adap->chcr_stats.cipher_rqst));
2899 seq_printf(seq, "Digest Ops: %10u \n",
2900 atomic_read(&adap->chcr_stats.digest_rqst));
2901 seq_printf(seq, "Aead Ops: %10u \n",
2902 atomic_read(&adap->chcr_stats.aead_rqst));
2903 seq_printf(seq, "Completion: %10u \n",
2904 atomic_read(&adap->chcr_stats.complete));
2905 seq_printf(seq, "Error: %10u \n",
2906 atomic_read(&adap->chcr_stats.error));
2907 seq_printf(seq, "Fallback: %10u \n",
2908 atomic_read(&adap->chcr_stats.fallback));
2909 seq_printf(seq, "IPSec PDU: %10u\n",
2910 atomic_read(&adap->chcr_stats.ipsec_cnt));
2911 return 0;
2912 }
2913
2914
2915 static int chcr_stats_open(struct inode *inode, struct file *file)
2916 {
2917 return single_open(file, chcr_show, inode->i_private);
2918 }
2919
2920 static const struct file_operations chcr_stats_debugfs_fops = {
2921 .owner = THIS_MODULE,
2922 .open = chcr_stats_open,
2923 .read = seq_read,
2924 .llseek = seq_lseek,
2925 .release = single_release,
2926 };
2927 /* Add an array of Debug FS files.
2928 */
2929 void add_debugfs_files(struct adapter *adap,
2930 struct t4_debugfs_entry *files,
2931 unsigned int nfiles)
2932 {
2933 int i;
2934
2935 /* debugfs support is best effort */
2936 for (i = 0; i < nfiles; i++)
2937 debugfs_create_file(files[i].name, files[i].mode,
2938 adap->debugfs_root,
2939 (void *)adap + files[i].data,
2940 files[i].ops);
2941 }
2942
2943 int t4_setup_debugfs(struct adapter *adap)
2944 {
2945 int i;
2946 u32 size = 0;
2947 struct dentry *de;
2948
2949 static struct t4_debugfs_entry t4_debugfs_files[] = {
2950 { "cim_la", &cim_la_fops, 0400, 0 },
2951 { "cim_pif_la", &cim_pif_la_fops, 0400, 0 },
2952 { "cim_ma_la", &cim_ma_la_fops, 0400, 0 },
2953 { "cim_qcfg", &cim_qcfg_fops, 0400, 0 },
2954 { "clk", &clk_debugfs_fops, 0400, 0 },
2955 { "devlog", &devlog_fops, 0400, 0 },
2956 { "mboxlog", &mboxlog_fops, 0400, 0 },
2957 { "mbox0", &mbox_debugfs_fops, 0600, 0 },
2958 { "mbox1", &mbox_debugfs_fops, 0600, 1 },
2959 { "mbox2", &mbox_debugfs_fops, 0600, 2 },
2960 { "mbox3", &mbox_debugfs_fops, 0600, 3 },
2961 { "mbox4", &mbox_debugfs_fops, 0600, 4 },
2962 { "mbox5", &mbox_debugfs_fops, 0600, 5 },
2963 { "mbox6", &mbox_debugfs_fops, 0600, 6 },
2964 { "mbox7", &mbox_debugfs_fops, 0600, 7 },
2965 { "trace0", &mps_trc_debugfs_fops, 0600, 0 },
2966 { "trace1", &mps_trc_debugfs_fops, 0600, 1 },
2967 { "trace2", &mps_trc_debugfs_fops, 0600, 2 },
2968 { "trace3", &mps_trc_debugfs_fops, 0600, 3 },
2969 { "l2t", &t4_l2t_fops, 0400, 0},
2970 { "mps_tcam", &mps_tcam_debugfs_fops, 0400, 0 },
2971 { "rss", &rss_debugfs_fops, 0400, 0 },
2972 { "rss_config", &rss_config_debugfs_fops, 0400, 0 },
2973 { "rss_key", &rss_key_debugfs_fops, 0400, 0 },
2974 { "rss_pf_config", &rss_pf_config_debugfs_fops, 0400, 0 },
2975 { "rss_vf_config", &rss_vf_config_debugfs_fops, 0400, 0 },
2976 { "sge_qinfo", &sge_qinfo_debugfs_fops, 0400, 0 },
2977 { "ibq_tp0", &cim_ibq_fops, 0400, 0 },
2978 { "ibq_tp1", &cim_ibq_fops, 0400, 1 },
2979 { "ibq_ulp", &cim_ibq_fops, 0400, 2 },
2980 { "ibq_sge0", &cim_ibq_fops, 0400, 3 },
2981 { "ibq_sge1", &cim_ibq_fops, 0400, 4 },
2982 { "ibq_ncsi", &cim_ibq_fops, 0400, 5 },
2983 { "obq_ulp0", &cim_obq_fops, 0400, 0 },
2984 { "obq_ulp1", &cim_obq_fops, 0400, 1 },
2985 { "obq_ulp2", &cim_obq_fops, 0400, 2 },
2986 { "obq_ulp3", &cim_obq_fops, 0400, 3 },
2987 { "obq_sge", &cim_obq_fops, 0400, 4 },
2988 { "obq_ncsi", &cim_obq_fops, 0400, 5 },
2989 { "tp_la", &tp_la_fops, 0400, 0 },
2990 { "ulprx_la", &ulprx_la_fops, 0400, 0 },
2991 { "sensors", &sensors_debugfs_fops, 0400, 0 },
2992 { "pm_stats", &pm_stats_debugfs_fops, 0400, 0 },
2993 { "tx_rate", &tx_rate_debugfs_fops, 0400, 0 },
2994 { "cctrl", &cctrl_tbl_debugfs_fops, 0400, 0 },
2995 #if IS_ENABLED(CONFIG_IPV6)
2996 { "clip_tbl", &clip_tbl_debugfs_fops, 0400, 0 },
2997 #endif
2998 { "tids", &tid_info_debugfs_fops, 0400, 0},
2999 { "blocked_fl", &blocked_fl_fops, 0600, 0 },
3000 { "meminfo", &meminfo_fops, 0400, 0 },
3001 { "crypto", &chcr_stats_debugfs_fops, 0400, 0 },
3002 };
3003
3004 /* Debug FS nodes common to all T5 and later adapters.
3005 */
3006 static struct t4_debugfs_entry t5_debugfs_files[] = {
3007 { "obq_sge_rx_q0", &cim_obq_fops, 0400, 6 },
3008 { "obq_sge_rx_q1", &cim_obq_fops, 0400, 7 },
3009 };
3010
3011 add_debugfs_files(adap,
3012 t4_debugfs_files,
3013 ARRAY_SIZE(t4_debugfs_files));
3014 if (!is_t4(adap->params.chip))
3015 add_debugfs_files(adap,
3016 t5_debugfs_files,
3017 ARRAY_SIZE(t5_debugfs_files));
3018
3019 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
3020 if (i & EDRAM0_ENABLE_F) {
3021 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
3022 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
3023 }
3024 if (i & EDRAM1_ENABLE_F) {
3025 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
3026 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
3027 }
3028 if (is_t5(adap->params.chip)) {
3029 if (i & EXT_MEM0_ENABLE_F) {
3030 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
3031 add_debugfs_mem(adap, "mc0", MEM_MC0,
3032 EXT_MEM0_SIZE_G(size));
3033 }
3034 if (i & EXT_MEM1_ENABLE_F) {
3035 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3036 add_debugfs_mem(adap, "mc1", MEM_MC1,
3037 EXT_MEM1_SIZE_G(size));
3038 }
3039 } else {
3040 if (i & EXT_MEM_ENABLE_F) {
3041 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
3042 add_debugfs_mem(adap, "mc", MEM_MC,
3043 EXT_MEM_SIZE_G(size));
3044 }
3045
3046 if (i & HMA_MUX_F) {
3047 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3048 add_debugfs_mem(adap, "hma", MEM_HMA,
3049 EXT_MEM1_SIZE_G(size));
3050 }
3051 }
3052
3053 de = debugfs_create_file_size("flash", 0400, adap->debugfs_root, adap,
3054 &flash_debugfs_fops, adap->params.sf_size);
3055 debugfs_create_bool("use_backdoor", 0600,
3056 adap->debugfs_root, &adap->use_bd);
3057 debugfs_create_bool("trace_rss", 0600,
3058 adap->debugfs_root, &adap->trace_rss);
3059
3060 return 0;
3061 }
Linux with added FPC-III support