2 * cxgb4_ptp.c:Chelsio PTP support for T5/T6
4 * Copyright (c) 2003-2017 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * Written by: Atul Gupta (atul.gupta@chelsio.com)
37 #include <linux/module.h>
38 #include <linux/net_tstamp.h>
39 #include <linux/skbuff.h>
40 #include <linux/netdevice.h>
41 #include <linux/pps_kernel.h>
42 #include <linux/ptp_clock_kernel.h>
43 #include <linux/ptp_classify.h>
44 #include <linux/udp.h>
51 #include "cxgb4_ptp.h"
54 * cxgb4_ptp_is_ptp_tx - determine whether TX packet is PTP or not
55 * @skb: skb of outgoing ptp request
58 bool cxgb4_ptp_is_ptp_tx(struct sk_buff
*skb
)
63 return skb
->len
>= PTP_MIN_LENGTH
&&
64 skb
->len
<= PTP_IN_TRANSMIT_PACKET_MAXNUM
&&
65 likely(skb
->protocol
== htons(ETH_P_IP
)) &&
66 ip_hdr(skb
)->protocol
== IPPROTO_UDP
&&
67 uh
->dest
== htons(PTP_EVENT_PORT
);
70 bool is_ptp_enabled(struct sk_buff
*skb
, struct net_device
*dev
)
74 pi
= netdev_priv(dev
);
75 return (pi
->ptp_enable
&& cxgb4_xmit_with_hwtstamp(skb
) &&
76 cxgb4_ptp_is_ptp_tx(skb
));
80 * cxgb4_ptp_is_ptp_rx - determine whether RX packet is PTP or not
81 * @skb: skb of incoming ptp request
84 bool cxgb4_ptp_is_ptp_rx(struct sk_buff
*skb
)
86 struct udphdr
*uh
= (struct udphdr
*)(skb
->data
+ ETH_HLEN
+
87 IPV4_HLEN(skb
->data
));
89 return uh
->dest
== htons(PTP_EVENT_PORT
) &&
90 uh
->source
== htons(PTP_EVENT_PORT
);
94 * cxgb4_ptp_read_hwstamp - read timestamp for TX event PTP message
95 * @adapter: board private structure
96 * @pi: port private structure
99 void cxgb4_ptp_read_hwstamp(struct adapter
*adapter
, struct port_info
*pi
)
101 struct skb_shared_hwtstamps
*skb_ts
= NULL
;
104 skb_ts
= skb_hwtstamps(adapter
->ptp_tx_skb
);
106 tx_ts
= t4_read_reg(adapter
,
107 T5_PORT_REG(pi
->port_id
, MAC_PORT_TX_TS_VAL_LO
));
109 tx_ts
|= (u64
)t4_read_reg(adapter
,
110 T5_PORT_REG(pi
->port_id
,
111 MAC_PORT_TX_TS_VAL_HI
)) << 32;
112 skb_ts
->hwtstamp
= ns_to_ktime(tx_ts
);
113 skb_tstamp_tx(adapter
->ptp_tx_skb
, skb_ts
);
114 dev_kfree_skb_any(adapter
->ptp_tx_skb
);
115 spin_lock(&adapter
->ptp_lock
);
116 adapter
->ptp_tx_skb
= NULL
;
117 spin_unlock(&adapter
->ptp_lock
);
121 * cxgb4_ptprx_timestamping - Enable Timestamp for RX PTP event message
122 * @pi: port private structure
127 int cxgb4_ptprx_timestamping(struct port_info
*pi
, u8 port
, u16 mode
)
129 struct adapter
*adapter
= pi
->adapter
;
133 memset(&c
, 0, sizeof(c
));
134 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
137 FW_PTP_CMD_PORTID_V(port
));
138 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
139 c
.u
.init
.sc
= FW_PTP_SC_RXTIME_STAMP
;
140 c
.u
.init
.mode
= cpu_to_be16(mode
);
142 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
144 dev_err(adapter
->pdev_dev
,
145 "PTP: %s error %d\n", __func__
, -err
);
149 int cxgb4_ptp_txtype(struct adapter
*adapter
, u8 port
)
154 memset(&c
, 0, sizeof(c
));
155 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
158 FW_PTP_CMD_PORTID_V(port
));
159 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
160 c
.u
.init
.sc
= FW_PTP_SC_TX_TYPE
;
161 c
.u
.init
.mode
= cpu_to_be16(PTP_TS_NONE
);
163 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
165 dev_err(adapter
->pdev_dev
,
166 "PTP: %s error %d\n", __func__
, -err
);
171 int cxgb4_ptp_redirect_rx_packet(struct adapter
*adapter
, struct port_info
*pi
)
173 struct sge
*s
= &adapter
->sge
;
174 struct sge_eth_rxq
*receive_q
= &s
->ethrxq
[pi
->first_qset
];
178 memset(&c
, 0, sizeof(c
));
179 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
182 FW_PTP_CMD_PORTID_V(pi
->port_id
));
184 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
185 c
.u
.init
.sc
= FW_PTP_SC_RDRX_TYPE
;
186 c
.u
.init
.txchan
= pi
->tx_chan
;
187 c
.u
.init
.absid
= cpu_to_be16(receive_q
->rspq
.abs_id
);
189 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
191 dev_err(adapter
->pdev_dev
,
192 "PTP: %s error %d\n", __func__
, -err
);
197 * @ptp: ptp clock structure
198 * @ppb: Desired frequency change in parts per billion
200 * Adjust the frequency of the PHC cycle counter by the indicated ppb from
201 * the base frequency.
203 static int cxgb4_ptp_adjfreq(struct ptp_clock_info
*ptp
, s32 ppb
)
205 struct adapter
*adapter
= (struct adapter
*)container_of(ptp
,
206 struct adapter
, ptp_clock_info
);
210 memset(&c
, 0, sizeof(c
));
211 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
214 FW_PTP_CMD_PORTID_V(0));
215 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
216 c
.u
.ts
.sc
= FW_PTP_SC_ADJ_FREQ
;
217 c
.u
.ts
.sign
= (ppb
< 0) ? 1 : 0;
220 c
.u
.ts
.ppb
= cpu_to_be32(ppb
);
222 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
224 dev_err(adapter
->pdev_dev
,
225 "PTP: %s error %d\n", __func__
, -err
);
231 * cxgb4_ptp_fineadjtime - Shift the time of the hardware clock
232 * @ptp: ptp clock structure
233 * @delta: Desired change in nanoseconds
235 * Adjust the timer by resetting the timecounter structure.
237 static int cxgb4_ptp_fineadjtime(struct adapter
*adapter
, s64 delta
)
242 memset(&c
, 0, sizeof(c
));
243 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
246 FW_PTP_CMD_PORTID_V(0));
247 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
248 c
.u
.ts
.sc
= FW_PTP_SC_ADJ_FTIME
;
249 c
.u
.ts
.tm
= cpu_to_be64(delta
);
251 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
253 dev_err(adapter
->pdev_dev
,
254 "PTP: %s error %d\n", __func__
, -err
);
259 * cxgb4_ptp_adjtime - Shift the time of the hardware clock
260 * @ptp: ptp clock structure
261 * @delta: Desired change in nanoseconds
263 * Adjust the timer by resetting the timecounter structure.
265 static int cxgb4_ptp_adjtime(struct ptp_clock_info
*ptp
, s64 delta
)
267 struct adapter
*adapter
=
268 (struct adapter
*)container_of(ptp
, struct adapter
,
277 if (delta
* sign
> PTP_CLOCK_MAX_ADJTIME
) {
278 memset(&c
, 0, sizeof(c
));
279 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
282 FW_PTP_CMD_PORTID_V(0));
283 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
284 c
.u
.ts
.sc
= FW_PTP_SC_ADJ_TIME
;
285 c
.u
.ts
.sign
= (delta
< 0) ? 1 : 0;
288 c
.u
.ts
.tm
= cpu_to_be64(delta
);
290 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
292 dev_err(adapter
->pdev_dev
,
293 "PTP: %s error %d\n", __func__
, -err
);
295 err
= cxgb4_ptp_fineadjtime(adapter
, delta
);
302 * cxgb4_ptp_gettime - Reads the current time from the hardware clock
303 * @ptp: ptp clock structure
304 * @ts: timespec structure to hold the current time value
306 * Read the timecounter and return the correct value in ns after converting
307 * it into a struct timespec.
309 static int cxgb4_ptp_gettime(struct ptp_clock_info
*ptp
, struct timespec64
*ts
)
311 struct adapter
*adapter
= (struct adapter
*)container_of(ptp
,
312 struct adapter
, ptp_clock_info
);
317 memset(&c
, 0, sizeof(c
));
318 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
321 FW_PTP_CMD_PORTID_V(0));
322 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
323 c
.u
.ts
.sc
= FW_PTP_SC_GET_TIME
;
325 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), &c
);
327 dev_err(adapter
->pdev_dev
,
328 "PTP: %s error %d\n", __func__
, -err
);
332 /* convert to timespec*/
333 ns
= be64_to_cpu(c
.u
.ts
.tm
);
334 *ts
= ns_to_timespec64(ns
);
340 * cxgb4_ptp_settime - Set the current time on the hardware clock
341 * @ptp: ptp clock structure
342 * @ts: timespec containing the new time for the cycle counter
344 * Reset value to new base value instead of the kernel
347 static int cxgb4_ptp_settime(struct ptp_clock_info
*ptp
,
348 const struct timespec64
*ts
)
350 struct adapter
*adapter
= (struct adapter
*)container_of(ptp
,
351 struct adapter
, ptp_clock_info
);
356 memset(&c
, 0, sizeof(c
));
357 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
360 FW_PTP_CMD_PORTID_V(0));
361 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
362 c
.u
.ts
.sc
= FW_PTP_SC_SET_TIME
;
364 ns
= timespec64_to_ns(ts
);
365 c
.u
.ts
.tm
= cpu_to_be64(ns
);
367 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
369 dev_err(adapter
->pdev_dev
,
370 "PTP: %s error %d\n", __func__
, -err
);
375 static void cxgb4_init_ptp_timer(struct adapter
*adapter
)
380 memset(&c
, 0, sizeof(c
));
381 c
.op_to_portid
= cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD
) |
384 FW_PTP_CMD_PORTID_V(0));
385 c
.retval_len16
= cpu_to_be32(FW_CMD_LEN16_V(sizeof(c
) / 16));
386 c
.u
.scmd
.sc
= FW_PTP_SC_INIT_TIMER
;
388 err
= t4_wr_mbox(adapter
, adapter
->mbox
, &c
, sizeof(c
), NULL
);
390 dev_err(adapter
->pdev_dev
,
391 "PTP: %s error %d\n", __func__
, -err
);
395 * cxgb4_ptp_enable - enable or disable an ancillary feature
396 * @ptp: ptp clock structure
397 * @request: Desired resource to enable or disable
398 * @on: Caller passes one to enable or zero to disable
400 * Enable (or disable) ancillary features of the PHC subsystem.
401 * Currently, no ancillary features are supported.
403 static int cxgb4_ptp_enable(struct ptp_clock_info __always_unused
*ptp
,
404 struct ptp_clock_request __always_unused
*request
,
405 int __always_unused on
)
410 static const struct ptp_clock_info cxgb4_ptp_clock_info
= {
411 .owner
= THIS_MODULE
,
412 .name
= "cxgb4_clock",
413 .max_adj
= MAX_PTP_FREQ_ADJ
,
418 .adjfreq
= cxgb4_ptp_adjfreq
,
419 .adjtime
= cxgb4_ptp_adjtime
,
420 .gettime64
= cxgb4_ptp_gettime
,
421 .settime64
= cxgb4_ptp_settime
,
422 .enable
= cxgb4_ptp_enable
,
426 * cxgb4_ptp_init - initialize PTP for devices which support it
427 * @adapter: board private structure
429 * This function performs the required steps for enabling PTP support.
431 void cxgb4_ptp_init(struct adapter
*adapter
)
433 struct timespec64 now
;
434 /* no need to create a clock device if we already have one */
435 if (!IS_ERR_OR_NULL(adapter
->ptp_clock
))
438 adapter
->ptp_tx_skb
= NULL
;
439 adapter
->ptp_clock_info
= cxgb4_ptp_clock_info
;
440 spin_lock_init(&adapter
->ptp_lock
);
442 adapter
->ptp_clock
= ptp_clock_register(&adapter
->ptp_clock_info
,
443 &adapter
->pdev
->dev
);
444 if (IS_ERR_OR_NULL(adapter
->ptp_clock
)) {
445 adapter
->ptp_clock
= NULL
;
446 dev_err(adapter
->pdev_dev
,
447 "PTP %s Clock registration has failed\n", __func__
);
451 now
= ktime_to_timespec64(ktime_get_real());
452 cxgb4_init_ptp_timer(adapter
);
453 if (cxgb4_ptp_settime(&adapter
->ptp_clock_info
, &now
) < 0) {
454 ptp_clock_unregister(adapter
->ptp_clock
);
455 adapter
->ptp_clock
= NULL
;
460 * cxgb4_ptp_remove - disable PTP device and stop the overflow check
461 * @adapter: board private structure
463 * Stop the PTP support.
465 void cxgb4_ptp_stop(struct adapter
*adapter
)
467 if (adapter
->ptp_tx_skb
) {
468 dev_kfree_skb_any(adapter
->ptp_tx_skb
);
469 adapter
->ptp_tx_skb
= NULL
;
472 if (adapter
->ptp_clock
) {
473 ptp_clock_unregister(adapter
->ptp_clock
);
474 adapter
->ptp_clock
= NULL
;