x86/boot: Rename overlapping memcpy() to memmove()
[linux/fpc-iii.git] / arch / arm / mach-davinci / board-da830-evm.c
blob3d8cf8cbd98a001ab83699137fcd754848d7eb51
1 /*
2 * TI DA830/OMAP L137 EVM board
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c/pcf857x.h>
20 #include <linux/platform_data/at24.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
25 #include <linux/platform_data/gpio-davinci.h>
26 #include <linux/platform_data/mtd-davinci.h>
27 #include <linux/platform_data/mtd-davinci-aemif.h>
28 #include <linux/platform_data/spi-davinci.h>
29 #include <linux/platform_data/usb-davinci.h>
31 #include <asm/mach-types.h>
32 #include <asm/mach/arch.h>
34 #include <mach/common.h>
35 #include "cp_intc.h"
36 #include <mach/mux.h>
37 #include <mach/da8xx.h>
39 #define DA830_EVM_PHY_ID ""
41 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
43 #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
44 #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
46 static const short da830_evm_usb11_pins[] = {
47 DA830_GPIO1_15, DA830_GPIO2_4,
51 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
53 static int da830_evm_usb_set_power(unsigned port, int on)
55 gpio_set_value(ON_BD_USB_DRV, on);
56 return 0;
59 static int da830_evm_usb_get_power(unsigned port)
61 return gpio_get_value(ON_BD_USB_DRV);
64 static int da830_evm_usb_get_oci(unsigned port)
66 return !gpio_get_value(ON_BD_USB_OVC);
69 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
71 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
73 int irq = gpio_to_irq(ON_BD_USB_OVC);
74 int error = 0;
76 if (handler != NULL) {
77 da830_evm_usb_ocic_handler = handler;
79 error = request_irq(irq, da830_evm_usb_ocic_irq,
80 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
81 "OHCI over-current indicator", NULL);
82 if (error)
83 pr_err("%s: could not request IRQ to watch over-current indicator changes\n",
84 __func__);
85 } else
86 free_irq(irq, NULL);
88 return error;
91 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
92 .set_power = da830_evm_usb_set_power,
93 .get_power = da830_evm_usb_get_power,
94 .get_oci = da830_evm_usb_get_oci,
95 .ocic_notify = da830_evm_usb_ocic_notify,
97 /* TPS2065 switch @ 5V */
98 .potpgt = (3 + 1) / 2, /* 3 ms max */
101 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
103 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
104 return IRQ_HANDLED;
107 static __init void da830_evm_usb_init(void)
109 u32 cfgchip2;
110 int ret;
113 * Set up USB clock/mode in the CFGCHIP2 register.
114 * FYI: CFGCHIP2 is 0x0000ef00 initially.
116 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
118 /* USB2.0 PHY reference clock is 24 MHz */
119 cfgchip2 &= ~CFGCHIP2_REFFREQ;
120 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
123 * Select internal reference clock for USB 2.0 PHY
124 * and use it as a clock source for USB 1.1 PHY
125 * (this is the default setting anyway).
127 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
128 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
131 * We have to override VBUS/ID signals when MUSB is configured into the
132 * host-only mode -- ID pin will float if no cable is connected, so the
133 * controller won't be able to drive VBUS thinking that it's a B-device.
134 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
136 cfgchip2 &= ~CFGCHIP2_OTGMODE;
137 #ifdef CONFIG_USB_MUSB_HOST
138 cfgchip2 |= CFGCHIP2_FORCE_HOST;
139 #else
140 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
141 #endif
143 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
145 /* USB_REFCLKIN is not used. */
146 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
147 if (ret)
148 pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
149 else {
151 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
152 * with the power on to power good time of 3 ms.
154 ret = da8xx_register_usb20(1000, 3);
155 if (ret)
156 pr_warn("%s: USB 2.0 registration failed: %d\n",
157 __func__, ret);
160 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
161 if (ret) {
162 pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
163 return;
166 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
167 if (ret) {
168 pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n",
169 __func__, ret);
170 return;
172 gpio_direction_output(ON_BD_USB_DRV, 0);
174 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
175 if (ret) {
176 pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n",
177 __func__, ret);
178 return;
180 gpio_direction_input(ON_BD_USB_OVC);
182 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
183 if (ret)
184 pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
187 static const short da830_evm_mcasp1_pins[] = {
188 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
189 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
190 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
191 DA830_AXR1_11,
195 static u8 da830_iis_serializer_direction[] = {
196 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
197 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
198 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
201 static struct snd_platform_data da830_evm_snd_data = {
202 .tx_dma_offset = 0x2000,
203 .rx_dma_offset = 0x2000,
204 .op_mode = DAVINCI_MCASP_IIS_MODE,
205 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
206 .tdm_slots = 2,
207 .serial_dir = da830_iis_serializer_direction,
208 .asp_chan_q = EVENTQ_0,
209 .version = MCASP_VERSION_2,
210 .txnumevt = 1,
211 .rxnumevt = 1,
215 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
217 static const short da830_evm_mmc_sd_pins[] = {
218 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
219 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
220 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
221 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
225 #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
226 #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
228 static int da830_evm_mmc_get_ro(int index)
230 return gpio_get_value(DA830_MMCSD_WP_PIN);
233 static int da830_evm_mmc_get_cd(int index)
235 return !gpio_get_value(DA830_MMCSD_CD_PIN);
238 static struct davinci_mmc_config da830_evm_mmc_config = {
239 .get_ro = da830_evm_mmc_get_ro,
240 .get_cd = da830_evm_mmc_get_cd,
241 .wires = 8,
242 .max_freq = 50000000,
243 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
246 static inline void da830_evm_init_mmc(void)
248 int ret;
250 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
251 if (ret) {
252 pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret);
253 return;
256 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
257 if (ret) {
258 pr_warn("%s: can not open GPIO %d\n",
259 __func__, DA830_MMCSD_WP_PIN);
260 return;
262 gpio_direction_input(DA830_MMCSD_WP_PIN);
264 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
265 if (ret) {
266 pr_warn("%s: can not open GPIO %d\n",
267 __func__, DA830_MMCSD_CD_PIN);
268 return;
270 gpio_direction_input(DA830_MMCSD_CD_PIN);
272 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
273 if (ret) {
274 pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret);
275 gpio_free(DA830_MMCSD_WP_PIN);
280 * UI board NAND/NOR flashes only use 8-bit data bus.
282 static const short da830_evm_emif25_pins[] = {
283 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
284 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
285 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
286 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
287 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
288 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
289 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
293 #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
295 #ifdef CONFIG_DA830_UI_NAND
296 static struct mtd_partition da830_evm_nand_partitions[] = {
297 /* bootloader (U-Boot, etc) in first sector */
298 [0] = {
299 .name = "bootloader",
300 .offset = 0,
301 .size = SZ_128K,
302 .mask_flags = MTD_WRITEABLE, /* force read-only */
304 /* bootloader params in the next sector */
305 [1] = {
306 .name = "params",
307 .offset = MTDPART_OFS_APPEND,
308 .size = SZ_128K,
309 .mask_flags = MTD_WRITEABLE, /* force read-only */
311 /* kernel */
312 [2] = {
313 .name = "kernel",
314 .offset = MTDPART_OFS_APPEND,
315 .size = SZ_2M,
316 .mask_flags = 0,
318 /* file system */
319 [3] = {
320 .name = "filesystem",
321 .offset = MTDPART_OFS_APPEND,
322 .size = MTDPART_SIZ_FULL,
323 .mask_flags = 0,
327 /* flash bbt decriptors */
328 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
329 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
331 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
332 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
333 NAND_BBT_WRITE | NAND_BBT_2BIT |
334 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
335 .offs = 2,
336 .len = 4,
337 .veroffs = 16,
338 .maxblocks = 4,
339 .pattern = da830_evm_nand_bbt_pattern
342 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
343 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
344 NAND_BBT_WRITE | NAND_BBT_2BIT |
345 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
346 .offs = 2,
347 .len = 4,
348 .veroffs = 16,
349 .maxblocks = 4,
350 .pattern = da830_evm_nand_mirror_pattern
353 static struct davinci_aemif_timing da830_evm_nandflash_timing = {
354 .wsetup = 24,
355 .wstrobe = 21,
356 .whold = 14,
357 .rsetup = 19,
358 .rstrobe = 50,
359 .rhold = 0,
360 .ta = 20,
363 static struct davinci_nand_pdata da830_evm_nand_pdata = {
364 .parts = da830_evm_nand_partitions,
365 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
366 .ecc_mode = NAND_ECC_HW,
367 .ecc_bits = 4,
368 .bbt_options = NAND_BBT_USE_FLASH,
369 .bbt_td = &da830_evm_nand_bbt_main_descr,
370 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
371 .timing = &da830_evm_nandflash_timing,
374 static struct resource da830_evm_nand_resources[] = {
375 [0] = { /* First memory resource is NAND I/O window */
376 .start = DA8XX_AEMIF_CS3_BASE,
377 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
378 .flags = IORESOURCE_MEM,
380 [1] = { /* Second memory resource is AEMIF control registers */
381 .start = DA8XX_AEMIF_CTL_BASE,
382 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
383 .flags = IORESOURCE_MEM,
387 static struct platform_device da830_evm_nand_device = {
388 .name = "davinci_nand",
389 .id = 1,
390 .dev = {
391 .platform_data = &da830_evm_nand_pdata,
393 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
394 .resource = da830_evm_nand_resources,
397 static inline void da830_evm_init_nand(int mux_mode)
399 int ret;
401 if (HAS_MMC) {
402 pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n"
403 "\tDisable MMC/SD for NAND support\n");
404 return;
407 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
408 if (ret)
409 pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
411 ret = platform_device_register(&da830_evm_nand_device);
412 if (ret)
413 pr_warn("%s: NAND device not registered\n", __func__);
415 if (davinci_aemif_setup(&da830_evm_nand_device))
416 pr_warn("%s: Cannot configure AEMIF\n", __func__);
418 gpio_direction_output(mux_mode, 1);
420 #else
421 static inline void da830_evm_init_nand(int mux_mode) { }
422 #endif
424 #ifdef CONFIG_DA830_UI_LCD
425 static inline void da830_evm_init_lcdc(int mux_mode)
427 int ret;
429 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
430 if (ret)
431 pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret);
433 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
434 if (ret)
435 pr_warn("%s: lcd setup failed: %d\n", __func__, ret);
437 gpio_direction_output(mux_mode, 0);
439 #else
440 static inline void da830_evm_init_lcdc(int mux_mode) { }
441 #endif
443 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
444 .byte_len = SZ_256K / 8,
445 .page_size = 64,
446 .flags = AT24_FLAG_ADDR16,
447 .setup = davinci_get_mac_addr,
448 .context = (void *)0x7f00,
451 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
452 int gpio, unsigned ngpio, void *context)
454 gpio_request(gpio + 6, "UI MUX_MODE");
456 /* Drive mux mode low to match the default without UI card */
457 gpio_direction_output(gpio + 6, 0);
459 da830_evm_init_lcdc(gpio + 6);
461 da830_evm_init_nand(gpio + 6);
463 return 0;
466 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
467 unsigned ngpio, void *context)
469 gpio_free(gpio + 6);
470 return 0;
473 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
474 .gpio_base = DAVINCI_N_GPIO,
475 .setup = da830_evm_ui_expander_setup,
476 .teardown = da830_evm_ui_expander_teardown,
479 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
481 I2C_BOARD_INFO("24c256", 0x50),
482 .platform_data = &da830_evm_i2c_eeprom_info,
485 I2C_BOARD_INFO("tlv320aic3x", 0x18),
488 I2C_BOARD_INFO("pcf8574", 0x3f),
489 .platform_data = &da830_evm_ui_expander_info,
493 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
494 .bus_freq = 100, /* kHz */
495 .bus_delay = 0, /* usec */
499 * The following EDMA channels/slots are not being used by drivers (for
500 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
501 * they are being reserved for codecs on the DSP side.
503 static const s16 da830_dma_rsv_chans[][2] = {
504 /* (offset, number) */
505 { 8, 2},
506 {12, 2},
507 {24, 4},
508 {30, 2},
509 {-1, -1}
512 static const s16 da830_dma_rsv_slots[][2] = {
513 /* (offset, number) */
514 { 8, 2},
515 {12, 2},
516 {24, 4},
517 {30, 26},
518 {-1, -1}
521 static struct edma_rsv_info da830_edma_rsv[] = {
523 .rsv_chans = da830_dma_rsv_chans,
524 .rsv_slots = da830_dma_rsv_slots,
528 static struct mtd_partition da830evm_spiflash_part[] = {
529 [0] = {
530 .name = "DSP-UBL",
531 .offset = 0,
532 .size = SZ_8K,
533 .mask_flags = MTD_WRITEABLE,
535 [1] = {
536 .name = "ARM-UBL",
537 .offset = MTDPART_OFS_APPEND,
538 .size = SZ_16K + SZ_8K,
539 .mask_flags = MTD_WRITEABLE,
541 [2] = {
542 .name = "U-Boot",
543 .offset = MTDPART_OFS_APPEND,
544 .size = SZ_256K - SZ_32K,
545 .mask_flags = MTD_WRITEABLE,
547 [3] = {
548 .name = "U-Boot-Environment",
549 .offset = MTDPART_OFS_APPEND,
550 .size = SZ_16K,
551 .mask_flags = 0,
553 [4] = {
554 .name = "Kernel",
555 .offset = MTDPART_OFS_APPEND,
556 .size = MTDPART_SIZ_FULL,
557 .mask_flags = 0,
561 static struct flash_platform_data da830evm_spiflash_data = {
562 .name = "m25p80",
563 .parts = da830evm_spiflash_part,
564 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
565 .type = "w25x32",
568 static struct davinci_spi_config da830evm_spiflash_cfg = {
569 .io_type = SPI_IO_TYPE_DMA,
570 .c2tdelay = 8,
571 .t2cdelay = 8,
574 static struct spi_board_info da830evm_spi_info[] = {
576 .modalias = "m25p80",
577 .platform_data = &da830evm_spiflash_data,
578 .controller_data = &da830evm_spiflash_cfg,
579 .mode = SPI_MODE_0,
580 .max_speed_hz = 30000000,
581 .bus_num = 0,
582 .chip_select = 0,
586 static __init void da830_evm_init(void)
588 struct davinci_soc_info *soc_info = &davinci_soc_info;
589 int ret;
591 ret = da830_register_gpio();
592 if (ret)
593 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
595 ret = da830_register_edma(da830_edma_rsv);
596 if (ret)
597 pr_warn("%s: edma registration failed: %d\n", __func__, ret);
599 ret = davinci_cfg_reg_list(da830_i2c0_pins);
600 if (ret)
601 pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret);
603 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
604 if (ret)
605 pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret);
607 da830_evm_usb_init();
609 soc_info->emac_pdata->rmii_en = 1;
610 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
612 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
613 if (ret)
614 pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret);
616 ret = da8xx_register_emac();
617 if (ret)
618 pr_warn("%s: emac registration failed: %d\n", __func__, ret);
620 ret = da8xx_register_watchdog();
621 if (ret)
622 pr_warn("%s: watchdog registration failed: %d\n",
623 __func__, ret);
625 davinci_serial_init(da8xx_serial_device);
626 i2c_register_board_info(1, da830_evm_i2c_devices,
627 ARRAY_SIZE(da830_evm_i2c_devices));
629 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
630 if (ret)
631 pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret);
633 da8xx_register_mcasp(1, &da830_evm_snd_data);
635 da830_evm_init_mmc();
637 ret = da8xx_register_rtc();
638 if (ret)
639 pr_warn("%s: rtc setup failed: %d\n", __func__, ret);
641 ret = spi_register_board_info(da830evm_spi_info,
642 ARRAY_SIZE(da830evm_spi_info));
643 if (ret)
644 pr_warn("%s: spi info registration failed: %d\n",
645 __func__, ret);
647 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
648 if (ret)
649 pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);
652 #ifdef CONFIG_SERIAL_8250_CONSOLE
653 static int __init da830_evm_console_init(void)
655 if (!machine_is_davinci_da830_evm())
656 return 0;
658 return add_preferred_console("ttyS", 2, "115200");
660 console_initcall(da830_evm_console_init);
661 #endif
663 static void __init da830_evm_map_io(void)
665 da830_init();
668 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
669 .atag_offset = 0x100,
670 .map_io = da830_evm_map_io,
671 .init_irq = cp_intc_init,
672 .init_time = davinci_timer_init,
673 .init_machine = da830_evm_init,
674 .init_late = davinci_init_late,
675 .dma_zone_size = SZ_128M,
676 .restart = da8xx_restart,
677 MACHINE_END