x86/boot: Rename overlapping memcpy() to memmove()
[linux/fpc-iii.git] / arch / arm / mach-exynos / regs-srom.h
blob5c4d4427db7b1d93e6b676c46b17aab13f517e5a
1 /*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * S5P SROMC register definitions
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #ifndef __PLAT_SAMSUNG_REGS_SROM_H
13 #define __PLAT_SAMSUNG_REGS_SROM_H __FILE__
15 #include <mach/map.h>
17 #define S5P_SROMREG(x) (S5P_VA_SROMC + (x))
19 #define S5P_SROM_BW S5P_SROMREG(0x0)
20 #define S5P_SROM_BC0 S5P_SROMREG(0x4)
21 #define S5P_SROM_BC1 S5P_SROMREG(0x8)
22 #define S5P_SROM_BC2 S5P_SROMREG(0xc)
23 #define S5P_SROM_BC3 S5P_SROMREG(0x10)
24 #define S5P_SROM_BC4 S5P_SROMREG(0x14)
25 #define S5P_SROM_BC5 S5P_SROMREG(0x18)
27 /* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
29 #define S5P_SROM_BW__DATAWIDTH__SHIFT 0
30 #define S5P_SROM_BW__ADDRMODE__SHIFT 1
31 #define S5P_SROM_BW__WAITENABLE__SHIFT 2
32 #define S5P_SROM_BW__BYTEENABLE__SHIFT 3
34 #define S5P_SROM_BW__CS_MASK 0xf
36 #define S5P_SROM_BW__NCS0__SHIFT 0
37 #define S5P_SROM_BW__NCS1__SHIFT 4
38 #define S5P_SROM_BW__NCS2__SHIFT 8
39 #define S5P_SROM_BW__NCS3__SHIFT 12
40 #define S5P_SROM_BW__NCS4__SHIFT 16
41 #define S5P_SROM_BW__NCS5__SHIFT 20
43 /* applies to same to BCS0 - BCS3 */
45 #define S5P_SROM_BCX__PMC__SHIFT 0
46 #define S5P_SROM_BCX__TACP__SHIFT 4
47 #define S5P_SROM_BCX__TCAH__SHIFT 8
48 #define S5P_SROM_BCX__TCOH__SHIFT 12
49 #define S5P_SROM_BCX__TACC__SHIFT 16
50 #define S5P_SROM_BCX__TCOS__SHIFT 24
51 #define S5P_SROM_BCX__TACS__SHIFT 28
53 #endif /* __PLAT_SAMSUNG_REGS_SROM_H */