arch/arm/mach-omap2/pm.h

   1 /*
   2  * OMAP2/3 Power Management Routines
   3  *
   4  * Copyright (C) 2008 Nokia Corporation
   5  * Jouni Hogander
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
  12 #define __ARCH_ARM_MACH_OMAP2_PM_H
  13
  14 #include <linux/err.h>
  15
  16 #include "powerdomain.h"
  17
  18 #ifdef CONFIG_CPU_IDLE
  19 extern int __init omap3_idle_init(void);
  20 extern int __init omap4_idle_init(void);
  21 #else
  22 static inline int omap3_idle_init(void)
  23 {
  24         return 0;
  25 }
  26
  27 static inline int omap4_idle_init(void)
  28 {
  29         return 0;
  30 }
  31 #endif
  32
  33 extern void *omap3_secure_ram_storage;
  34 extern void omap3_pm_off_mode_enable(int);
  35 extern void omap_sram_idle(void);
  36 extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
  37
  38 #if defined(CONFIG_PM_OPP)
  39 extern int omap3_opp_init(void);
  40 extern int omap4_opp_init(void);
  41 #else
  42 static inline int omap3_opp_init(void)
  43 {
  44         return -EINVAL;
  45 }
  46 static inline int omap4_opp_init(void)
  47 {
  48         return -EINVAL;
  49 }
  50 #endif
  51
  52 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
  53 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
  54
  55 #ifdef CONFIG_PM_DEBUG
  56 extern u32 enable_off_mode;
  57 #else
  58 #define enable_off_mode 0
  59 #endif
  60
  61 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
  62 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
  63 #else
  64 #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
  65 #endif /* CONFIG_PM_DEBUG */
  66
  67 /* 24xx */
  68 extern void omap24xx_idle_loop_suspend(void);
  69 extern unsigned int omap24xx_idle_loop_suspend_sz;
  70
  71 extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
  72                                         void __iomem *sdrc_power);
  73 extern unsigned int omap24xx_cpu_suspend_sz;
  74
  75 /* 3xxx */
  76 extern void omap34xx_cpu_suspend(int save_state);
  77
  78 /* omap3_do_wfi function pointer and size, for copy to SRAM */
  79 extern void omap3_do_wfi(void);
  80 extern unsigned int omap3_do_wfi_sz;
  81 /* ... and its pointer from SRAM after copy */
  82 extern void (*omap3_do_wfi_sram)(void);
  83
  84 /* save_secure_ram_context function pointer and size, for copy to SRAM */
  85 extern int save_secure_ram_context(u32 *addr);
  86 extern unsigned int save_secure_ram_context_sz;
  87
  88 extern void omap3_save_scratchpad_contents(void);
  89
  90 #define PM_RTA_ERRATUM_i608             (1 << 0)
  91 #define PM_SDRC_WAKEUP_ERRATUM_i583     (1 << 1)
  92 #define PM_PER_MEMORIES_ERRATUM_i582    (1 << 2)
  93
  94 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
  95 extern u16 pm34xx_errata;
  96 #define IS_PM34XX_ERRATUM(id)           (pm34xx_errata & (id))
  97 extern void enable_omap3630_toggle_l2_on_restore(void);
  98 #else
  99 #define IS_PM34XX_ERRATUM(id)           0
 100 static inline void enable_omap3630_toggle_l2_on_restore(void) { }
 101 #endif          /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
 102
 103 #define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD      (1 << 0)
 104 #define PM_OMAP4_CPU_OSWR_DISABLE               (1 << 1)
 105
 106 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
 107            defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
 108 extern u16 pm44xx_errata;
 109 #define IS_PM44XX_ERRATUM(id)           (pm44xx_errata & (id))
 110 #else
 111 #define IS_PM44XX_ERRATUM(id)           0
 112 #endif
 113
 114 #ifdef CONFIG_POWER_AVS_OMAP
 115 extern int omap_devinit_smartreflex(void);
 116 extern void omap_enable_smartreflex_on_init(void);
 117 #else
 118 static inline int omap_devinit_smartreflex(void)
 119 {
 120         return -EINVAL;
 121 }
 122
 123 static inline void omap_enable_smartreflex_on_init(void) {}
 124 #endif
 125
 126 #ifdef CONFIG_TWL4030_CORE
 127 extern int omap3_twl_init(void);
 128 extern int omap4_twl_init(void);
 129 extern int omap3_twl_set_sr_bit(bool enable);
 130 #else
 131 static inline int omap3_twl_init(void)
 132 {
 133         return -EINVAL;
 134 }
 135 static inline int omap4_twl_init(void)
 136 {
 137         return -EINVAL;
 138 }
 139 #endif
 140
 141 #ifdef CONFIG_PM
 142 extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
 143 extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
 144 extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
 145 #else
 146 static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
 147 static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
 148 static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
 149 #endif
 150
 151 #ifdef CONFIG_SUSPEND
 152 void omap_common_suspend_init(void *pm_suspend);
 153 #else
 154 static inline void omap_common_suspend_init(void *pm_suspend)
 155 {
 156 }
 157 #endif /* CONFIG_SUSPEND */
 158 #endif