x86/boot: Rename overlapping memcpy() to memmove()
[linux/fpc-iii.git] / arch / arm / mach-s3c64xx / mach-crag6410-module.c
blob571f95cc5a53580f20ba99ce661a3141cc4216e5
1 /* Speyside modules for Cragganmore - board data probing
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
11 #include <linux/export.h>
12 #include <linux/interrupt.h>
13 #include <linux/i2c.h>
14 #include <linux/spi/spi.h>
16 #include <linux/mfd/wm831x/irq.h>
17 #include <linux/mfd/wm831x/gpio.h>
18 #include <linux/mfd/wm8994/pdata.h>
19 #include <linux/mfd/arizona/pdata.h>
21 #include <linux/regulator/machine.h>
23 #include <sound/wm0010.h>
24 #include <sound/wm2200.h>
25 #include <sound/wm5100.h>
26 #include <sound/wm8996.h>
27 #include <sound/wm8962.h>
28 #include <sound/wm9081.h>
30 #include <linux/platform_data/spi-s3c64xx.h>
32 #include <plat/cpu.h>
33 #include <mach/irqs.h>
35 #include "crag6410.h"
37 static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
38 .line = S3C64XX_GPC(3),
41 static struct wm0010_pdata wm0010_pdata = {
42 .gpio_reset = S3C64XX_GPN(6),
43 .reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
46 static struct spi_board_info wm1253_devs[] = {
47 [0] = {
48 .modalias = "wm0010",
49 .max_speed_hz = 26 * 1000 * 1000,
50 .bus_num = 0,
51 .chip_select = 0,
52 .mode = SPI_MODE_0,
53 .irq = S3C_EINT(4),
54 .controller_data = &wm0010_spi_csinfo,
55 .platform_data = &wm0010_pdata,
59 static struct spi_board_info balblair_devs[] = {
60 [0] = {
61 .modalias = "wm0010",
62 .max_speed_hz = 26 * 1000 * 1000,
63 .bus_num = 0,
64 .chip_select = 0,
65 .mode = SPI_MODE_0,
66 .irq = S3C_EINT(4),
67 .controller_data = &wm0010_spi_csinfo,
68 .platform_data = &wm0010_pdata,
72 static struct wm5100_pdata wm5100_pdata = {
73 .ldo_ena = S3C64XX_GPN(7),
74 .irq_flags = IRQF_TRIGGER_HIGH,
75 .gpio_base = CODEC_GPIO_BASE,
77 .in_mode = {
78 WM5100_IN_DIFF,
79 WM5100_IN_DIFF,
80 WM5100_IN_DIFF,
81 WM5100_IN_SE,
84 .hp_pol = CODEC_GPIO_BASE + 3,
85 .jack_modes = {
86 { WM5100_MICDET_MICBIAS3, 0, 0 },
87 { WM5100_MICDET_MICBIAS2, 1, 1 },
90 .gpio_defaults = {
95 0x2, /* IRQ: CMOS output */
96 0x3, /* CLKOUT: CMOS output */
100 static struct wm8996_retune_mobile_config wm8996_retune[] = {
102 .name = "Sub LPF",
103 .rate = 48000,
104 .regs = {
105 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
106 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
107 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
111 .name = "Sub HPF",
112 .rate = 48000,
113 .regs = {
114 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
115 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
116 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
121 static struct wm8996_pdata wm8996_pdata __initdata = {
122 .ldo_ena = S3C64XX_GPN(7),
123 .gpio_base = CODEC_GPIO_BASE,
124 .micdet_def = 1,
125 .inl_mode = WM8996_DIFFERRENTIAL_1,
126 .inr_mode = WM8996_DIFFERRENTIAL_1,
128 .irq_flags = IRQF_TRIGGER_RISING,
130 .gpio_default = {
131 0x8001, /* GPIO1 == ADCLRCLK1 */
132 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
133 0x0141, /* GPIO3 == HP_SEL */
134 0x0002, /* GPIO4 == IRQ */
135 0x020e, /* GPIO5 == CLKOUT */
138 .retune_mobile_cfgs = wm8996_retune,
139 .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
142 static struct wm8962_pdata wm8962_pdata __initdata = {
143 .gpio_init = {
145 WM8962_GPIO_FN_OPCLK,
146 WM8962_GPIO_FN_DMICCLK,
148 0x8000 | WM8962_GPIO_FN_DMICDAT,
149 WM8962_GPIO_FN_IRQ, /* Open drain mode */
151 .in4_dc_measure = true,
154 static struct wm9081_pdata wm9081_pdata __initdata = {
155 .irq_high = false,
156 .irq_cmos = false,
159 static const struct i2c_board_info wm1254_devs[] = {
160 { I2C_BOARD_INFO("wm8996", 0x1a),
161 .platform_data = &wm8996_pdata,
162 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
164 { I2C_BOARD_INFO("wm9081", 0x6c),
165 .platform_data = &wm9081_pdata, },
168 static const struct i2c_board_info wm1255_devs[] = {
169 { I2C_BOARD_INFO("wm5100", 0x1a),
170 .platform_data = &wm5100_pdata,
171 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
173 { I2C_BOARD_INFO("wm9081", 0x6c),
174 .platform_data = &wm9081_pdata, },
177 static const struct i2c_board_info wm1259_devs[] = {
178 { I2C_BOARD_INFO("wm8962", 0x1a),
179 .platform_data = &wm8962_pdata,
180 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
184 static struct regulator_init_data wm8994_ldo1 = {
185 .supply_regulator = "WALLVDD",
188 static struct regulator_init_data wm8994_ldo2 = {
189 .supply_regulator = "WALLVDD",
192 static struct wm8994_pdata wm8994_pdata = {
193 .gpio_base = CODEC_GPIO_BASE,
194 .micb2_delay = 150,
195 .gpio_defaults = {
196 0x3, /* IRQ out, active high, CMOS */
198 .ldo = {
199 { .enable = S3C64XX_GPN(6), .init_data = &wm8994_ldo1, },
200 { .enable = S3C64XX_GPN(4), .init_data = &wm8994_ldo2, },
204 static const struct i2c_board_info wm1277_devs[] = {
205 { I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
206 .platform_data = &wm8994_pdata,
207 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
211 static struct arizona_pdata wm5102_reva_pdata = {
212 .ldoena = S3C64XX_GPN(7),
213 .gpio_base = CODEC_GPIO_BASE,
214 .irq_flags = IRQF_TRIGGER_HIGH,
215 .micd_pol_gpio = CODEC_GPIO_BASE + 4,
216 .micd_rate = 6,
217 .gpio_defaults = {
218 [2] = 0x10000, /* AIF3TXLRCLK */
219 [3] = 0x4, /* OPCLK */
223 static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
224 .line = S3C64XX_GPN(5),
227 static struct spi_board_info wm5102_reva_spi_devs[] = {
228 [0] = {
229 .modalias = "wm5102",
230 .max_speed_hz = 10 * 1000 * 1000,
231 .bus_num = 0,
232 .chip_select = 1,
233 .mode = SPI_MODE_0,
234 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
235 WM831X_IRQ_GPIO_2,
236 .controller_data = &codec_spi_csinfo,
237 .platform_data = &wm5102_reva_pdata,
241 static struct arizona_pdata wm5102_pdata = {
242 .ldoena = S3C64XX_GPN(7),
243 .gpio_base = CODEC_GPIO_BASE,
244 .irq_flags = IRQF_TRIGGER_HIGH,
245 .micd_pol_gpio = CODEC_GPIO_BASE + 2,
246 .gpio_defaults = {
247 [2] = 0x10000, /* AIF3TXLRCLK */
248 [3] = 0x4, /* OPCLK */
252 static struct spi_board_info wm5102_spi_devs[] = {
253 [0] = {
254 .modalias = "wm5102",
255 .max_speed_hz = 10 * 1000 * 1000,
256 .bus_num = 0,
257 .chip_select = 1,
258 .mode = SPI_MODE_0,
259 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
260 WM831X_IRQ_GPIO_2,
261 .controller_data = &codec_spi_csinfo,
262 .platform_data = &wm5102_pdata,
266 static struct spi_board_info wm5110_spi_devs[] = {
267 [0] = {
268 .modalias = "wm5110",
269 .max_speed_hz = 10 * 1000 * 1000,
270 .bus_num = 0,
271 .chip_select = 1,
272 .mode = SPI_MODE_0,
273 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
274 WM831X_IRQ_GPIO_2,
275 .controller_data = &codec_spi_csinfo,
276 .platform_data = &wm5102_reva_pdata,
280 static const struct i2c_board_info wm6230_i2c_devs[] = {
281 { I2C_BOARD_INFO("wm9081", 0x6c),
282 .platform_data = &wm9081_pdata, },
285 static struct wm2200_pdata wm2200_pdata = {
286 .ldo_ena = S3C64XX_GPN(7),
287 .gpio_defaults = {
288 [2] = 0x0005, /* GPIO3 24.576MHz output clock */
292 static const struct i2c_board_info wm2200_i2c[] = {
293 { I2C_BOARD_INFO("wm2200", 0x3a),
294 .platform_data = &wm2200_pdata, },
297 static const struct {
298 u8 id;
299 u8 rev;
300 const char *name;
301 const struct i2c_board_info *i2c_devs;
302 int num_i2c_devs;
303 const struct spi_board_info *spi_devs;
304 int num_spi_devs;
305 } gf_mods[] = {
306 { .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
307 { .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
308 { .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
309 { .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
310 { .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
311 .spi_devs = wm5110_spi_devs,
312 .num_spi_devs = ARRAY_SIZE(wm5110_spi_devs) },
313 { .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
314 { .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
315 { .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
316 { .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
317 { .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
318 { .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
319 { .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
320 .i2c_devs = wm6230_i2c_devs,
321 .num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },
322 { .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
323 { .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
324 { .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
325 .spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) },
326 { .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
327 { .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
328 { .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
329 .spi_devs = balblair_devs,
330 .num_spi_devs = ARRAY_SIZE(balblair_devs) },
331 { .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
332 .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
333 { .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
334 .i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
335 { .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
336 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
337 { .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
338 { .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
339 .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
340 { .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
341 .spi_devs = wm5102_reva_spi_devs,
342 .num_spi_devs = ARRAY_SIZE(wm5102_reva_spi_devs) },
343 { .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
344 .spi_devs = wm5102_spi_devs,
345 .num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
346 { .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
347 .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
350 static int wlf_gf_module_probe(struct i2c_client *i2c,
351 const struct i2c_device_id *i2c_id)
353 int ret, i, j, id, rev;
355 ret = i2c_smbus_read_byte_data(i2c, 0);
356 if (ret < 0) {
357 dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
358 return ret;
361 id = (ret & 0xfe) >> 2;
362 rev = ret & 0x3;
363 for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
364 if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff ||
365 rev == gf_mods[i].rev))
366 break;
368 if (i < ARRAY_SIZE(gf_mods)) {
369 dev_info(&i2c->dev, "%s revision %d\n",
370 gf_mods[i].name, rev + 1);
372 for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
373 if (!i2c_new_device(i2c->adapter,
374 &(gf_mods[i].i2c_devs[j])))
375 dev_err(&i2c->dev,
376 "Failed to register dev: %d\n", ret);
379 spi_register_board_info(gf_mods[i].spi_devs,
380 gf_mods[i].num_spi_devs);
381 } else {
382 dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
383 id, rev + 1);
386 return 0;
389 static const struct i2c_device_id wlf_gf_module_id[] = {
390 { "wlf-gf-module", 0 },
394 static struct i2c_driver wlf_gf_module_driver = {
395 .driver = {
396 .name = "wlf-gf-module",
397 .owner = THIS_MODULE,
399 .probe = wlf_gf_module_probe,
400 .id_table = wlf_gf_module_id,
403 static int __init wlf_gf_module_register(void)
405 if (!soc_is_s3c64xx())
406 return 0;
408 return i2c_add_driver(&wlf_gf_module_driver);
410 device_initcall(wlf_gf_module_register);