x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / arm / mach-davinci / board-da830-evm.c
blobc4bdc0a1c36e7795a21862f8a69a7e8ead71a43b
1 /*
2 * TI DA830/OMAP L137 EVM board
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c/pcf857x.h>
20 #include <linux/i2c/at24.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
29 #include <mach/cp_intc.h>
30 #include <mach/mux.h>
31 #include <linux/platform_data/mtd-davinci.h>
32 #include <mach/da8xx.h>
33 #include <linux/platform_data/usb-davinci.h>
34 #include <linux/platform_data/mtd-davinci-aemif.h>
35 #include <linux/platform_data/spi-davinci.h>
37 #define DA830_EVM_PHY_ID ""
39 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
41 #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
42 #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
44 static const short da830_evm_usb11_pins[] = {
45 DA830_GPIO1_15, DA830_GPIO2_4,
49 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
51 static int da830_evm_usb_set_power(unsigned port, int on)
53 gpio_set_value(ON_BD_USB_DRV, on);
54 return 0;
57 static int da830_evm_usb_get_power(unsigned port)
59 return gpio_get_value(ON_BD_USB_DRV);
62 static int da830_evm_usb_get_oci(unsigned port)
64 return !gpio_get_value(ON_BD_USB_OVC);
67 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
69 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
71 int irq = gpio_to_irq(ON_BD_USB_OVC);
72 int error = 0;
74 if (handler != NULL) {
75 da830_evm_usb_ocic_handler = handler;
77 error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
78 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
79 "OHCI over-current indicator", NULL);
80 if (error)
81 printk(KERN_ERR "%s: could not request IRQ to watch "
82 "over-current indicator changes\n", __func__);
83 } else
84 free_irq(irq, NULL);
86 return error;
89 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
90 .set_power = da830_evm_usb_set_power,
91 .get_power = da830_evm_usb_get_power,
92 .get_oci = da830_evm_usb_get_oci,
93 .ocic_notify = da830_evm_usb_ocic_notify,
95 /* TPS2065 switch @ 5V */
96 .potpgt = (3 + 1) / 2, /* 3 ms max */
99 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
101 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
102 return IRQ_HANDLED;
105 static __init void da830_evm_usb_init(void)
107 u32 cfgchip2;
108 int ret;
111 * Set up USB clock/mode in the CFGCHIP2 register.
112 * FYI: CFGCHIP2 is 0x0000ef00 initially.
114 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
116 /* USB2.0 PHY reference clock is 24 MHz */
117 cfgchip2 &= ~CFGCHIP2_REFFREQ;
118 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
121 * Select internal reference clock for USB 2.0 PHY
122 * and use it as a clock source for USB 1.1 PHY
123 * (this is the default setting anyway).
125 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
126 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
129 * We have to override VBUS/ID signals when MUSB is configured into the
130 * host-only mode -- ID pin will float if no cable is connected, so the
131 * controller won't be able to drive VBUS thinking that it's a B-device.
132 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
134 cfgchip2 &= ~CFGCHIP2_OTGMODE;
135 #ifdef CONFIG_USB_MUSB_HOST
136 cfgchip2 |= CFGCHIP2_FORCE_HOST;
137 #else
138 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
139 #endif
141 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
143 /* USB_REFCLKIN is not used. */
144 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
145 if (ret)
146 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
147 __func__, ret);
148 else {
150 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
151 * with the power on to power good time of 3 ms.
153 ret = da8xx_register_usb20(1000, 3);
154 if (ret)
155 pr_warning("%s: USB 2.0 registration failed: %d\n",
156 __func__, ret);
159 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
160 if (ret) {
161 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
162 __func__, ret);
163 return;
166 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
167 if (ret) {
168 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
169 "power control: %d\n", __func__, ret);
170 return;
172 gpio_direction_output(ON_BD_USB_DRV, 0);
174 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
175 if (ret) {
176 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
177 "over-current indicator: %d\n", __func__, ret);
178 return;
180 gpio_direction_input(ON_BD_USB_OVC);
182 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
183 if (ret)
184 pr_warning("%s: USB 1.1 registration failed: %d\n",
185 __func__, ret);
188 static const short da830_evm_mcasp1_pins[] = {
189 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
190 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
191 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
192 DA830_AXR1_11,
196 static u8 da830_iis_serializer_direction[] = {
197 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
198 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
199 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
202 static struct snd_platform_data da830_evm_snd_data = {
203 .tx_dma_offset = 0x2000,
204 .rx_dma_offset = 0x2000,
205 .op_mode = DAVINCI_MCASP_IIS_MODE,
206 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
207 .tdm_slots = 2,
208 .serial_dir = da830_iis_serializer_direction,
209 .asp_chan_q = EVENTQ_0,
210 .version = MCASP_VERSION_2,
211 .txnumevt = 1,
212 .rxnumevt = 1,
216 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
218 static const short da830_evm_mmc_sd_pins[] = {
219 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
220 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
221 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
222 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
226 #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
227 #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
229 static int da830_evm_mmc_get_ro(int index)
231 return gpio_get_value(DA830_MMCSD_WP_PIN);
234 static int da830_evm_mmc_get_cd(int index)
236 return !gpio_get_value(DA830_MMCSD_CD_PIN);
239 static struct davinci_mmc_config da830_evm_mmc_config = {
240 .get_ro = da830_evm_mmc_get_ro,
241 .get_cd = da830_evm_mmc_get_cd,
242 .wires = 8,
243 .max_freq = 50000000,
244 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
247 static inline void da830_evm_init_mmc(void)
249 int ret;
251 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
252 if (ret) {
253 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
254 ret);
255 return;
258 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
259 if (ret) {
260 pr_warning("da830_evm_init: can not open GPIO %d\n",
261 DA830_MMCSD_WP_PIN);
262 return;
264 gpio_direction_input(DA830_MMCSD_WP_PIN);
266 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
267 if (ret) {
268 pr_warning("da830_evm_init: can not open GPIO %d\n",
269 DA830_MMCSD_CD_PIN);
270 return;
272 gpio_direction_input(DA830_MMCSD_CD_PIN);
274 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
275 if (ret) {
276 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
277 ret);
278 gpio_free(DA830_MMCSD_WP_PIN);
283 * UI board NAND/NOR flashes only use 8-bit data bus.
285 static const short da830_evm_emif25_pins[] = {
286 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
287 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
288 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
289 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
290 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
291 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
292 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
296 #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
298 #ifdef CONFIG_DA830_UI_NAND
299 static struct mtd_partition da830_evm_nand_partitions[] = {
300 /* bootloader (U-Boot, etc) in first sector */
301 [0] = {
302 .name = "bootloader",
303 .offset = 0,
304 .size = SZ_128K,
305 .mask_flags = MTD_WRITEABLE, /* force read-only */
307 /* bootloader params in the next sector */
308 [1] = {
309 .name = "params",
310 .offset = MTDPART_OFS_APPEND,
311 .size = SZ_128K,
312 .mask_flags = MTD_WRITEABLE, /* force read-only */
314 /* kernel */
315 [2] = {
316 .name = "kernel",
317 .offset = MTDPART_OFS_APPEND,
318 .size = SZ_2M,
319 .mask_flags = 0,
321 /* file system */
322 [3] = {
323 .name = "filesystem",
324 .offset = MTDPART_OFS_APPEND,
325 .size = MTDPART_SIZ_FULL,
326 .mask_flags = 0,
330 /* flash bbt decriptors */
331 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
332 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
334 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
335 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
336 NAND_BBT_WRITE | NAND_BBT_2BIT |
337 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
338 .offs = 2,
339 .len = 4,
340 .veroffs = 16,
341 .maxblocks = 4,
342 .pattern = da830_evm_nand_bbt_pattern
345 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
346 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
347 NAND_BBT_WRITE | NAND_BBT_2BIT |
348 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
349 .offs = 2,
350 .len = 4,
351 .veroffs = 16,
352 .maxblocks = 4,
353 .pattern = da830_evm_nand_mirror_pattern
356 static struct davinci_aemif_timing da830_evm_nandflash_timing = {
357 .wsetup = 24,
358 .wstrobe = 21,
359 .whold = 14,
360 .rsetup = 19,
361 .rstrobe = 50,
362 .rhold = 0,
363 .ta = 20,
366 static struct davinci_nand_pdata da830_evm_nand_pdata = {
367 .parts = da830_evm_nand_partitions,
368 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
369 .ecc_mode = NAND_ECC_HW,
370 .ecc_bits = 4,
371 .bbt_options = NAND_BBT_USE_FLASH,
372 .bbt_td = &da830_evm_nand_bbt_main_descr,
373 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
374 .timing = &da830_evm_nandflash_timing,
377 static struct resource da830_evm_nand_resources[] = {
378 [0] = { /* First memory resource is NAND I/O window */
379 .start = DA8XX_AEMIF_CS3_BASE,
380 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
381 .flags = IORESOURCE_MEM,
383 [1] = { /* Second memory resource is AEMIF control registers */
384 .start = DA8XX_AEMIF_CTL_BASE,
385 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
386 .flags = IORESOURCE_MEM,
390 static struct platform_device da830_evm_nand_device = {
391 .name = "davinci_nand",
392 .id = 1,
393 .dev = {
394 .platform_data = &da830_evm_nand_pdata,
396 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
397 .resource = da830_evm_nand_resources,
400 static inline void da830_evm_init_nand(int mux_mode)
402 int ret;
404 if (HAS_MMC) {
405 pr_warning("WARNING: both MMC/SD and NAND are "
406 "enabled, but they share AEMIF pins.\n"
407 "\tDisable MMC/SD for NAND support.\n");
408 return;
411 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
412 if (ret)
413 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
414 ret);
416 ret = platform_device_register(&da830_evm_nand_device);
417 if (ret)
418 pr_warning("da830_evm_init: NAND device not registered.\n");
420 gpio_direction_output(mux_mode, 1);
422 #else
423 static inline void da830_evm_init_nand(int mux_mode) { }
424 #endif
426 #ifdef CONFIG_DA830_UI_LCD
427 static inline void da830_evm_init_lcdc(int mux_mode)
429 int ret;
431 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
432 if (ret)
433 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
434 ret);
436 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
437 if (ret)
438 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
440 gpio_direction_output(mux_mode, 0);
442 #else
443 static inline void da830_evm_init_lcdc(int mux_mode) { }
444 #endif
446 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
447 .byte_len = SZ_256K / 8,
448 .page_size = 64,
449 .flags = AT24_FLAG_ADDR16,
450 .setup = davinci_get_mac_addr,
451 .context = (void *)0x7f00,
454 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
455 int gpio, unsigned ngpio, void *context)
457 gpio_request(gpio + 6, "UI MUX_MODE");
459 /* Drive mux mode low to match the default without UI card */
460 gpio_direction_output(gpio + 6, 0);
462 da830_evm_init_lcdc(gpio + 6);
464 da830_evm_init_nand(gpio + 6);
466 return 0;
469 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
470 unsigned ngpio, void *context)
472 gpio_free(gpio + 6);
473 return 0;
476 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
477 .gpio_base = DAVINCI_N_GPIO,
478 .setup = da830_evm_ui_expander_setup,
479 .teardown = da830_evm_ui_expander_teardown,
482 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
484 I2C_BOARD_INFO("24c256", 0x50),
485 .platform_data = &da830_evm_i2c_eeprom_info,
488 I2C_BOARD_INFO("tlv320aic3x", 0x18),
491 I2C_BOARD_INFO("pcf8574", 0x3f),
492 .platform_data = &da830_evm_ui_expander_info,
496 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
497 .bus_freq = 100, /* kHz */
498 .bus_delay = 0, /* usec */
502 * The following EDMA channels/slots are not being used by drivers (for
503 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
504 * they are being reserved for codecs on the DSP side.
506 static const s16 da830_dma_rsv_chans[][2] = {
507 /* (offset, number) */
508 { 8, 2},
509 {12, 2},
510 {24, 4},
511 {30, 2},
512 {-1, -1}
515 static const s16 da830_dma_rsv_slots[][2] = {
516 /* (offset, number) */
517 { 8, 2},
518 {12, 2},
519 {24, 4},
520 {30, 26},
521 {-1, -1}
524 static struct edma_rsv_info da830_edma_rsv[] = {
526 .rsv_chans = da830_dma_rsv_chans,
527 .rsv_slots = da830_dma_rsv_slots,
531 static struct mtd_partition da830evm_spiflash_part[] = {
532 [0] = {
533 .name = "DSP-UBL",
534 .offset = 0,
535 .size = SZ_8K,
536 .mask_flags = MTD_WRITEABLE,
538 [1] = {
539 .name = "ARM-UBL",
540 .offset = MTDPART_OFS_APPEND,
541 .size = SZ_16K + SZ_8K,
542 .mask_flags = MTD_WRITEABLE,
544 [2] = {
545 .name = "U-Boot",
546 .offset = MTDPART_OFS_APPEND,
547 .size = SZ_256K - SZ_32K,
548 .mask_flags = MTD_WRITEABLE,
550 [3] = {
551 .name = "U-Boot-Environment",
552 .offset = MTDPART_OFS_APPEND,
553 .size = SZ_16K,
554 .mask_flags = 0,
556 [4] = {
557 .name = "Kernel",
558 .offset = MTDPART_OFS_APPEND,
559 .size = MTDPART_SIZ_FULL,
560 .mask_flags = 0,
564 static struct flash_platform_data da830evm_spiflash_data = {
565 .name = "m25p80",
566 .parts = da830evm_spiflash_part,
567 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
568 .type = "w25x32",
571 static struct davinci_spi_config da830evm_spiflash_cfg = {
572 .io_type = SPI_IO_TYPE_DMA,
573 .c2tdelay = 8,
574 .t2cdelay = 8,
577 static struct spi_board_info da830evm_spi_info[] = {
579 .modalias = "m25p80",
580 .platform_data = &da830evm_spiflash_data,
581 .controller_data = &da830evm_spiflash_cfg,
582 .mode = SPI_MODE_0,
583 .max_speed_hz = 30000000,
584 .bus_num = 0,
585 .chip_select = 0,
589 static __init void da830_evm_init(void)
591 struct davinci_soc_info *soc_info = &davinci_soc_info;
592 int ret;
594 ret = da830_register_edma(da830_edma_rsv);
595 if (ret)
596 pr_warning("da830_evm_init: edma registration failed: %d\n",
597 ret);
599 ret = davinci_cfg_reg_list(da830_i2c0_pins);
600 if (ret)
601 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
602 ret);
604 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
605 if (ret)
606 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
607 ret);
609 da830_evm_usb_init();
611 soc_info->emac_pdata->rmii_en = 1;
612 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
614 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
615 if (ret)
616 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
617 ret);
619 ret = da8xx_register_emac();
620 if (ret)
621 pr_warning("da830_evm_init: emac registration failed: %d\n",
622 ret);
624 ret = da8xx_register_watchdog();
625 if (ret)
626 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
627 ret);
629 davinci_serial_init(da8xx_serial_device);
630 i2c_register_board_info(1, da830_evm_i2c_devices,
631 ARRAY_SIZE(da830_evm_i2c_devices));
633 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
634 if (ret)
635 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
636 ret);
638 da8xx_register_mcasp(1, &da830_evm_snd_data);
640 da830_evm_init_mmc();
642 ret = da8xx_register_rtc();
643 if (ret)
644 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
646 ret = spi_register_board_info(da830evm_spi_info,
647 ARRAY_SIZE(da830evm_spi_info));
648 if (ret)
649 pr_warn("%s: spi info registration failed: %d\n", __func__,
650 ret);
652 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
653 if (ret)
654 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
655 ret);
658 #ifdef CONFIG_SERIAL_8250_CONSOLE
659 static int __init da830_evm_console_init(void)
661 if (!machine_is_davinci_da830_evm())
662 return 0;
664 return add_preferred_console("ttyS", 2, "115200");
666 console_initcall(da830_evm_console_init);
667 #endif
669 static void __init da830_evm_map_io(void)
671 da830_init();
674 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
675 .atag_offset = 0x100,
676 .map_io = da830_evm_map_io,
677 .init_irq = cp_intc_init,
678 .init_time = davinci_timer_init,
679 .init_machine = da830_evm_init,
680 .init_late = davinci_init_late,
681 .dma_zone_size = SZ_128M,
682 .restart = da8xx_restart,
683 MACHINE_END