arch/arm/mach-davinci/devices-tnetv107x.c

   1 /*
   2  * Texas Instruments TNETV107X SoC devices
   3  *
   4  * Copyright (C) 2010 Texas Instruments
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation version 2.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/clk.h>
  20 #include <linux/slab.h>
  21 #include <linux/platform_data/edma.h>
  22
  23 #include <mach/common.h>
  24 #include <mach/irqs.h>
  25 #include <mach/tnetv107x.h>
  26
  27 #include "clock.h"
  28
  29 /* Base addresses for on-chip devices */
  30 #define TNETV107X_TPCC_BASE                     0x01c00000
  31 #define TNETV107X_TPTC0_BASE                    0x01c10000
  32 #define TNETV107X_TPTC1_BASE                    0x01c10400
  33 #define TNETV107X_WDOG_BASE                     0x08086700
  34 #define TNETV107X_TSC_BASE                      0x08088500
  35 #define TNETV107X_SDIO0_BASE                    0x08088700
  36 #define TNETV107X_SDIO1_BASE                    0x08088800
  37 #define TNETV107X_KEYPAD_BASE                   0x08088a00
  38 #define TNETV107X_SSP_BASE                      0x08088c00
  39 #define TNETV107X_ASYNC_EMIF_CNTRL_BASE         0x08200000
  40 #define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE      0x30000000
  41 #define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE      0x40000000
  42 #define TNETV107X_ASYNC_EMIF_DATA_CE2_BASE      0x44000000
  43 #define TNETV107X_ASYNC_EMIF_DATA_CE3_BASE      0x48000000
  44
  45 /* TNETV107X specific EDMA3 information */
  46 #define EDMA_TNETV107X_NUM_DMACH        64
  47 #define EDMA_TNETV107X_NUM_TCC          64
  48 #define EDMA_TNETV107X_NUM_PARAMENTRY   128
  49 #define EDMA_TNETV107X_NUM_EVQUE        2
  50 #define EDMA_TNETV107X_NUM_TC           2
  51 #define EDMA_TNETV107X_CHMAP_EXIST      0
  52 #define EDMA_TNETV107X_NUM_REGIONS      4
  53 #define TNETV107X_DMACH2EVENT_MAP0      0x3C0CE000u
  54 #define TNETV107X_DMACH2EVENT_MAP1      0x000FFFFFu
  55
  56 #define TNETV107X_DMACH_SDIO0_RX                26
  57 #define TNETV107X_DMACH_SDIO0_TX                27
  58 #define TNETV107X_DMACH_SDIO1_RX                28
  59 #define TNETV107X_DMACH_SDIO1_TX                29
  60
  61 static s8 edma_tc_mapping[][2] = {
  62         /* event queue no       TC no   */
  63         {        0,              0      },
  64         {        1,              1      },
  65         {       -1,             -1      }
  66 };
  67
  68 static s8 edma_priority_mapping[][2] = {
  69         /* event queue no       Prio    */
  70         {        0,              3      },
  71         {        1,              7      },
  72         {       -1,             -1      }
  73 };
  74
  75 static struct edma_soc_info edma_cc0_info = {
  76         .n_channel              = EDMA_TNETV107X_NUM_DMACH,
  77         .n_region               = EDMA_TNETV107X_NUM_REGIONS,
  78         .n_slot                 = EDMA_TNETV107X_NUM_PARAMENTRY,
  79         .n_tc                   = EDMA_TNETV107X_NUM_TC,
  80         .n_cc                   = 1,
  81         .queue_tc_mapping       = edma_tc_mapping,
  82         .queue_priority_mapping = edma_priority_mapping,
  83         .default_queue          = EVENTQ_1,
  84 };
  85
  86 static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
  87         &edma_cc0_info,
  88 };
  89
  90 static struct resource edma_resources[] = {
  91         {
  92                 .name   = "edma_cc0",
  93                 .start  = TNETV107X_TPCC_BASE,
  94                 .end    = TNETV107X_TPCC_BASE + SZ_32K - 1,
  95                 .flags  = IORESOURCE_MEM,
  96         },
  97         {
  98                 .name   = "edma_tc0",
  99                 .start  = TNETV107X_TPTC0_BASE,
 100                 .end    = TNETV107X_TPTC0_BASE + SZ_1K - 1,
 101                 .flags  = IORESOURCE_MEM,
 102         },
 103         {
 104                 .name   = "edma_tc1",
 105                 .start  = TNETV107X_TPTC1_BASE,
 106                 .end    = TNETV107X_TPTC1_BASE + SZ_1K - 1,
 107                 .flags  = IORESOURCE_MEM,
 108         },
 109         {
 110                 .name   = "edma0",
 111                 .start  = IRQ_TNETV107X_TPCC,
 112                 .flags  = IORESOURCE_IRQ,
 113         },
 114         {
 115                 .name   = "edma0_err",
 116                 .start  = IRQ_TNETV107X_TPCC_ERR,
 117                 .flags  = IORESOURCE_IRQ,
 118         },
 119 };
 120
 121 static struct platform_device edma_device = {
 122         .name           = "edma",
 123         .id             = -1,
 124         .num_resources  = ARRAY_SIZE(edma_resources),
 125         .resource       = edma_resources,
 126         .dev.platform_data = tnetv107x_edma_info,
 127 };
 128
 129 static struct plat_serial8250_port serial0_platform_data[] = {
 130         {
 131                 .mapbase        = TNETV107X_UART0_BASE,
 132                 .irq            = IRQ_TNETV107X_UART0,
 133                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 134                                         UPF_FIXED_TYPE | UPF_IOREMAP,
 135                 .type           = PORT_AR7,
 136                 .iotype         = UPIO_MEM32,
 137                 .regshift       = 2,
 138         },
 139         {
 140                 .flags  = 0,
 141         }
 142 };
 143 static struct plat_serial8250_port serial1_platform_data[] = {
 144         {
 145                 .mapbase        = TNETV107X_UART1_BASE,
 146                 .irq            = IRQ_TNETV107X_UART1,
 147                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 148                                         UPF_FIXED_TYPE | UPF_IOREMAP,
 149                 .type           = PORT_AR7,
 150                 .iotype         = UPIO_MEM32,
 151                 .regshift       = 2,
 152         },
 153         {
 154                 .flags  = 0,
 155         }
 156 };
 157 static struct plat_serial8250_port serial2_platform_data[] = {
 158         {
 159                 .mapbase        = TNETV107X_UART2_BASE,
 160                 .irq            = IRQ_TNETV107X_UART2,
 161                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
 162                                         UPF_FIXED_TYPE | UPF_IOREMAP,
 163                 .type           = PORT_AR7,
 164                 .iotype         = UPIO_MEM32,
 165                 .regshift       = 2,
 166         },
 167         {
 168                 .flags  = 0,
 169         }
 170 };
 171
 172
 173 struct platform_device tnetv107x_serial_device[] = {
 174         {
 175                 .name                   = "serial8250",
 176                 .id                     = PLAT8250_DEV_PLATFORM,
 177                 .dev.platform_data      = serial0_platform_data,
 178         },
 179         {
 180                 .name                   = "serial8250",
 181                 .id                     = PLAT8250_DEV_PLATFORM1,
 182                 .dev.platform_data      = serial1_platform_data,
 183         },
 184         {
 185                 .name                   = "serial8250",
 186                 .id                     = PLAT8250_DEV_PLATFORM2,
 187                 .dev.platform_data      = serial2_platform_data,
 188         },
 189         {
 190         }
 191 };
 192
 193 static struct resource mmc0_resources[] = {
 194         { /* Memory mapped registers */
 195                 .start  = TNETV107X_SDIO0_BASE,
 196                 .end    = TNETV107X_SDIO0_BASE + 0x0ff,
 197                 .flags  = IORESOURCE_MEM
 198         },
 199         { /* MMC interrupt */
 200                 .start  = IRQ_TNETV107X_MMC0,
 201                 .flags  = IORESOURCE_IRQ
 202         },
 203         { /* SDIO interrupt */
 204                 .start  = IRQ_TNETV107X_SDIO0,
 205                 .flags  = IORESOURCE_IRQ
 206         },
 207         { /* DMA RX */
 208                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_RX),
 209                 .flags  = IORESOURCE_DMA
 210         },
 211         { /* DMA TX */
 212                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO0_TX),
 213                 .flags  = IORESOURCE_DMA
 214         },
 215 };
 216
 217 static struct resource mmc1_resources[] = {
 218         { /* Memory mapped registers */
 219                 .start  = TNETV107X_SDIO1_BASE,
 220                 .end    = TNETV107X_SDIO1_BASE + 0x0ff,
 221                 .flags  = IORESOURCE_MEM
 222         },
 223         { /* MMC interrupt */
 224                 .start  = IRQ_TNETV107X_MMC1,
 225                 .flags  = IORESOURCE_IRQ
 226         },
 227         { /* SDIO interrupt */
 228                 .start  = IRQ_TNETV107X_SDIO1,
 229                 .flags  = IORESOURCE_IRQ
 230         },
 231         { /* DMA RX */
 232                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_RX),
 233                 .flags  = IORESOURCE_DMA
 234         },
 235         { /* DMA TX */
 236                 .start  = EDMA_CTLR_CHAN(0, TNETV107X_DMACH_SDIO1_TX),
 237                 .flags  = IORESOURCE_DMA
 238         },
 239 };
 240
 241 static u64 mmc0_dma_mask = DMA_BIT_MASK(32);
 242 static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
 243
 244 static struct platform_device mmc_devices[2] = {
 245         {
 246                 .name           = "dm6441-mmc",
 247                 .id             = 0,
 248                 .dev            = {
 249                         .dma_mask               = &mmc0_dma_mask,
 250                         .coherent_dma_mask      = DMA_BIT_MASK(32),
 251                 },
 252                 .num_resources  = ARRAY_SIZE(mmc0_resources),
 253                 .resource       = mmc0_resources
 254         },
 255         {
 256                 .name           = "dm6441-mmc",
 257                 .id             = 1,
 258                 .dev            = {
 259                         .dma_mask               = &mmc1_dma_mask,
 260                         .coherent_dma_mask      = DMA_BIT_MASK(32),
 261                 },
 262                 .num_resources  = ARRAY_SIZE(mmc1_resources),
 263                 .resource       = mmc1_resources
 264         },
 265 };
 266
 267 static const u32 emif_windows[] = {
 268         TNETV107X_ASYNC_EMIF_DATA_CE0_BASE, TNETV107X_ASYNC_EMIF_DATA_CE1_BASE,
 269         TNETV107X_ASYNC_EMIF_DATA_CE2_BASE, TNETV107X_ASYNC_EMIF_DATA_CE3_BASE,
 270 };
 271
 272 static const u32 emif_window_sizes[] = { SZ_256M, SZ_64M, SZ_64M, SZ_64M };
 273
 274 static struct resource wdt_resources[] = {
 275         {
 276                 .start  = TNETV107X_WDOG_BASE,
 277                 .end    = TNETV107X_WDOG_BASE + SZ_4K - 1,
 278                 .flags  = IORESOURCE_MEM,
 279         },
 280 };
 281
 282 struct platform_device tnetv107x_wdt_device = {
 283         .name           = "tnetv107x_wdt",
 284         .id             = 0,
 285         .num_resources  = ARRAY_SIZE(wdt_resources),
 286         .resource       = wdt_resources,
 287 };
 288
 289 static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
 290 {
 291         struct resource res[2];
 292         struct platform_device *pdev;
 293         u32     range;
 294         int     ret;
 295
 296         /* Figure out the resource range from the ale/cle masks */
 297         range = max(data->mask_cle, data->mask_ale);
 298         range = PAGE_ALIGN(range + 4) - 1;
 299
 300         if (range >= emif_window_sizes[chipsel])
 301                 return -EINVAL;
 302
 303         pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
 304         if (!pdev)
 305                 return -ENOMEM;
 306
 307         pdev->name              = "davinci_nand";
 308         pdev->id                = chipsel;
 309         pdev->dev.platform_data = data;
 310
 311         memset(res, 0, sizeof(res));
 312
 313         res[0].start    = emif_windows[chipsel];
 314         res[0].end      = res[0].start + range;
 315         res[0].flags    = IORESOURCE_MEM;
 316
 317         res[1].start    = TNETV107X_ASYNC_EMIF_CNTRL_BASE;
 318         res[1].end      = res[1].start + SZ_4K - 1;
 319         res[1].flags    = IORESOURCE_MEM;
 320
 321         ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
 322         if (ret < 0) {
 323                 kfree(pdev);
 324                 return ret;
 325         }
 326
 327         return platform_device_register(pdev);
 328 }
 329
 330 static struct resource keypad_resources[] = {
 331         {
 332                 .start  = TNETV107X_KEYPAD_BASE,
 333                 .end    = TNETV107X_KEYPAD_BASE + 0xff,
 334                 .flags  = IORESOURCE_MEM,
 335         },
 336         {
 337                 .start  = IRQ_TNETV107X_KEYPAD,
 338                 .flags  = IORESOURCE_IRQ,
 339                 .name   = "press",
 340         },
 341         {
 342                 .start  = IRQ_TNETV107X_KEYPAD_FREE,
 343                 .flags  = IORESOURCE_IRQ,
 344                 .name   = "release",
 345         },
 346 };
 347
 348 static struct platform_device keypad_device = {
 349         .name           = "tnetv107x-keypad",
 350         .num_resources  = ARRAY_SIZE(keypad_resources),
 351         .resource       = keypad_resources,
 352 };
 353
 354 static struct resource tsc_resources[] = {
 355         {
 356                 .start  = TNETV107X_TSC_BASE,
 357                 .end    = TNETV107X_TSC_BASE + 0xff,
 358                 .flags  = IORESOURCE_MEM,
 359         },
 360         {
 361                 .start  = IRQ_TNETV107X_TSC,
 362                 .flags  = IORESOURCE_IRQ,
 363         },
 364 };
 365
 366 static struct platform_device tsc_device = {
 367         .name           = "tnetv107x-ts",
 368         .num_resources  = ARRAY_SIZE(tsc_resources),
 369         .resource       = tsc_resources,
 370 };
 371
 372 static struct resource ssp_resources[] = {
 373         {
 374                 .start  = TNETV107X_SSP_BASE,
 375                 .end    = TNETV107X_SSP_BASE + 0x1ff,
 376                 .flags  = IORESOURCE_MEM,
 377         },
 378         {
 379                 .start  = IRQ_TNETV107X_SSP,
 380                 .flags  = IORESOURCE_IRQ,
 381         },
 382 };
 383
 384 static struct platform_device ssp_device = {
 385         .name           = "ti-ssp",
 386         .id             = -1,
 387         .num_resources  = ARRAY_SIZE(ssp_resources),
 388         .resource       = ssp_resources,
 389 };
 390
 391 void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
 392 {
 393         int i, error;
 394         struct clk *tsc_clk;
 395
 396         /*
 397          * The reset defaults for tnetv107x tsc clock divider is set too high.
 398          * This forces the clock down to a range that allows the ADC to
 399          * complete sample conversion in time.
 400          */
 401         tsc_clk = clk_get(NULL, "sys_tsc_clk");
 402         if (!IS_ERR(tsc_clk)) {
 403                 error = clk_set_rate(tsc_clk, 5000000);
 404                 WARN_ON(error < 0);
 405                 clk_put(tsc_clk);
 406         }
 407
 408         platform_device_register(&edma_device);
 409         platform_device_register(&tnetv107x_wdt_device);
 410         platform_device_register(&tsc_device);
 411
 412         if (info->serial_config)
 413                 davinci_serial_init(tnetv107x_serial_device);
 414
 415         for (i = 0; i < 2; i++)
 416                 if (info->mmc_config[i]) {
 417                         mmc_devices[i].dev.platform_data = info->mmc_config[i];
 418                         platform_device_register(&mmc_devices[i]);
 419                 }
 420
 421         for (i = 0; i < 4; i++)
 422                 if (info->nand_config[i])
 423                         nand_init(i, info->nand_config[i]);
 424
 425         if (info->keypad_config) {
 426                 keypad_device.dev.platform_data = info->keypad_config;
 427                 platform_device_register(&keypad_device);
 428         }
 429
 430         if (info->ssp_config) {
 431                 ssp_device.dev.platform_data = info->ssp_config;
 432                 platform_device_register(&ssp_device);
 433         }
 434 }