x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / arm / mach-davinci / include / mach / serial.h
blobce402cd21fa0a6f809963d71ca3cac3c6f650131
1 /*
2 * DaVinci serial device definitions
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
11 #ifndef __ASM_ARCH_SERIAL_H
12 #define __ASM_ARCH_SERIAL_H
14 #include <asm/memory.h>
16 #include <mach/hardware.h>
18 #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
19 #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
20 #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
22 #define DA8XX_UART0_BASE (IO_PHYS + 0x042000)
23 #define DA8XX_UART1_BASE (IO_PHYS + 0x10c000)
24 #define DA8XX_UART2_BASE (IO_PHYS + 0x10d000)
26 #define TNETV107X_UART0_BASE 0x08108100
27 #define TNETV107X_UART1_BASE 0x08088400
28 #define TNETV107X_UART2_BASE 0x08108300
30 #define TNETV107X_UART0_VIRT IOMEM(0xfee08100)
31 #define TNETV107X_UART1_VIRT IOMEM(0xfed88400)
32 #define TNETV107X_UART2_VIRT IOMEM(0xfee08300)
34 /* DaVinci UART register offsets */
35 #define UART_DAVINCI_PWREMU 0x0c
36 #define UART_DM646X_SCR 0x10
37 #define UART_DM646X_SCR_TX_WATERMARK 0x08
39 #ifndef __ASSEMBLY__
40 #include <linux/platform_device.h>
42 extern int davinci_serial_init(struct platform_device *);
43 #endif
45 #endif /* __ASM_ARCH_SERIAL_H */