x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / arm / mach-sa1100 / assabet.c
blobc9808c6841526204144e36a273596e6955696dc8
1 /*
2 * linux/arch/arm/mach-sa1100/assabet.c
4 * Author: Nicolas Pitre
6 * This file contains all Assabet-specific tweaks.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/ioport.h>
17 #include <linux/platform_data/sa11x0-serial.h>
18 #include <linux/serial_core.h>
19 #include <linux/platform_device.h>
20 #include <linux/mfd/ucb1x00.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/delay.h>
24 #include <linux/mm.h>
25 #include <linux/leds.h>
26 #include <linux/slab.h>
28 #include <video/sa1100fb.h>
30 #include <mach/hardware.h>
31 #include <asm/mach-types.h>
32 #include <asm/setup.h>
33 #include <asm/page.h>
34 #include <asm/pgtable-hwdef.h>
35 #include <asm/pgtable.h>
36 #include <asm/tlbflush.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/flash.h>
40 #include <asm/mach/irda.h>
41 #include <asm/mach/map.h>
42 #include <mach/assabet.h>
43 #include <linux/platform_data/mfd-mcp-sa11x0.h>
44 #include <mach/irqs.h>
46 #include "generic.h"
48 #define ASSABET_BCR_DB1110 \
49 (ASSABET_BCR_SPK_OFF | \
50 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
51 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
52 ASSABET_BCR_IRDA_MD0)
54 #define ASSABET_BCR_DB1111 \
55 (ASSABET_BCR_SPK_OFF | \
56 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
57 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
58 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
59 ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
61 unsigned long SCR_value = ASSABET_SCR_INIT;
62 EXPORT_SYMBOL(SCR_value);
64 static unsigned long BCR_value = ASSABET_BCR_DB1110;
66 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
68 unsigned long flags;
70 local_irq_save(flags);
71 BCR_value = (BCR_value & ~mask) | val;
72 ASSABET_BCR = BCR_value;
73 local_irq_restore(flags);
76 EXPORT_SYMBOL(ASSABET_BCR_frob);
78 static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
80 if (state == UCB_RST_PROBE)
81 ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
86 * Assabet flash support code.
89 #ifdef ASSABET_REV_4
91 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
93 static struct mtd_partition assabet_partitions[] = {
95 .name = "bootloader",
96 .size = 0x00020000,
97 .offset = 0,
98 .mask_flags = MTD_WRITEABLE,
99 }, {
100 .name = "bootloader params",
101 .size = 0x00020000,
102 .offset = MTDPART_OFS_APPEND,
103 .mask_flags = MTD_WRITEABLE,
104 }, {
105 .name = "jffs",
106 .size = MTDPART_SIZ_FULL,
107 .offset = MTDPART_OFS_APPEND,
110 #else
112 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
114 static struct mtd_partition assabet_partitions[] = {
116 .name = "bootloader",
117 .size = 0x00040000,
118 .offset = 0,
119 .mask_flags = MTD_WRITEABLE,
120 }, {
121 .name = "bootloader params",
122 .size = 0x00040000,
123 .offset = MTDPART_OFS_APPEND,
124 .mask_flags = MTD_WRITEABLE,
125 }, {
126 .name = "jffs",
127 .size = MTDPART_SIZ_FULL,
128 .offset = MTDPART_OFS_APPEND,
131 #endif
133 static struct flash_platform_data assabet_flash_data = {
134 .map_name = "cfi_probe",
135 .parts = assabet_partitions,
136 .nr_parts = ARRAY_SIZE(assabet_partitions),
139 static struct resource assabet_flash_resources[] = {
140 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
141 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
146 * Assabet IrDA support code.
149 static int assabet_irda_set_power(struct device *dev, unsigned int state)
151 static unsigned int bcr_state[4] = {
152 ASSABET_BCR_IRDA_MD0,
153 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
154 ASSABET_BCR_IRDA_MD1,
158 if (state < 4) {
159 state = bcr_state[state];
160 ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
161 ASSABET_BCR_IRDA_MD0));
162 ASSABET_BCR_set(state);
164 return 0;
167 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
169 if (speed < 4000000)
170 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
171 else
172 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
175 static struct irda_platform_data assabet_irda_data = {
176 .set_power = assabet_irda_set_power,
177 .set_speed = assabet_irda_set_speed,
180 static struct ucb1x00_plat_data assabet_ucb1x00_data = {
181 .reset = assabet_ucb1x00_reset,
182 .gpio_base = -1,
185 static struct mcp_plat_data assabet_mcp_data = {
186 .mccr0 = MCCR0_ADM,
187 .sclk_rate = 11981000,
188 .codec_pdata = &assabet_ucb1x00_data,
191 static void assabet_lcd_set_visual(u32 visual)
193 u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
195 if (machine_is_assabet()) {
196 #if 1 // phase 4 or newer Assabet's
197 if (is_true_color)
198 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
199 else
200 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
201 #else
202 // older Assabet's
203 if (is_true_color)
204 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
205 else
206 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
207 #endif
211 #ifndef ASSABET_PAL_VIDEO
212 static void assabet_lcd_backlight_power(int on)
214 if (on)
215 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
216 else
217 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
221 * Turn on/off the backlight. When turning the backlight on, we wait
222 * 500us after turning it on so we don't cause the supplies to droop
223 * when we enable the LCD controller (and cause a hard reset.)
225 static void assabet_lcd_power(int on)
227 if (on) {
228 ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
229 udelay(500);
230 } else
231 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
235 * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
236 * takes an RGB666 signal, but we provide it with an RGB565 signal
237 * instead (def_rgb_16).
239 static struct sa1100fb_mach_info lq039q2ds54_info = {
240 .pixclock = 171521, .bpp = 16,
241 .xres = 320, .yres = 240,
243 .hsync_len = 5, .vsync_len = 1,
244 .left_margin = 61, .upper_margin = 3,
245 .right_margin = 9, .lower_margin = 0,
247 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
249 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
250 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
252 .backlight_power = assabet_lcd_backlight_power,
253 .lcd_power = assabet_lcd_power,
254 .set_visual = assabet_lcd_set_visual,
256 #else
257 static void assabet_pal_backlight_power(int on)
259 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
262 static void assabet_pal_power(int on)
264 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
267 static struct sa1100fb_mach_info pal_info = {
268 .pixclock = 67797, .bpp = 16,
269 .xres = 640, .yres = 512,
271 .hsync_len = 64, .vsync_len = 6,
272 .left_margin = 125, .upper_margin = 70,
273 .right_margin = 115, .lower_margin = 36,
275 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
276 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
278 .backlight_power = assabet_pal_backlight_power,
279 .lcd_power = assabet_pal_power,
280 .set_visual = assabet_lcd_set_visual,
282 #endif
284 #ifdef CONFIG_ASSABET_NEPONSET
285 static struct resource neponset_resources[] = {
286 DEFINE_RES_MEM(0x10000000, 0x08000000),
287 DEFINE_RES_MEM(0x18000000, 0x04000000),
288 DEFINE_RES_MEM(0x40000000, SZ_8K),
289 DEFINE_RES_IRQ(IRQ_GPIO25),
291 #endif
293 static void __init assabet_init(void)
296 * Ensure that the power supply is in "high power" mode.
298 GPSR = GPIO_GPIO16;
299 GPDR |= GPIO_GPIO16;
302 * Ensure that these pins are set as outputs and are driving
303 * logic 0. This ensures that we won't inadvertently toggle
304 * the WS latch in the CPLD, and we don't float causing
305 * excessive power drain. --rmk
307 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
308 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
311 * Also set GPIO27 as an output; this is used to clock UART3
312 * via the FPGA and as otherwise has no pullups or pulldowns,
313 * so stop it floating.
315 GPCR = GPIO_GPIO27;
316 GPDR |= GPIO_GPIO27;
319 * Set up registers for sleep mode.
321 PWER = PWER_GPIO0;
322 PGSR = 0;
323 PCFR = 0;
324 PSDR = 0;
325 PPDR |= PPC_TXD3 | PPC_TXD1;
326 PPSR |= PPC_TXD3 | PPC_TXD1;
328 sa11x0_ppc_configure_mcp();
330 if (machine_has_neponset()) {
332 * Angel sets this, but other bootloaders may not.
334 * This must precede any driver calls to BCR_set()
335 * or BCR_clear().
337 ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
339 #ifndef CONFIG_ASSABET_NEPONSET
340 printk( "Warning: Neponset detected but full support "
341 "hasn't been configured in the kernel\n" );
342 #else
343 platform_device_register_simple("neponset", 0,
344 neponset_resources, ARRAY_SIZE(neponset_resources));
345 #endif
348 #ifndef ASSABET_PAL_VIDEO
349 sa11x0_register_lcd(&lq039q2ds54_info);
350 #else
351 sa11x0_register_lcd(&pal_video);
352 #endif
353 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
354 ARRAY_SIZE(assabet_flash_resources));
355 sa11x0_register_irda(&assabet_irda_data);
356 sa11x0_register_mcp(&assabet_mcp_data);
360 * On Assabet, we must probe for the Neponset board _before_
361 * paging_init() has occurred to actually determine the amount
362 * of RAM available. To do so, we map the appropriate IO section
363 * in the page table here in order to access GPIO registers.
365 static void __init map_sa1100_gpio_regs( void )
367 unsigned long phys = __PREG(GPLR) & PMD_MASK;
368 unsigned long virt = (unsigned long)io_p2v(phys);
369 int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
370 pmd_t *pmd;
372 pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
373 *pmd = __pmd(phys | prot);
374 flush_pmd_entry(pmd);
378 * Read System Configuration "Register"
379 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
380 * User's Guide", section 4.4.1)
382 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
383 * to set up the serial port for decompression status messages. We
384 * repeat it here because the kernel may not be loaded as a zImage, and
385 * also because it's a hassle to communicate the SCR value to the kernel
386 * from the decompressor.
388 * Note that IRQs are guaranteed to be disabled.
390 static void __init get_assabet_scr(void)
392 unsigned long uninitialized_var(scr), i;
394 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
395 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
396 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
397 for(i = 100; i--; ) /* Read GPIO 9:2 */
398 scr = GPLR;
399 GPDR |= 0x3fc; /* restore correct pin direction */
400 scr &= 0x3fc; /* save as system configuration byte. */
401 SCR_value = scr;
404 static void __init
405 fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
407 /* This must be done before any call to machine_has_neponset() */
408 map_sa1100_gpio_regs();
409 get_assabet_scr();
411 if (machine_has_neponset())
412 printk("Neponset expansion board detected\n");
416 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
418 if (port->mapbase == _Ser1UTCR0) {
419 if (state)
420 ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
421 ASSABET_BCR_COM_RTS |
422 ASSABET_BCR_COM_DTR);
423 else
424 ASSABET_BCR_set(ASSABET_BCR_RS232EN |
425 ASSABET_BCR_COM_RTS |
426 ASSABET_BCR_COM_DTR);
431 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
432 * and UART3 (radio module). We only handle them for UART1 here.
434 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
436 if (port->mapbase == _Ser1UTCR0) {
437 u_int set = 0, clear = 0;
439 if (mctrl & TIOCM_RTS)
440 clear |= ASSABET_BCR_COM_RTS;
441 else
442 set |= ASSABET_BCR_COM_RTS;
444 if (mctrl & TIOCM_DTR)
445 clear |= ASSABET_BCR_COM_DTR;
446 else
447 set |= ASSABET_BCR_COM_DTR;
449 ASSABET_BCR_clear(clear);
450 ASSABET_BCR_set(set);
454 static u_int assabet_get_mctrl(struct uart_port *port)
456 u_int ret = 0;
457 u_int bsr = ASSABET_BSR;
459 /* need 2 reads to read current value */
460 bsr = ASSABET_BSR;
462 if (port->mapbase == _Ser1UTCR0) {
463 if (bsr & ASSABET_BSR_COM_DCD)
464 ret |= TIOCM_CD;
465 if (bsr & ASSABET_BSR_COM_CTS)
466 ret |= TIOCM_CTS;
467 if (bsr & ASSABET_BSR_COM_DSR)
468 ret |= TIOCM_DSR;
469 } else if (port->mapbase == _Ser3UTCR0) {
470 if (bsr & ASSABET_BSR_RAD_DCD)
471 ret |= TIOCM_CD;
472 if (bsr & ASSABET_BSR_RAD_CTS)
473 ret |= TIOCM_CTS;
474 if (bsr & ASSABET_BSR_RAD_DSR)
475 ret |= TIOCM_DSR;
476 if (bsr & ASSABET_BSR_RAD_RI)
477 ret |= TIOCM_RI;
478 } else {
479 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
482 return ret;
485 static struct sa1100_port_fns assabet_port_fns __initdata = {
486 .set_mctrl = assabet_set_mctrl,
487 .get_mctrl = assabet_get_mctrl,
488 .pm = assabet_uart_pm,
491 static struct map_desc assabet_io_desc[] __initdata = {
492 { /* Board Control Register */
493 .virtual = 0xf1000000,
494 .pfn = __phys_to_pfn(0x12000000),
495 .length = 0x00100000,
496 .type = MT_DEVICE
497 }, { /* MQ200 */
498 .virtual = 0xf2800000,
499 .pfn = __phys_to_pfn(0x4b800000),
500 .length = 0x00800000,
501 .type = MT_DEVICE
505 static void __init assabet_map_io(void)
507 sa1100_map_io();
508 iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
511 * Set SUS bit in SDCR0 so serial port 1 functions.
512 * Its called GPCLKR0 in my SA1110 manual.
514 Ser1SDCR0 |= SDCR0_SUS;
515 MSC1 = (MSC1 & ~0xffff) |
516 MSC_NonBrst | MSC_32BitStMem |
517 MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
519 if (!machine_has_neponset())
520 sa1100_register_uart_fns(&assabet_port_fns);
523 * When Neponset is attached, the first UART should be
524 * UART3. That's what Angel is doing and many documents
525 * are stating this.
527 * We do the Neponset mapping even if Neponset support
528 * isn't compiled in so the user will still get something on
529 * the expected physical serial port.
531 * We no longer do this; not all boot loaders support it,
532 * and UART3 appears to be somewhat unreliable with blob.
534 sa1100_register_uart(0, 1);
535 sa1100_register_uart(2, 3);
538 /* LEDs */
539 #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
540 struct assabet_led {
541 struct led_classdev cdev;
542 u32 mask;
546 * The triggers lines up below will only be used if the
547 * LED triggers are compiled in.
549 static const struct {
550 const char *name;
551 const char *trigger;
552 } assabet_leds[] = {
553 { "assabet:red", "cpu0",},
554 { "assabet:green", "heartbeat", },
558 * The LED control in Assabet is reversed:
559 * - setting bit means turn off LED
560 * - clearing bit means turn on LED
562 static void assabet_led_set(struct led_classdev *cdev,
563 enum led_brightness b)
565 struct assabet_led *led = container_of(cdev,
566 struct assabet_led, cdev);
568 if (b != LED_OFF)
569 ASSABET_BCR_clear(led->mask);
570 else
571 ASSABET_BCR_set(led->mask);
574 static enum led_brightness assabet_led_get(struct led_classdev *cdev)
576 struct assabet_led *led = container_of(cdev,
577 struct assabet_led, cdev);
579 return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
582 static int __init assabet_leds_init(void)
584 int i;
586 if (!machine_is_assabet())
587 return -ENODEV;
589 for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
590 struct assabet_led *led;
592 led = kzalloc(sizeof(*led), GFP_KERNEL);
593 if (!led)
594 break;
596 led->cdev.name = assabet_leds[i].name;
597 led->cdev.brightness_set = assabet_led_set;
598 led->cdev.brightness_get = assabet_led_get;
599 led->cdev.default_trigger = assabet_leds[i].trigger;
601 if (!i)
602 led->mask = ASSABET_BCR_LED_RED;
603 else
604 led->mask = ASSABET_BCR_LED_GREEN;
606 if (led_classdev_register(NULL, &led->cdev) < 0) {
607 kfree(led);
608 break;
612 return 0;
616 * Since we may have triggers on any subsystem, defer registration
617 * until after subsystem_init.
619 fs_initcall(assabet_leds_init);
620 #endif
622 MACHINE_START(ASSABET, "Intel-Assabet")
623 .atag_offset = 0x100,
624 .fixup = fixup_assabet,
625 .map_io = assabet_map_io,
626 .nr_irqs = SA1100_NR_IRQS,
627 .init_irq = sa1100_init_irq,
628 .init_time = sa1100_timer_init,
629 .init_machine = assabet_init,
630 .init_late = sa11x0_init_late,
631 #ifdef CONFIG_SA1111
632 .dma_zone_size = SZ_1M,
633 #endif
634 .restart = sa11x0_restart,
635 MACHINE_END