x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / hexagon / include / asm / cache.h
blobf4ca594fdf8c258a13d1d2e99849a820041442f8
1 /*
2 * Cache definitions for the Hexagon architecture
4 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA.
21 #ifndef __ASM_CACHE_H
22 #define __ASM_CACHE_H
24 /* Bytes per L1 cache line */
25 #define L1_CACHE_SHIFT (5)
26 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
28 #define __cacheline_aligned __aligned(L1_CACHE_BYTES)
29 #define ____cacheline_aligned __aligned(L1_CACHE_BYTES)
31 /* See http://kerneltrap.org/node/15100 */
32 #define __read_mostly
34 #endif