x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / m68k / kernel / traps.c
blob88fcd8c70e7bed8ac311a718aa9c643a2f3370a9
1 /*
2 * linux/arch/m68k/kernel/traps.c
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
18 * Sets up all exception vectors
21 #include <linux/sched.h>
22 #include <linux/signal.h>
23 #include <linux/kernel.h>
24 #include <linux/mm.h>
25 #include <linux/module.h>
26 #include <linux/user.h>
27 #include <linux/string.h>
28 #include <linux/linkage.h>
29 #include <linux/init.h>
30 #include <linux/ptrace.h>
31 #include <linux/kallsyms.h>
33 #include <asm/setup.h>
34 #include <asm/fpu.h>
35 #include <asm/uaccess.h>
36 #include <asm/traps.h>
37 #include <asm/pgalloc.h>
38 #include <asm/machdep.h>
39 #include <asm/siginfo.h>
42 static const char *vec_names[] = {
43 [VEC_RESETSP] = "RESET SP",
44 [VEC_RESETPC] = "RESET PC",
45 [VEC_BUSERR] = "BUS ERROR",
46 [VEC_ADDRERR] = "ADDRESS ERROR",
47 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
48 [VEC_ZERODIV] = "ZERO DIVIDE",
49 [VEC_CHK] = "CHK",
50 [VEC_TRAP] = "TRAPcc",
51 [VEC_PRIV] = "PRIVILEGE VIOLATION",
52 [VEC_TRACE] = "TRACE",
53 [VEC_LINE10] = "LINE 1010",
54 [VEC_LINE11] = "LINE 1111",
55 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
56 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
57 [VEC_FORMAT] = "FORMAT ERROR",
58 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
59 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
60 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
61 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
62 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
63 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
64 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
65 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
66 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
67 [VEC_SPUR] = "SPURIOUS INTERRUPT",
68 [VEC_INT1] = "LEVEL 1 INT",
69 [VEC_INT2] = "LEVEL 2 INT",
70 [VEC_INT3] = "LEVEL 3 INT",
71 [VEC_INT4] = "LEVEL 4 INT",
72 [VEC_INT5] = "LEVEL 5 INT",
73 [VEC_INT6] = "LEVEL 6 INT",
74 [VEC_INT7] = "LEVEL 7 INT",
75 [VEC_SYS] = "SYSCALL",
76 [VEC_TRAP1] = "TRAP #1",
77 [VEC_TRAP2] = "TRAP #2",
78 [VEC_TRAP3] = "TRAP #3",
79 [VEC_TRAP4] = "TRAP #4",
80 [VEC_TRAP5] = "TRAP #5",
81 [VEC_TRAP6] = "TRAP #6",
82 [VEC_TRAP7] = "TRAP #7",
83 [VEC_TRAP8] = "TRAP #8",
84 [VEC_TRAP9] = "TRAP #9",
85 [VEC_TRAP10] = "TRAP #10",
86 [VEC_TRAP11] = "TRAP #11",
87 [VEC_TRAP12] = "TRAP #12",
88 [VEC_TRAP13] = "TRAP #13",
89 [VEC_TRAP14] = "TRAP #14",
90 [VEC_TRAP15] = "TRAP #15",
91 [VEC_FPBRUC] = "FPCP BSUN",
92 [VEC_FPIR] = "FPCP INEXACT",
93 [VEC_FPDIVZ] = "FPCP DIV BY 0",
94 [VEC_FPUNDER] = "FPCP UNDERFLOW",
95 [VEC_FPOE] = "FPCP OPERAND ERROR",
96 [VEC_FPOVER] = "FPCP OVERFLOW",
97 [VEC_FPNAN] = "FPCP SNAN",
98 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
99 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
100 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
101 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
102 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
103 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
104 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
105 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
106 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
109 static const char *space_names[] = {
110 [0] = "Space 0",
111 [USER_DATA] = "User Data",
112 [USER_PROGRAM] = "User Program",
113 #ifndef CONFIG_SUN3
114 [3] = "Space 3",
115 #else
116 [FC_CONTROL] = "Control",
117 #endif
118 [4] = "Space 4",
119 [SUPER_DATA] = "Super Data",
120 [SUPER_PROGRAM] = "Super Program",
121 [CPU_SPACE] = "CPU"
124 void die_if_kernel(char *,struct pt_regs *,int);
125 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
126 unsigned long error_code);
127 int send_fault_sig(struct pt_regs *regs);
129 asmlinkage void trap_c(struct frame *fp);
131 #if defined (CONFIG_M68060)
132 static inline void access_error060 (struct frame *fp)
134 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
136 #ifdef DEBUG
137 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
138 #endif
140 if (fslw & MMU060_BPE) {
141 /* branch prediction error -> clear branch cache */
142 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
143 "orl #0x00400000,%/d0\n\t"
144 "movec %/d0,%/cacr"
145 : : : "d0" );
146 /* return if there's no other error */
147 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
148 return;
151 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
152 unsigned long errorcode;
153 unsigned long addr = fp->un.fmt4.effaddr;
155 if (fslw & MMU060_MA)
156 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
158 errorcode = 1;
159 if (fslw & MMU060_DESC_ERR) {
160 __flush_tlb040_one(addr);
161 errorcode = 0;
163 if (fslw & MMU060_W)
164 errorcode |= 2;
165 #ifdef DEBUG
166 printk("errorcode = %d\n", errorcode );
167 #endif
168 do_page_fault(&fp->ptregs, addr, errorcode);
169 } else if (fslw & (MMU060_SEE)){
170 /* Software Emulation Error.
171 * fault during mem_read/mem_write in ifpsp060/os.S
173 send_fault_sig(&fp->ptregs);
174 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
175 send_fault_sig(&fp->ptregs) > 0) {
176 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
177 printk( "68060 access error, fslw=%lx\n", fslw );
178 trap_c( fp );
181 #endif /* CONFIG_M68060 */
183 #if defined (CONFIG_M68040)
184 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
186 unsigned long mmusr;
187 mm_segment_t old_fs = get_fs();
189 set_fs(MAKE_MM_SEG(wbs));
191 if (iswrite)
192 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
193 else
194 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
196 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
198 set_fs(old_fs);
200 return mmusr;
203 static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
204 unsigned long wbd)
206 int res = 0;
207 mm_segment_t old_fs = get_fs();
209 /* set_fs can not be moved, otherwise put_user() may oops */
210 set_fs(MAKE_MM_SEG(wbs));
212 switch (wbs & WBSIZ_040) {
213 case BA_SIZE_BYTE:
214 res = put_user(wbd & 0xff, (char __user *)wba);
215 break;
216 case BA_SIZE_WORD:
217 res = put_user(wbd & 0xffff, (short __user *)wba);
218 break;
219 case BA_SIZE_LONG:
220 res = put_user(wbd, (int __user *)wba);
221 break;
224 /* set_fs can not be moved, otherwise put_user() may oops */
225 set_fs(old_fs);
228 #ifdef DEBUG
229 printk("do_040writeback1, res=%d\n",res);
230 #endif
232 return res;
235 /* after an exception in a writeback the stack frame corresponding
236 * to that exception is discarded, set a few bits in the old frame
237 * to simulate what it should look like
239 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
241 fp->un.fmt7.faddr = wba;
242 fp->un.fmt7.ssw = wbs & 0xff;
243 if (wba != current->thread.faddr)
244 fp->un.fmt7.ssw |= MA_040;
247 static inline void do_040writebacks(struct frame *fp)
249 int res = 0;
250 #if 0
251 if (fp->un.fmt7.wb1s & WBV_040)
252 printk("access_error040: cannot handle 1st writeback. oops.\n");
253 #endif
255 if ((fp->un.fmt7.wb2s & WBV_040) &&
256 !(fp->un.fmt7.wb2s & WBTT_040)) {
257 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
258 fp->un.fmt7.wb2d);
259 if (res)
260 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
261 else
262 fp->un.fmt7.wb2s = 0;
265 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
266 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
267 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
268 fp->un.fmt7.wb3d);
269 if (res)
271 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
273 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
274 fp->un.fmt7.wb3s &= (~WBV_040);
275 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
276 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
278 else
279 fp->un.fmt7.wb3s = 0;
282 if (res)
283 send_fault_sig(&fp->ptregs);
287 * called from sigreturn(), must ensure userspace code didn't
288 * manipulate exception frame to circumvent protection, then complete
289 * pending writebacks
290 * we just clear TM2 to turn it into a userspace access
292 asmlinkage void berr_040cleanup(struct frame *fp)
294 fp->un.fmt7.wb2s &= ~4;
295 fp->un.fmt7.wb3s &= ~4;
297 do_040writebacks(fp);
300 static inline void access_error040(struct frame *fp)
302 unsigned short ssw = fp->un.fmt7.ssw;
303 unsigned long mmusr;
305 #ifdef DEBUG
306 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
307 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
308 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
309 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
310 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
311 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
312 #endif
314 if (ssw & ATC_040) {
315 unsigned long addr = fp->un.fmt7.faddr;
316 unsigned long errorcode;
319 * The MMU status has to be determined AFTER the address
320 * has been corrected if there was a misaligned access (MA).
322 if (ssw & MA_040)
323 addr = (addr + 7) & -8;
325 /* MMU error, get the MMUSR info for this access */
326 mmusr = probe040(!(ssw & RW_040), addr, ssw);
327 #ifdef DEBUG
328 printk("mmusr = %lx\n", mmusr);
329 #endif
330 errorcode = 1;
331 if (!(mmusr & MMU_R_040)) {
332 /* clear the invalid atc entry */
333 __flush_tlb040_one(addr);
334 errorcode = 0;
337 /* despite what documentation seems to say, RMW
338 * accesses have always both the LK and RW bits set */
339 if (!(ssw & RW_040) || (ssw & LK_040))
340 errorcode |= 2;
342 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
343 #ifdef DEBUG
344 printk("do_page_fault() !=0\n");
345 #endif
346 if (user_mode(&fp->ptregs)){
347 /* delay writebacks after signal delivery */
348 #ifdef DEBUG
349 printk(".. was usermode - return\n");
350 #endif
351 return;
353 /* disable writeback into user space from kernel
354 * (if do_page_fault didn't fix the mapping,
355 * the writeback won't do good)
357 disable_wb:
358 #ifdef DEBUG
359 printk(".. disabling wb2\n");
360 #endif
361 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
362 fp->un.fmt7.wb2s &= ~WBV_040;
363 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
364 fp->un.fmt7.wb3s &= ~WBV_040;
366 } else {
367 /* In case of a bus error we either kill the process or expect
368 * the kernel to catch the fault, which then is also responsible
369 * for cleaning up the mess.
371 current->thread.signo = SIGBUS;
372 current->thread.faddr = fp->un.fmt7.faddr;
373 if (send_fault_sig(&fp->ptregs) >= 0)
374 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
375 fp->un.fmt7.faddr);
376 goto disable_wb;
379 do_040writebacks(fp);
381 #endif /* CONFIG_M68040 */
383 #if defined(CONFIG_SUN3)
384 #include <asm/sun3mmu.h>
386 extern int mmu_emu_handle_fault (unsigned long, int, int);
388 /* sun3 version of bus_error030 */
390 static inline void bus_error030 (struct frame *fp)
392 unsigned char buserr_type = sun3_get_buserr ();
393 unsigned long addr, errorcode;
394 unsigned short ssw = fp->un.fmtb.ssw;
395 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
397 #ifdef DEBUG
398 if (ssw & (FC | FB))
399 printk ("Instruction fault at %#010lx\n",
400 ssw & FC ?
401 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
403 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
404 if (ssw & DF)
405 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
406 ssw & RW ? "read" : "write",
407 fp->un.fmtb.daddr,
408 space_names[ssw & DFC], fp->ptregs.pc);
409 #endif
412 * Check if this page should be demand-mapped. This needs to go before
413 * the testing for a bad kernel-space access (demand-mapping applies
414 * to kernel accesses too).
417 if ((ssw & DF)
418 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
419 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
420 return;
423 /* Check for kernel-space pagefault (BAD). */
424 if (fp->ptregs.sr & PS_S) {
425 /* kernel fault must be a data fault to user space */
426 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
427 // try checking the kernel mappings before surrender
428 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
429 return;
430 /* instruction fault or kernel data fault! */
431 if (ssw & (FC | FB))
432 printk ("Instruction fault at %#010lx\n",
433 fp->ptregs.pc);
434 if (ssw & DF) {
435 /* was this fault incurred testing bus mappings? */
436 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
437 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
438 send_fault_sig(&fp->ptregs);
439 return;
442 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
443 ssw & RW ? "read" : "write",
444 fp->un.fmtb.daddr,
445 space_names[ssw & DFC], fp->ptregs.pc);
447 printk ("BAD KERNEL BUSERR\n");
449 die_if_kernel("Oops", &fp->ptregs,0);
450 force_sig(SIGKILL, current);
451 return;
453 } else {
454 /* user fault */
455 if (!(ssw & (FC | FB)) && !(ssw & DF))
456 /* not an instruction fault or data fault! BAD */
457 panic ("USER BUSERR w/o instruction or data fault");
461 /* First handle the data fault, if any. */
462 if (ssw & DF) {
463 addr = fp->un.fmtb.daddr;
465 // errorcode bit 0: 0 -> no page 1 -> protection fault
466 // errorcode bit 1: 0 -> read fault 1 -> write fault
468 // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
469 // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
471 if (buserr_type & SUN3_BUSERR_PROTERR)
472 errorcode = 0x01;
473 else if (buserr_type & SUN3_BUSERR_INVALID)
474 errorcode = 0x00;
475 else {
476 #ifdef DEBUG
477 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
478 printk ("invalid %s access at %#lx from pc %#lx\n",
479 !(ssw & RW) ? "write" : "read", addr,
480 fp->ptregs.pc);
481 #endif
482 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
483 force_sig (SIGBUS, current);
484 return;
487 //todo: wtf is RM bit? --m
488 if (!(ssw & RW) || ssw & RM)
489 errorcode |= 0x02;
491 /* Handle page fault. */
492 do_page_fault (&fp->ptregs, addr, errorcode);
494 /* Retry the data fault now. */
495 return;
498 /* Now handle the instruction fault. */
500 /* Get the fault address. */
501 if (fp->ptregs.format == 0xA)
502 addr = fp->ptregs.pc + 4;
503 else
504 addr = fp->un.fmtb.baddr;
505 if (ssw & FC)
506 addr -= 2;
508 if (buserr_type & SUN3_BUSERR_INVALID) {
509 if (!mmu_emu_handle_fault(addr, 1, 0))
510 do_page_fault (&fp->ptregs, addr, 0);
511 } else {
512 #ifdef DEBUG
513 printk ("protection fault on insn access (segv).\n");
514 #endif
515 force_sig (SIGSEGV, current);
518 #else
519 #if defined(CPU_M68020_OR_M68030)
520 static inline void bus_error030 (struct frame *fp)
522 volatile unsigned short temp;
523 unsigned short mmusr;
524 unsigned long addr, errorcode;
525 unsigned short ssw = fp->un.fmtb.ssw;
526 #ifdef DEBUG
527 unsigned long desc;
529 printk ("pid = %x ", current->pid);
530 printk ("SSW=%#06x ", ssw);
532 if (ssw & (FC | FB))
533 printk ("Instruction fault at %#010lx\n",
534 ssw & FC ?
535 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
537 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
538 if (ssw & DF)
539 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
540 ssw & RW ? "read" : "write",
541 fp->un.fmtb.daddr,
542 space_names[ssw & DFC], fp->ptregs.pc);
543 #endif
545 /* ++andreas: If a data fault and an instruction fault happen
546 at the same time map in both pages. */
548 /* First handle the data fault, if any. */
549 if (ssw & DF) {
550 addr = fp->un.fmtb.daddr;
552 #ifdef DEBUG
553 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
554 "pmove %%psr,%1"
555 : "=a&" (desc), "=m" (temp)
556 : "a" (addr), "d" (ssw));
557 #else
558 asm volatile ("ptestr %2,%1@,#7\n\t"
559 "pmove %%psr,%0"
560 : "=m" (temp) : "a" (addr), "d" (ssw));
561 #endif
562 mmusr = temp;
564 #ifdef DEBUG
565 printk("mmusr is %#x for addr %#lx in task %p\n",
566 mmusr, addr, current);
567 printk("descriptor address is %#lx, contents %#lx\n",
568 __va(desc), *(unsigned long *)__va(desc));
569 #endif
571 errorcode = (mmusr & MMU_I) ? 0 : 1;
572 if (!(ssw & RW) || (ssw & RM))
573 errorcode |= 2;
575 if (mmusr & (MMU_I | MMU_WP)) {
576 if (ssw & 4) {
577 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
578 ssw & RW ? "read" : "write",
579 fp->un.fmtb.daddr,
580 space_names[ssw & DFC], fp->ptregs.pc);
581 goto buserr;
583 /* Don't try to do anything further if an exception was
584 handled. */
585 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
586 return;
587 } else if (!(mmusr & MMU_I)) {
588 /* probably a 020 cas fault */
589 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
590 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
591 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
592 printk("invalid %s access at %#lx from pc %#lx\n",
593 !(ssw & RW) ? "write" : "read", addr,
594 fp->ptregs.pc);
595 die_if_kernel("Oops",&fp->ptregs,mmusr);
596 force_sig(SIGSEGV, current);
597 return;
598 } else {
599 #if 0
600 static volatile long tlong;
601 #endif
603 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
604 !(ssw & RW) ? "write" : "read", addr,
605 fp->ptregs.pc, ssw);
606 asm volatile ("ptestr #1,%1@,#0\n\t"
607 "pmove %%psr,%0"
608 : "=m" (temp)
609 : "a" (addr));
610 mmusr = temp;
612 printk ("level 0 mmusr is %#x\n", mmusr);
613 #if 0
614 asm volatile ("pmove %%tt0,%0"
615 : "=m" (tlong));
616 printk("tt0 is %#lx, ", tlong);
617 asm volatile ("pmove %%tt1,%0"
618 : "=m" (tlong));
619 printk("tt1 is %#lx\n", tlong);
620 #endif
621 #ifdef DEBUG
622 printk("Unknown SIGSEGV - 1\n");
623 #endif
624 die_if_kernel("Oops",&fp->ptregs,mmusr);
625 force_sig(SIGSEGV, current);
626 return;
629 /* setup an ATC entry for the access about to be retried */
630 if (!(ssw & RW) || (ssw & RM))
631 asm volatile ("ploadw %1,%0@" : /* no outputs */
632 : "a" (addr), "d" (ssw));
633 else
634 asm volatile ("ploadr %1,%0@" : /* no outputs */
635 : "a" (addr), "d" (ssw));
638 /* Now handle the instruction fault. */
640 if (!(ssw & (FC|FB)))
641 return;
643 if (fp->ptregs.sr & PS_S) {
644 printk("Instruction fault at %#010lx\n",
645 fp->ptregs.pc);
646 buserr:
647 printk ("BAD KERNEL BUSERR\n");
648 die_if_kernel("Oops",&fp->ptregs,0);
649 force_sig(SIGKILL, current);
650 return;
653 /* get the fault address */
654 if (fp->ptregs.format == 10)
655 addr = fp->ptregs.pc + 4;
656 else
657 addr = fp->un.fmtb.baddr;
658 if (ssw & FC)
659 addr -= 2;
661 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
662 /* Insn fault on same page as data fault. But we
663 should still create the ATC entry. */
664 goto create_atc_entry;
666 #ifdef DEBUG
667 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
668 "pmove %%psr,%1"
669 : "=a&" (desc), "=m" (temp)
670 : "a" (addr));
671 #else
672 asm volatile ("ptestr #1,%1@,#7\n\t"
673 "pmove %%psr,%0"
674 : "=m" (temp) : "a" (addr));
675 #endif
676 mmusr = temp;
678 #ifdef DEBUG
679 printk ("mmusr is %#x for addr %#lx in task %p\n",
680 mmusr, addr, current);
681 printk ("descriptor address is %#lx, contents %#lx\n",
682 __va(desc), *(unsigned long *)__va(desc));
683 #endif
685 if (mmusr & MMU_I)
686 do_page_fault (&fp->ptregs, addr, 0);
687 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
688 printk ("invalid insn access at %#lx from pc %#lx\n",
689 addr, fp->ptregs.pc);
690 #ifdef DEBUG
691 printk("Unknown SIGSEGV - 2\n");
692 #endif
693 die_if_kernel("Oops",&fp->ptregs,mmusr);
694 force_sig(SIGSEGV, current);
695 return;
698 create_atc_entry:
699 /* setup an ATC entry for the access about to be retried */
700 asm volatile ("ploadr #2,%0@" : /* no outputs */
701 : "a" (addr));
703 #endif /* CPU_M68020_OR_M68030 */
704 #endif /* !CONFIG_SUN3 */
706 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
707 #include <asm/mcfmmu.h>
710 * The following table converts the FS encoding of a ColdFire
711 * exception stack frame into the error_code value needed by
712 * do_fault.
714 static const unsigned char fs_err_code[] = {
715 0, /* 0000 */
716 0, /* 0001 */
717 0, /* 0010 */
718 0, /* 0011 */
719 1, /* 0100 */
720 0, /* 0101 */
721 0, /* 0110 */
722 0, /* 0111 */
723 2, /* 1000 */
724 3, /* 1001 */
725 2, /* 1010 */
726 0, /* 1011 */
727 1, /* 1100 */
728 1, /* 1101 */
729 0, /* 1110 */
730 0 /* 1111 */
733 static inline void access_errorcf(unsigned int fs, struct frame *fp)
735 unsigned long mmusr, addr;
736 unsigned int err_code;
737 int need_page_fault;
739 mmusr = mmu_read(MMUSR);
740 addr = mmu_read(MMUAR);
743 * error_code:
744 * bit 0 == 0 means no page found, 1 means protection fault
745 * bit 1 == 0 means read, 1 means write
747 switch (fs) {
748 case 5: /* 0101 TLB opword X miss */
749 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
750 addr = fp->ptregs.pc;
751 break;
752 case 6: /* 0110 TLB extension word X miss */
753 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
754 addr = fp->ptregs.pc + sizeof(long);
755 break;
756 case 10: /* 1010 TLB W miss */
757 need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
758 break;
759 case 14: /* 1110 TLB R miss */
760 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
761 break;
762 default:
763 /* 0000 Normal */
764 /* 0001 Reserved */
765 /* 0010 Interrupt during debug service routine */
766 /* 0011 Reserved */
767 /* 0100 X Protection */
768 /* 0111 IFP in emulator mode */
769 /* 1000 W Protection*/
770 /* 1001 Write error*/
771 /* 1011 Reserved*/
772 /* 1100 R Protection*/
773 /* 1101 R Protection*/
774 /* 1111 OEP in emulator mode*/
775 need_page_fault = 1;
776 break;
779 if (need_page_fault) {
780 err_code = fs_err_code[fs];
781 if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
782 err_code |= 2; /* bit1 - write, bit0 - protection */
783 do_page_fault(&fp->ptregs, addr, err_code);
786 #endif /* CONFIG_COLDFIRE CONFIG_MMU */
788 asmlinkage void buserr_c(struct frame *fp)
790 /* Only set esp0 if coming from user mode */
791 if (user_mode(&fp->ptregs))
792 current->thread.esp0 = (unsigned long) fp;
794 #ifdef DEBUG
795 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
796 #endif
798 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
799 if (CPU_IS_COLDFIRE) {
800 unsigned int fs;
801 fs = (fp->ptregs.vector & 0x3) |
802 ((fp->ptregs.vector & 0xc00) >> 8);
803 switch (fs) {
804 case 0x5:
805 case 0x6:
806 case 0x7:
807 case 0x9:
808 case 0xa:
809 case 0xd:
810 case 0xe:
811 case 0xf:
812 access_errorcf(fs, fp);
813 return;
814 default:
815 break;
818 #endif /* CONFIG_COLDFIRE && CONFIG_MMU */
820 switch (fp->ptregs.format) {
821 #if defined (CONFIG_M68060)
822 case 4: /* 68060 access error */
823 access_error060 (fp);
824 break;
825 #endif
826 #if defined (CONFIG_M68040)
827 case 0x7: /* 68040 access error */
828 access_error040 (fp);
829 break;
830 #endif
831 #if defined (CPU_M68020_OR_M68030)
832 case 0xa:
833 case 0xb:
834 bus_error030 (fp);
835 break;
836 #endif
837 default:
838 die_if_kernel("bad frame format",&fp->ptregs,0);
839 #ifdef DEBUG
840 printk("Unknown SIGSEGV - 4\n");
841 #endif
842 force_sig(SIGSEGV, current);
847 static int kstack_depth_to_print = 48;
849 void show_trace(unsigned long *stack)
851 unsigned long *endstack;
852 unsigned long addr;
853 int i;
855 printk("Call Trace:");
856 addr = (unsigned long)stack + THREAD_SIZE - 1;
857 endstack = (unsigned long *)(addr & -THREAD_SIZE);
858 i = 0;
859 while (stack + 1 <= endstack) {
860 addr = *stack++;
862 * If the address is either in the text segment of the
863 * kernel, or in the region which contains vmalloc'ed
864 * memory, it *may* be the address of a calling
865 * routine; if so, print it so that someone tracing
866 * down the cause of the crash will be able to figure
867 * out the call path that was taken.
869 if (__kernel_text_address(addr)) {
870 #ifndef CONFIG_KALLSYMS
871 if (i % 5 == 0)
872 printk("\n ");
873 #endif
874 printk(" [<%08lx>] %pS\n", addr, (void *)addr);
875 i++;
878 printk("\n");
881 void show_registers(struct pt_regs *regs)
883 struct frame *fp = (struct frame *)regs;
884 mm_segment_t old_fs = get_fs();
885 u16 c, *cp;
886 unsigned long addr;
887 int i;
889 print_modules();
890 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
891 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
892 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
893 regs->d0, regs->d1, regs->d2, regs->d3);
894 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
895 regs->d4, regs->d5, regs->a0, regs->a1);
897 printk("Process %s (pid: %d, task=%p)\n",
898 current->comm, task_pid_nr(current), current);
899 addr = (unsigned long)&fp->un;
900 printk("Frame format=%X ", regs->format);
901 switch (regs->format) {
902 case 0x2:
903 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
904 addr += sizeof(fp->un.fmt2);
905 break;
906 case 0x3:
907 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
908 addr += sizeof(fp->un.fmt3);
909 break;
910 case 0x4:
911 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
912 : "eff addr=%08lx pc=%08lx\n"),
913 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
914 addr += sizeof(fp->un.fmt4);
915 break;
916 case 0x7:
917 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
918 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
919 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
920 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
921 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
922 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
923 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
924 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
925 printk("push data: %08lx %08lx %08lx %08lx\n",
926 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
927 fp->un.fmt7.pd3);
928 addr += sizeof(fp->un.fmt7);
929 break;
930 case 0x9:
931 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
932 addr += sizeof(fp->un.fmt9);
933 break;
934 case 0xa:
935 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
936 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
937 fp->un.fmta.daddr, fp->un.fmta.dobuf);
938 addr += sizeof(fp->un.fmta);
939 break;
940 case 0xb:
941 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
942 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
943 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
944 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
945 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
946 addr += sizeof(fp->un.fmtb);
947 break;
948 default:
949 printk("\n");
951 show_stack(NULL, (unsigned long *)addr);
953 printk("Code:");
954 set_fs(KERNEL_DS);
955 cp = (u16 *)regs->pc;
956 for (i = -8; i < 16; i++) {
957 if (get_user(c, cp + i) && i >= 0) {
958 printk(" Bad PC value.");
959 break;
961 printk(i ? " %04x" : " <%04x>", c);
963 set_fs(old_fs);
964 printk ("\n");
967 void show_stack(struct task_struct *task, unsigned long *stack)
969 unsigned long *p;
970 unsigned long *endstack;
971 int i;
973 if (!stack) {
974 if (task)
975 stack = (unsigned long *)task->thread.esp0;
976 else
977 stack = (unsigned long *)&stack;
979 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
981 printk("Stack from %08lx:", (unsigned long)stack);
982 p = stack;
983 for (i = 0; i < kstack_depth_to_print; i++) {
984 if (p + 1 > endstack)
985 break;
986 if (i % 8 == 0)
987 printk("\n ");
988 printk(" %08lx", *p++);
990 printk("\n");
991 show_trace(stack);
995 * The vector number returned in the frame pointer may also contain
996 * the "fs" (Fault Status) bits on ColdFire. These are in the bottom
997 * 2 bits, and upper 2 bits. So we need to mask out the real vector
998 * number before using it in comparisons. You don't need to do this on
999 * real 68k parts, but it won't hurt either.
1002 void bad_super_trap (struct frame *fp)
1004 int vector = (fp->ptregs.vector >> 2) & 0xff;
1006 console_verbose();
1007 if (vector < ARRAY_SIZE(vec_names))
1008 printk ("*** %s *** FORMAT=%X\n",
1009 vec_names[vector],
1010 fp->ptregs.format);
1011 else
1012 printk ("*** Exception %d *** FORMAT=%X\n",
1013 vector, fp->ptregs.format);
1014 if (vector == VEC_ADDRERR && CPU_IS_020_OR_030) {
1015 unsigned short ssw = fp->un.fmtb.ssw;
1017 printk ("SSW=%#06x ", ssw);
1019 if (ssw & RC)
1020 printk ("Pipe stage C instruction fault at %#010lx\n",
1021 (fp->ptregs.format) == 0xA ?
1022 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1023 if (ssw & RB)
1024 printk ("Pipe stage B instruction fault at %#010lx\n",
1025 (fp->ptregs.format) == 0xA ?
1026 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1027 if (ssw & DF)
1028 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1029 ssw & RW ? "read" : "write",
1030 fp->un.fmtb.daddr, space_names[ssw & DFC],
1031 fp->ptregs.pc);
1033 printk ("Current process id is %d\n", task_pid_nr(current));
1034 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1037 asmlinkage void trap_c(struct frame *fp)
1039 int sig;
1040 int vector = (fp->ptregs.vector >> 2) & 0xff;
1041 siginfo_t info;
1043 if (fp->ptregs.sr & PS_S) {
1044 if (vector == VEC_TRACE) {
1045 /* traced a trapping instruction on a 68020/30,
1046 * real exception will be executed afterwards.
1048 } else if (!handle_kernel_fault(&fp->ptregs))
1049 bad_super_trap(fp);
1050 return;
1053 /* send the appropriate signal to the user program */
1054 switch (vector) {
1055 case VEC_ADDRERR:
1056 info.si_code = BUS_ADRALN;
1057 sig = SIGBUS;
1058 break;
1059 case VEC_ILLEGAL:
1060 case VEC_LINE10:
1061 case VEC_LINE11:
1062 info.si_code = ILL_ILLOPC;
1063 sig = SIGILL;
1064 break;
1065 case VEC_PRIV:
1066 info.si_code = ILL_PRVOPC;
1067 sig = SIGILL;
1068 break;
1069 case VEC_COPROC:
1070 info.si_code = ILL_COPROC;
1071 sig = SIGILL;
1072 break;
1073 case VEC_TRAP1:
1074 case VEC_TRAP2:
1075 case VEC_TRAP3:
1076 case VEC_TRAP4:
1077 case VEC_TRAP5:
1078 case VEC_TRAP6:
1079 case VEC_TRAP7:
1080 case VEC_TRAP8:
1081 case VEC_TRAP9:
1082 case VEC_TRAP10:
1083 case VEC_TRAP11:
1084 case VEC_TRAP12:
1085 case VEC_TRAP13:
1086 case VEC_TRAP14:
1087 info.si_code = ILL_ILLTRP;
1088 sig = SIGILL;
1089 break;
1090 case VEC_FPBRUC:
1091 case VEC_FPOE:
1092 case VEC_FPNAN:
1093 info.si_code = FPE_FLTINV;
1094 sig = SIGFPE;
1095 break;
1096 case VEC_FPIR:
1097 info.si_code = FPE_FLTRES;
1098 sig = SIGFPE;
1099 break;
1100 case VEC_FPDIVZ:
1101 info.si_code = FPE_FLTDIV;
1102 sig = SIGFPE;
1103 break;
1104 case VEC_FPUNDER:
1105 info.si_code = FPE_FLTUND;
1106 sig = SIGFPE;
1107 break;
1108 case VEC_FPOVER:
1109 info.si_code = FPE_FLTOVF;
1110 sig = SIGFPE;
1111 break;
1112 case VEC_ZERODIV:
1113 info.si_code = FPE_INTDIV;
1114 sig = SIGFPE;
1115 break;
1116 case VEC_CHK:
1117 case VEC_TRAP:
1118 info.si_code = FPE_INTOVF;
1119 sig = SIGFPE;
1120 break;
1121 case VEC_TRACE: /* ptrace single step */
1122 info.si_code = TRAP_TRACE;
1123 sig = SIGTRAP;
1124 break;
1125 case VEC_TRAP15: /* breakpoint */
1126 info.si_code = TRAP_BRKPT;
1127 sig = SIGTRAP;
1128 break;
1129 default:
1130 info.si_code = ILL_ILLOPC;
1131 sig = SIGILL;
1132 break;
1134 info.si_signo = sig;
1135 info.si_errno = 0;
1136 switch (fp->ptregs.format) {
1137 default:
1138 info.si_addr = (void *) fp->ptregs.pc;
1139 break;
1140 case 2:
1141 info.si_addr = (void *) fp->un.fmt2.iaddr;
1142 break;
1143 case 7:
1144 info.si_addr = (void *) fp->un.fmt7.effaddr;
1145 break;
1146 case 9:
1147 info.si_addr = (void *) fp->un.fmt9.iaddr;
1148 break;
1149 case 10:
1150 info.si_addr = (void *) fp->un.fmta.daddr;
1151 break;
1152 case 11:
1153 info.si_addr = (void *) fp->un.fmtb.daddr;
1154 break;
1156 force_sig_info (sig, &info, current);
1159 void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1161 if (!(fp->sr & PS_S))
1162 return;
1164 console_verbose();
1165 printk("%s: %08x\n",str,nr);
1166 show_registers(fp);
1167 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
1168 do_exit(SIGSEGV);
1171 asmlinkage void set_esp0(unsigned long ssp)
1173 current->thread.esp0 = ssp;
1177 * This function is called if an error occur while accessing
1178 * user-space from the fpsp040 code.
1180 asmlinkage void fpsp040_die(void)
1182 do_exit(SIGSEGV);
1185 #ifdef CONFIG_M68KFPU_EMU
1186 asmlinkage void fpemu_signal(int signal, int code, void *addr)
1188 siginfo_t info;
1190 info.si_signo = signal;
1191 info.si_errno = 0;
1192 info.si_code = code;
1193 info.si_addr = addr;
1194 force_sig_info(signal, &info, current);
1196 #endif