?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / mips / kvm / kvm_mips.c
blob3f3e5b2b2f3834b7351c3b6b972fd6fa1e3a48ec
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10 */
11
12 #include <linux/errno.h>
13 #include <linux/err.h>
14 #include <linux/module.h>
15 #include <linux/vmalloc.h>
16 #include <linux/fs.h>
17 #include <linux/bootmem.h>
18 #include <asm/page.h>
19 #include <asm/cacheflush.h>
20 #include <asm/mmu_context.h>
21
22 #include <linux/kvm_host.h>
23
24 #include "kvm_mips_int.h"
25 #include "kvm_mips_comm.h"
26
27 #define CREATE_TRACE_POINTS
28 #include "trace.h"
29
30 #ifndef VECTORSPACING
31 #define VECTORSPACING 0x100 /* for EI/VI mode */
32 #endif
33
34 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
35 struct kvm_stats_debugfs_item debugfs_entries[] = {
36 { "wait", VCPU_STAT(wait_exits) },
37 { "cache", VCPU_STAT(cache_exits) },
38 { "signal", VCPU_STAT(signal_exits) },
39 { "interrupt", VCPU_STAT(int_exits) },
40 { "cop_unsuable", VCPU_STAT(cop_unusable_exits) },
41 { "tlbmod", VCPU_STAT(tlbmod_exits) },
42 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits) },
43 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits) },
44 { "addrerr_st", VCPU_STAT(addrerr_st_exits) },
45 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits) },
46 { "syscall", VCPU_STAT(syscall_exits) },
47 { "resvd_inst", VCPU_STAT(resvd_inst_exits) },
48 { "break_inst", VCPU_STAT(break_inst_exits) },
49 { "flush_dcache", VCPU_STAT(flush_dcache_exits) },
50 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
51 {NULL}
52 };
53
54 static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
55 {
56 int i;
57 for_each_possible_cpu(i) {
58 vcpu->arch.guest_kernel_asid[i] = 0;
59 vcpu->arch.guest_user_asid[i] = 0;
60 }
61 return 0;
62 }
63
64 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
65 {
66 return gfn;
67 }
68
69 /* XXXKYMA: We are simulatoring a processor that has the WII bit set in Config7, so we
70 * are "runnable" if interrupts are pending
71 */
72 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
73 {
74 return !!(vcpu->arch.pending_exceptions);
75 }
76
77 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
78 {
79 return 1;
80 }
81
82 int kvm_arch_hardware_enable(void *garbage)
83 {
84 return 0;
85 }
86
87 void kvm_arch_hardware_disable(void *garbage)
88 {
89 }
90
91 int kvm_arch_hardware_setup(void)
92 {
93 return 0;
94 }
95
96 void kvm_arch_hardware_unsetup(void)
97 {
98 }
99
100 void kvm_arch_check_processor_compat(void *rtn)
101 {
102 int *r = (int *)rtn;
103 *r = 0;
104 return;
105 }
106
107 static void kvm_mips_init_tlbs(struct kvm *kvm)
108 {
109 unsigned long wired;
110
111 /* Add a wired entry to the TLB, it is used to map the commpage to the Guest kernel */
112 wired = read_c0_wired();
113 write_c0_wired(wired + 1);
114 mtc0_tlbw_hazard();
115 kvm->arch.commpage_tlb = wired;
116
117 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
118 kvm->arch.commpage_tlb);
119 }
120
121 static void kvm_mips_init_vm_percpu(void *arg)
122 {
123 struct kvm *kvm = (struct kvm *)arg;
124
125 kvm_mips_init_tlbs(kvm);
126 kvm_mips_callbacks->vm_init(kvm);
127
128 }
129
130 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
131 {
132 if (atomic_inc_return(&kvm_mips_instance) == 1) {
133 kvm_info("%s: 1st KVM instance, setup host TLB parameters\n",
134 __func__);
135 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
136 }
137
138
139 return 0;
140 }
141
142 void kvm_mips_free_vcpus(struct kvm *kvm)
143 {
144 unsigned int i;
145 struct kvm_vcpu *vcpu;
146
147 /* Put the pages we reserved for the guest pmap */
148 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
149 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
150 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
151 }
152 kfree(kvm->arch.guest_pmap);
153
154 kvm_for_each_vcpu(i, vcpu, kvm) {
155 kvm_arch_vcpu_free(vcpu);
156 }
157
158 mutex_lock(&kvm->lock);
159
160 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
161 kvm->vcpus[i] = NULL;
162
163 atomic_set(&kvm->online_vcpus, 0);
164
165 mutex_unlock(&kvm->lock);
166 }
167
168 void kvm_arch_sync_events(struct kvm *kvm)
169 {
170 }
171
172 static void kvm_mips_uninit_tlbs(void *arg)
173 {
174 /* Restore wired count */
175 write_c0_wired(0);
176 mtc0_tlbw_hazard();
177 /* Clear out all the TLBs */
178 kvm_local_flush_tlb_all();
179 }
180
181 void kvm_arch_destroy_vm(struct kvm *kvm)
182 {
183 kvm_mips_free_vcpus(kvm);
184
185 /* If this is the last instance, restore wired count */
186 if (atomic_dec_return(&kvm_mips_instance) == 0) {
187 kvm_info("%s: last KVM instance, restoring TLB parameters\n",
188 __func__);
189 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
190 }
191 }
192
193 long
194 kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
195 {
196 return -ENOIOCTLCMD;
197 }
198
199 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
200 struct kvm_memory_slot *dont)
201 {
202 }
203
204 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
205 {
206 return 0;
207 }
208
209 void kvm_arch_memslots_updated(struct kvm *kvm)
210 {
211 }
212
213 int kvm_arch_prepare_memory_region(struct kvm *kvm,
214 struct kvm_memory_slot *memslot,
215 struct kvm_userspace_memory_region *mem,
216 enum kvm_mr_change change)
217 {
218 return 0;
219 }
220
221 void kvm_arch_commit_memory_region(struct kvm *kvm,
222 struct kvm_userspace_memory_region *mem,
223 const struct kvm_memory_slot *old,
224 enum kvm_mr_change change)
225 {
226 unsigned long npages = 0;
227 int i, err = 0;
228
229 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
230 __func__, kvm, mem->slot, mem->guest_phys_addr,
231 mem->memory_size, mem->userspace_addr);
232
233 /* Setup Guest PMAP table */
234 if (!kvm->arch.guest_pmap) {
235 if (mem->slot == 0)
236 npages = mem->memory_size >> PAGE_SHIFT;
237
238 if (npages) {
239 kvm->arch.guest_pmap_npages = npages;
240 kvm->arch.guest_pmap =
241 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
242
243 if (!kvm->arch.guest_pmap) {
244 kvm_err("Failed to allocate guest PMAP");
245 err = -ENOMEM;
246 goto out;
247 }
248
249 kvm_info
250 ("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
251 npages, kvm->arch.guest_pmap);
252
253 /* Now setup the page table */
254 for (i = 0; i < npages; i++) {
255 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
256 }
257 }
258 }
259 out:
260 return;
261 }
262
263 void kvm_arch_flush_shadow_all(struct kvm *kvm)
264 {
265 }
266
267 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
268 struct kvm_memory_slot *slot)
269 {
270 }
271
272 void kvm_arch_flush_shadow(struct kvm *kvm)
273 {
274 }
275
276 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
277 {
278 extern char mips32_exception[], mips32_exceptionEnd[];
279 extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
280 int err, size, offset;
281 void *gebase;
282 int i;
283
284 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
285
286 if (!vcpu) {
287 err = -ENOMEM;
288 goto out;
289 }
290
291 err = kvm_vcpu_init(vcpu, kvm, id);
292
293 if (err)
294 goto out_free_cpu;
295
296 kvm_info("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
297
298 /* Allocate space for host mode exception handlers that handle
299 * guest mode exits
300 */
301 if (cpu_has_veic || cpu_has_vint) {
302 size = 0x200 + VECTORSPACING * 64;
303 } else {
304 size = 0x4000;
305 }
306
307 /* Save Linux EBASE */
308 vcpu->arch.host_ebase = (void *)read_c0_ebase();
309
310 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
311
312 if (!gebase) {
313 err = -ENOMEM;
314 goto out_free_cpu;
315 }
316 kvm_info("Allocated %d bytes for KVM Exception Handlers @ %p\n",
317 ALIGN(size, PAGE_SIZE), gebase);
318
319 /* Save new ebase */
320 vcpu->arch.guest_ebase = gebase;
321
322 /* Copy L1 Guest Exception handler to correct offset */
323
324 /* TLB Refill, EXL = 0 */
325 memcpy(gebase, mips32_exception,
326 mips32_exceptionEnd - mips32_exception);
327
328 /* General Exception Entry point */
329 memcpy(gebase + 0x180, mips32_exception,
330 mips32_exceptionEnd - mips32_exception);
331
332 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
333 for (i = 0; i < 8; i++) {
334 kvm_debug("L1 Vectored handler @ %p\n",
335 gebase + 0x200 + (i * VECTORSPACING));
336 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
337 mips32_exceptionEnd - mips32_exception);
338 }
339
340 /* General handler, relocate to unmapped space for sanity's sake */
341 offset = 0x2000;
342 kvm_info("Installing KVM Exception handlers @ %p, %#x bytes\n",
343 gebase + offset,
344 mips32_GuestExceptionEnd - mips32_GuestException);
345
346 memcpy(gebase + offset, mips32_GuestException,
347 mips32_GuestExceptionEnd - mips32_GuestException);
348
349 /* Invalidate the icache for these ranges */
350 mips32_SyncICache((unsigned long) gebase, ALIGN(size, PAGE_SIZE));
351
352 /* Allocate comm page for guest kernel, a TLB will be reserved for mapping GVA @ 0xFFFF8000 to this page */
353 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
354
355 if (!vcpu->arch.kseg0_commpage) {
356 err = -ENOMEM;
357 goto out_free_gebase;
358 }
359
360 kvm_info("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
361 kvm_mips_commpage_init(vcpu);
362
363 /* Init */
364 vcpu->arch.last_sched_cpu = -1;
365
366 /* Start off the timer */
367 kvm_mips_emulate_count(vcpu);
368
369 return vcpu;
370
371 out_free_gebase:
372 kfree(gebase);
373
374 out_free_cpu:
375 kfree(vcpu);
376
377 out:
378 return ERR_PTR(err);
379 }
380
381 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
382 {
383 hrtimer_cancel(&vcpu->arch.comparecount_timer);
384
385 kvm_vcpu_uninit(vcpu);
386
387 kvm_mips_dump_stats(vcpu);
388
389 kfree(vcpu->arch.guest_ebase);
390 kfree(vcpu->arch.kseg0_commpage);
391 kfree(vcpu);
392 }
393
394 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
395 {
396 kvm_arch_vcpu_free(vcpu);
397 }
398
399 int
400 kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
401 struct kvm_guest_debug *dbg)
402 {
403 return -ENOIOCTLCMD;
404 }
405
406 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
407 {
408 int r = 0;
409 sigset_t sigsaved;
410
411 if (vcpu->sigset_active)
412 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
413
414 if (vcpu->mmio_needed) {
415 if (!vcpu->mmio_is_write)
416 kvm_mips_complete_mmio_load(vcpu, run);
417 vcpu->mmio_needed = 0;
418 }
419
420 /* Check if we have any exceptions/interrupts pending */
421 kvm_mips_deliver_interrupts(vcpu,
422 kvm_read_c0_guest_cause(vcpu->arch.cop0));
423
424 local_irq_disable();
425 kvm_guest_enter();
426
427 r = __kvm_mips_vcpu_run(run, vcpu);
428
429 kvm_guest_exit();
430 local_irq_enable();
431
432 if (vcpu->sigset_active)
433 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
434
435 return r;
436 }
437
438 int
439 kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_mips_interrupt *irq)
440 {
441 int intr = (int)irq->irq;
442 struct kvm_vcpu *dvcpu = NULL;
443
444 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
445 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
446 (int)intr);
447
448 if (irq->cpu == -1)
449 dvcpu = vcpu;
450 else
451 dvcpu = vcpu->kvm->vcpus[irq->cpu];
452
453 if (intr == 2 || intr == 3 || intr == 4) {
454 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
455
456 } else if (intr == -2 || intr == -3 || intr == -4) {
457 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
458 } else {
459 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
460 irq->cpu, irq->irq);
461 return -EINVAL;
462 }
463
464 dvcpu->arch.wait = 0;
465
466 if (waitqueue_active(&dvcpu->wq)) {
467 wake_up_interruptible(&dvcpu->wq);
468 }
469
470 return 0;
471 }
472
473 int
474 kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
475 struct kvm_mp_state *mp_state)
476 {
477 return -ENOIOCTLCMD;
478 }
479
480 int
481 kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
482 struct kvm_mp_state *mp_state)
483 {
484 return -ENOIOCTLCMD;
485 }
486
487 #define MIPS_CP0_32(_R, _S) \
488 (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
489
490 #define MIPS_CP0_64(_R, _S) \
491 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
492
493 #define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
494 #define KVM_REG_MIPS_CP0_ENTRYLO0 MIPS_CP0_64(2, 0)
495 #define KVM_REG_MIPS_CP0_ENTRYLO1 MIPS_CP0_64(3, 0)
496 #define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
497 #define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2)
498 #define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0)
499 #define KVM_REG_MIPS_CP0_PAGEGRAIN MIPS_CP0_32(5, 1)
500 #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0)
501 #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0)
502 #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0)
503 #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0)
504 #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0)
505 #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0)
506 #define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
507 #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
508 #define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1)
509 #define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0)
510 #define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1)
511 #define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2)
512 #define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3)
513 #define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7)
514 #define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
515 #define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
516
517 static u64 kvm_mips_get_one_regs[] = {
518 KVM_REG_MIPS_R0,
519 KVM_REG_MIPS_R1,
520 KVM_REG_MIPS_R2,
521 KVM_REG_MIPS_R3,
522 KVM_REG_MIPS_R4,
523 KVM_REG_MIPS_R5,
524 KVM_REG_MIPS_R6,
525 KVM_REG_MIPS_R7,
526 KVM_REG_MIPS_R8,
527 KVM_REG_MIPS_R9,
528 KVM_REG_MIPS_R10,
529 KVM_REG_MIPS_R11,
530 KVM_REG_MIPS_R12,
531 KVM_REG_MIPS_R13,
532 KVM_REG_MIPS_R14,
533 KVM_REG_MIPS_R15,
534 KVM_REG_MIPS_R16,
535 KVM_REG_MIPS_R17,
536 KVM_REG_MIPS_R18,
537 KVM_REG_MIPS_R19,
538 KVM_REG_MIPS_R20,
539 KVM_REG_MIPS_R21,
540 KVM_REG_MIPS_R22,
541 KVM_REG_MIPS_R23,
542 KVM_REG_MIPS_R24,
543 KVM_REG_MIPS_R25,
544 KVM_REG_MIPS_R26,
545 KVM_REG_MIPS_R27,
546 KVM_REG_MIPS_R28,
547 KVM_REG_MIPS_R29,
548 KVM_REG_MIPS_R30,
549 KVM_REG_MIPS_R31,
550
551 KVM_REG_MIPS_HI,
552 KVM_REG_MIPS_LO,
553 KVM_REG_MIPS_PC,
554
555 KVM_REG_MIPS_CP0_INDEX,
556 KVM_REG_MIPS_CP0_CONTEXT,
557 KVM_REG_MIPS_CP0_PAGEMASK,
558 KVM_REG_MIPS_CP0_WIRED,
559 KVM_REG_MIPS_CP0_BADVADDR,
560 KVM_REG_MIPS_CP0_ENTRYHI,
561 KVM_REG_MIPS_CP0_STATUS,
562 KVM_REG_MIPS_CP0_CAUSE,
563 /* EPC set via kvm_regs, et al. */
564 KVM_REG_MIPS_CP0_CONFIG,
565 KVM_REG_MIPS_CP0_CONFIG1,
566 KVM_REG_MIPS_CP0_CONFIG2,
567 KVM_REG_MIPS_CP0_CONFIG3,
568 KVM_REG_MIPS_CP0_CONFIG7,
569 KVM_REG_MIPS_CP0_ERROREPC
570 };
571
572 static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
573 const struct kvm_one_reg *reg)
574 {
575 struct mips_coproc *cop0 = vcpu->arch.cop0;
576 s64 v;
577
578 switch (reg->id) {
579 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
580 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
581 break;
582 case KVM_REG_MIPS_HI:
583 v = (long)vcpu->arch.hi;
584 break;
585 case KVM_REG_MIPS_LO:
586 v = (long)vcpu->arch.lo;
587 break;
588 case KVM_REG_MIPS_PC:
589 v = (long)vcpu->arch.pc;
590 break;
591
592 case KVM_REG_MIPS_CP0_INDEX:
593 v = (long)kvm_read_c0_guest_index(cop0);
594 break;
595 case KVM_REG_MIPS_CP0_CONTEXT:
596 v = (long)kvm_read_c0_guest_context(cop0);
597 break;
598 case KVM_REG_MIPS_CP0_PAGEMASK:
599 v = (long)kvm_read_c0_guest_pagemask(cop0);
600 break;
601 case KVM_REG_MIPS_CP0_WIRED:
602 v = (long)kvm_read_c0_guest_wired(cop0);
603 break;
604 case KVM_REG_MIPS_CP0_BADVADDR:
605 v = (long)kvm_read_c0_guest_badvaddr(cop0);
606 break;
607 case KVM_REG_MIPS_CP0_ENTRYHI:
608 v = (long)kvm_read_c0_guest_entryhi(cop0);
609 break;
610 case KVM_REG_MIPS_CP0_STATUS:
611 v = (long)kvm_read_c0_guest_status(cop0);
612 break;
613 case KVM_REG_MIPS_CP0_CAUSE:
614 v = (long)kvm_read_c0_guest_cause(cop0);
615 break;
616 case KVM_REG_MIPS_CP0_ERROREPC:
617 v = (long)kvm_read_c0_guest_errorepc(cop0);
618 break;
619 case KVM_REG_MIPS_CP0_CONFIG:
620 v = (long)kvm_read_c0_guest_config(cop0);
621 break;
622 case KVM_REG_MIPS_CP0_CONFIG1:
623 v = (long)kvm_read_c0_guest_config1(cop0);
624 break;
625 case KVM_REG_MIPS_CP0_CONFIG2:
626 v = (long)kvm_read_c0_guest_config2(cop0);
627 break;
628 case KVM_REG_MIPS_CP0_CONFIG3:
629 v = (long)kvm_read_c0_guest_config3(cop0);
630 break;
631 case KVM_REG_MIPS_CP0_CONFIG7:
632 v = (long)kvm_read_c0_guest_config7(cop0);
633 break;
634 default:
635 return -EINVAL;
636 }
637 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
638 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
639 return put_user(v, uaddr64);
640 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
641 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
642 u32 v32 = (u32)v;
643 return put_user(v32, uaddr32);
644 } else {
645 return -EINVAL;
646 }
647 }
648
649 static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
650 const struct kvm_one_reg *reg)
651 {
652 struct mips_coproc *cop0 = vcpu->arch.cop0;
653 u64 v;
654
655 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
656 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
657
658 if (get_user(v, uaddr64) != 0)
659 return -EFAULT;
660 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
661 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
662 s32 v32;
663
664 if (get_user(v32, uaddr32) != 0)
665 return -EFAULT;
666 v = (s64)v32;
667 } else {
668 return -EINVAL;
669 }
670
671 switch (reg->id) {
672 case KVM_REG_MIPS_R0:
673 /* Silently ignore requests to set $0 */
674 break;
675 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
676 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
677 break;
678 case KVM_REG_MIPS_HI:
679 vcpu->arch.hi = v;
680 break;
681 case KVM_REG_MIPS_LO:
682 vcpu->arch.lo = v;
683 break;
684 case KVM_REG_MIPS_PC:
685 vcpu->arch.pc = v;
686 break;
687
688 case KVM_REG_MIPS_CP0_INDEX:
689 kvm_write_c0_guest_index(cop0, v);
690 break;
691 case KVM_REG_MIPS_CP0_CONTEXT:
692 kvm_write_c0_guest_context(cop0, v);
693 break;
694 case KVM_REG_MIPS_CP0_PAGEMASK:
695 kvm_write_c0_guest_pagemask(cop0, v);
696 break;
697 case KVM_REG_MIPS_CP0_WIRED:
698 kvm_write_c0_guest_wired(cop0, v);
699 break;
700 case KVM_REG_MIPS_CP0_BADVADDR:
701 kvm_write_c0_guest_badvaddr(cop0, v);
702 break;
703 case KVM_REG_MIPS_CP0_ENTRYHI:
704 kvm_write_c0_guest_entryhi(cop0, v);
705 break;
706 case KVM_REG_MIPS_CP0_STATUS:
707 kvm_write_c0_guest_status(cop0, v);
708 break;
709 case KVM_REG_MIPS_CP0_CAUSE:
710 kvm_write_c0_guest_cause(cop0, v);
711 break;
712 case KVM_REG_MIPS_CP0_ERROREPC:
713 kvm_write_c0_guest_errorepc(cop0, v);
714 break;
715 default:
716 return -EINVAL;
717 }
718 return 0;
719 }
720
721 long
722 kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
723 {
724 struct kvm_vcpu *vcpu = filp->private_data;
725 void __user *argp = (void __user *)arg;
726 long r;
727
728 switch (ioctl) {
729 case KVM_SET_ONE_REG:
730 case KVM_GET_ONE_REG: {
731 struct kvm_one_reg reg;
732 if (copy_from_user(&reg, argp, sizeof(reg)))
733 return -EFAULT;
734 if (ioctl == KVM_SET_ONE_REG)
735 return kvm_mips_set_reg(vcpu, &reg);
736 else
737 return kvm_mips_get_reg(vcpu, &reg);
738 }
739 case KVM_GET_REG_LIST: {
740 struct kvm_reg_list __user *user_list = argp;
741 u64 __user *reg_dest;
742 struct kvm_reg_list reg_list;
743 unsigned n;
744
745 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
746 return -EFAULT;
747 n = reg_list.n;
748 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
749 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
750 return -EFAULT;
751 if (n < reg_list.n)
752 return -E2BIG;
753 reg_dest = user_list->reg;
754 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
755 sizeof(kvm_mips_get_one_regs)))
756 return -EFAULT;
757 return 0;
758 }
759 case KVM_NMI:
760 /* Treat the NMI as a CPU reset */
761 r = kvm_mips_reset_vcpu(vcpu);
762 break;
763 case KVM_INTERRUPT:
764 {
765 struct kvm_mips_interrupt irq;
766 r = -EFAULT;
767 if (copy_from_user(&irq, argp, sizeof(irq)))
768 goto out;
769
770 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
771 irq.irq);
772
773 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
774 break;
775 }
776 default:
777 r = -ENOIOCTLCMD;
778 }
779
780 out:
781 return r;
782 }
783
784 /*
785 * Get (and clear) the dirty memory log for a memory slot.
786 */
787 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
788 {
789 struct kvm_memory_slot *memslot;
790 unsigned long ga, ga_end;
791 int is_dirty = 0;
792 int r;
793 unsigned long n;
794
795 mutex_lock(&kvm->slots_lock);
796
797 r = kvm_get_dirty_log(kvm, log, &is_dirty);
798 if (r)
799 goto out;
800
801 /* If nothing is dirty, don't bother messing with page tables. */
802 if (is_dirty) {
803 memslot = &kvm->memslots->memslots[log->slot];
804
805 ga = memslot->base_gfn << PAGE_SHIFT;
806 ga_end = ga + (memslot->npages << PAGE_SHIFT);
807
808 printk("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
809 ga_end);
810
811 n = kvm_dirty_bitmap_bytes(memslot);
812 memset(memslot->dirty_bitmap, 0, n);
813 }
814
815 r = 0;
816 out:
817 mutex_unlock(&kvm->slots_lock);
818 return r;
819
820 }
821
822 long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
823 {
824 long r;
825
826 switch (ioctl) {
827 default:
828 r = -ENOIOCTLCMD;
829 }
830
831 return r;
832 }
833
834 int kvm_arch_init(void *opaque)
835 {
836 int ret;
837
838 if (kvm_mips_callbacks) {
839 kvm_err("kvm: module already exists\n");
840 return -EEXIST;
841 }
842
843 ret = kvm_mips_emulation_init(&kvm_mips_callbacks);
844
845 return ret;
846 }
847
848 void kvm_arch_exit(void)
849 {
850 kvm_mips_callbacks = NULL;
851 }
852
853 int
854 kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
855 {
856 return -ENOIOCTLCMD;
857 }
858
859 int
860 kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
861 {
862 return -ENOIOCTLCMD;
863 }
864
865 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
866 {
867 return 0;
868 }
869
870 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
871 {
872 return -ENOIOCTLCMD;
873 }
874
875 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
876 {
877 return -ENOIOCTLCMD;
878 }
879
880 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
881 {
882 return VM_FAULT_SIGBUS;
883 }
884
885 int kvm_dev_ioctl_check_extension(long ext)
886 {
887 int r;
888
889 switch (ext) {
890 case KVM_CAP_ONE_REG:
891 r = 1;
892 break;
893 case KVM_CAP_COALESCED_MMIO:
894 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
895 break;
896 default:
897 r = 0;
898 break;
899 }
900 return r;
901 }
902
903 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
904 {
905 return kvm_mips_pending_timer(vcpu);
906 }
907
908 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
909 {
910 int i;
911 struct mips_coproc *cop0;
912
913 if (!vcpu)
914 return -1;
915
916 printk("VCPU Register Dump:\n");
917 printk("\tpc = 0x%08lx\n", vcpu->arch.pc);;
918 printk("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
919
920 for (i = 0; i < 32; i += 4) {
921 printk("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
922 vcpu->arch.gprs[i],
923 vcpu->arch.gprs[i + 1],
924 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
925 }
926 printk("\thi: 0x%08lx\n", vcpu->arch.hi);
927 printk("\tlo: 0x%08lx\n", vcpu->arch.lo);
928
929 cop0 = vcpu->arch.cop0;
930 printk("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
931 kvm_read_c0_guest_status(cop0), kvm_read_c0_guest_cause(cop0));
932
933 printk("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
934
935 return 0;
936 }
937
938 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
939 {
940 int i;
941
942 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
943 vcpu->arch.gprs[i] = regs->gpr[i];
944 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
945 vcpu->arch.hi = regs->hi;
946 vcpu->arch.lo = regs->lo;
947 vcpu->arch.pc = regs->pc;
948
949 return 0;
950 }
951
952 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
953 {
954 int i;
955
956 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
957 regs->gpr[i] = vcpu->arch.gprs[i];
958
959 regs->hi = vcpu->arch.hi;
960 regs->lo = vcpu->arch.lo;
961 regs->pc = vcpu->arch.pc;
962
963 return 0;
964 }
965
966 void kvm_mips_comparecount_func(unsigned long data)
967 {
968 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
969
970 kvm_mips_callbacks->queue_timer_int(vcpu);
971
972 vcpu->arch.wait = 0;
973 if (waitqueue_active(&vcpu->wq)) {
974 wake_up_interruptible(&vcpu->wq);
975 }
976 }
977
978 /*
979 * low level hrtimer wake routine.
980 */
981 enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
982 {
983 struct kvm_vcpu *vcpu;
984
985 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
986 kvm_mips_comparecount_func((unsigned long) vcpu);
987 hrtimer_forward_now(&vcpu->arch.comparecount_timer,
988 ktime_set(0, MS_TO_NS(10)));
989 return HRTIMER_RESTART;
990 }
991
992 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
993 {
994 kvm_mips_callbacks->vcpu_init(vcpu);
995 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
996 HRTIMER_MODE_REL);
997 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
998 kvm_mips_init_shadow_tlb(vcpu);
999 return 0;
1000 }
1001
1002 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
1003 {
1004 return;
1005 }
1006
1007 int
1008 kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, struct kvm_translation *tr)
1009 {
1010 return 0;
1011 }
1012
1013 /* Initial guest state */
1014 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1015 {
1016 return kvm_mips_callbacks->vcpu_setup(vcpu);
1017 }
1018
1019 static
1020 void kvm_mips_set_c0_status(void)
1021 {
1022 uint32_t status = read_c0_status();
1023
1024 if (cpu_has_fpu)
1025 status |= (ST0_CU1);
1026
1027 if (cpu_has_dsp)
1028 status |= (ST0_MX);
1029
1030 write_c0_status(status);
1031 ehb();
1032 }
1033
1034 /*
1035 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1036 */
1037 int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1038 {
1039 uint32_t cause = vcpu->arch.host_cp0_cause;
1040 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1041 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1042 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1043 enum emulation_result er = EMULATE_DONE;
1044 int ret = RESUME_GUEST;
1045
1046 /* Set a default exit reason */
1047 run->exit_reason = KVM_EXIT_UNKNOWN;
1048 run->ready_for_interrupt_injection = 1;
1049
1050 /* Set the appropriate status bits based on host CPU features, before we hit the scheduler */
1051 kvm_mips_set_c0_status();
1052
1053 local_irq_enable();
1054
1055 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1056 cause, opc, run, vcpu);
1057
1058 /* Do a privilege check, if in UM most of these exit conditions end up
1059 * causing an exception to be delivered to the Guest Kernel
1060 */
1061 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1062 if (er == EMULATE_PRIV_FAIL) {
1063 goto skip_emul;
1064 } else if (er == EMULATE_FAIL) {
1065 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1066 ret = RESUME_HOST;
1067 goto skip_emul;
1068 }
1069
1070 switch (exccode) {
1071 case T_INT:
1072 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1073
1074 ++vcpu->stat.int_exits;
1075 trace_kvm_exit(vcpu, INT_EXITS);
1076
1077 if (need_resched()) {
1078 cond_resched();
1079 }
1080
1081 ret = RESUME_GUEST;
1082 break;
1083
1084 case T_COP_UNUSABLE:
1085 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1086
1087 ++vcpu->stat.cop_unusable_exits;
1088 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1089 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1090 /* XXXKYMA: Might need to return to user space */
1091 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN) {
1092 ret = RESUME_HOST;
1093 }
1094 break;
1095
1096 case T_TLB_MOD:
1097 ++vcpu->stat.tlbmod_exits;
1098 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1099 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1100 break;
1101
1102 case T_TLB_ST_MISS:
1103 kvm_debug
1104 ("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1105 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1106 badvaddr);
1107
1108 ++vcpu->stat.tlbmiss_st_exits;
1109 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1110 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1111 break;
1112
1113 case T_TLB_LD_MISS:
1114 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1115 cause, opc, badvaddr);
1116
1117 ++vcpu->stat.tlbmiss_ld_exits;
1118 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1119 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1120 break;
1121
1122 case T_ADDR_ERR_ST:
1123 ++vcpu->stat.addrerr_st_exits;
1124 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1125 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1126 break;
1127
1128 case T_ADDR_ERR_LD:
1129 ++vcpu->stat.addrerr_ld_exits;
1130 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1131 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1132 break;
1133
1134 case T_SYSCALL:
1135 ++vcpu->stat.syscall_exits;
1136 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1137 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1138 break;
1139
1140 case T_RES_INST:
1141 ++vcpu->stat.resvd_inst_exits;
1142 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1143 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1144 break;
1145
1146 case T_BREAK:
1147 ++vcpu->stat.break_inst_exits;
1148 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1149 ret = kvm_mips_callbacks->handle_break(vcpu);
1150 break;
1151
1152 default:
1153 kvm_err
1154 ("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1155 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1156 kvm_read_c0_guest_status(vcpu->arch.cop0));
1157 kvm_arch_vcpu_dump_regs(vcpu);
1158 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1159 ret = RESUME_HOST;
1160 break;
1161
1162 }
1163
1164 skip_emul:
1165 local_irq_disable();
1166
1167 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1168 kvm_mips_deliver_interrupts(vcpu, cause);
1169
1170 if (!(ret & RESUME_HOST)) {
1171 /* Only check for signals if not already exiting to userspace */
1172 if (signal_pending(current)) {
1173 run->exit_reason = KVM_EXIT_INTR;
1174 ret = (-EINTR << 2) | RESUME_HOST;
1175 ++vcpu->stat.signal_exits;
1176 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1177 }
1178 }
1179
1180 return ret;
1181 }
1182
1183 int __init kvm_mips_init(void)
1184 {
1185 int ret;
1186
1187 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1188
1189 if (ret)
1190 return ret;
1191
1192 /* On MIPS, kernel modules are executed from "mapped space", which requires TLBs.
1193 * The TLB handling code is statically linked with the rest of the kernel (kvm_tlb.c)
1194 * to avoid the possibility of double faulting. The issue is that the TLB code
1195 * references routines that are part of the the KVM module,
1196 * which are only available once the module is loaded.
1197 */
1198 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1199 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1200 kvm_mips_is_error_pfn = is_error_pfn;
1201
1202 pr_info("KVM/MIPS Initialized\n");
1203 return 0;
1204 }
1205
1206 void __exit kvm_mips_exit(void)
1207 {
1208 kvm_exit();
1209
1210 kvm_mips_gfn_to_pfn = NULL;
1211 kvm_mips_release_pfn_clean = NULL;
1212 kvm_mips_is_error_pfn = NULL;
1213
1214 pr_info("KVM/MIPS unloaded\n");
1215 }
1216
1217 module_init(kvm_mips_init);
1218 module_exit(kvm_mips_exit);
1219
1220 EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
Linux with added FPC-III support