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x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / powerpc / kernel / cputable.c
blobc5d3d023363a0078724fb3c2816f841263e15d1f
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23 #include <asm/setup.h>
24
25 struct cpu_spec* cur_cpu_spec = NULL;
26 EXPORT_SYMBOL(cur_cpu_spec);
27
28 /* The platform string corresponding to the real PVR */
29 const char *powerpc_base_platform;
30
31 /* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38 #ifdef CONFIG_PPC32
39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61 #endif /* CONFIG_PPC32 */
62 #ifdef CONFIG_PPC64
63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __restore_cpu_a2(void);
74 #endif /* CONFIG_PPC64 */
75 #if defined(CONFIG_E500)
76 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
77 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
78 extern void __restore_cpu_e5500(void);
79 extern void __restore_cpu_e6500(void);
80 #endif /* CONFIG_E500 */
81
82 /* This table only contains "desktop" CPUs, it need to be filled with embedded
83 * ones as well...
84 */
85 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
86 PPC_FEATURE_HAS_MMU)
87 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
88 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
89 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
91 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
93 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
95 PPC_FEATURE_TRUE_LE | \
96 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
97 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
99 PPC_FEATURE_TRUE_LE | \
100 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
101 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
102 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
104 PPC_FEATURE_TRUE_LE | \
105 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
106 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
107 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \
108 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
109 PPC_FEATURE2_VEC_CRYPTO)
110 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
111 PPC_FEATURE_TRUE_LE | \
112 PPC_FEATURE_HAS_ALTIVEC_COMP)
113 #ifdef CONFIG_PPC_BOOK3E_64
114 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
115 #else
116 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
117 PPC_FEATURE_BOOKE)
118 #endif
119
120 static struct cpu_spec __initdata cpu_specs[] = {
121 #ifdef CONFIG_PPC_BOOK3S_64
122 { /* Power3 */
123 .pvr_mask = 0xffff0000,
124 .pvr_value = 0x00400000,
125 .cpu_name = "POWER3 (630)",
126 .cpu_features = CPU_FTRS_POWER3,
127 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
128 .mmu_features = MMU_FTR_HPTE_TABLE,
129 .icache_bsize = 128,
130 .dcache_bsize = 128,
131 .num_pmcs = 8,
132 .pmc_type = PPC_PMC_IBM,
133 .oprofile_cpu_type = "ppc64/power3",
134 .oprofile_type = PPC_OPROFILE_RS64,
135 .platform = "power3",
136 },
137 { /* Power3+ */
138 .pvr_mask = 0xffff0000,
139 .pvr_value = 0x00410000,
140 .cpu_name = "POWER3 (630+)",
141 .cpu_features = CPU_FTRS_POWER3,
142 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
143 .mmu_features = MMU_FTR_HPTE_TABLE,
144 .icache_bsize = 128,
145 .dcache_bsize = 128,
146 .num_pmcs = 8,
147 .pmc_type = PPC_PMC_IBM,
148 .oprofile_cpu_type = "ppc64/power3",
149 .oprofile_type = PPC_OPROFILE_RS64,
150 .platform = "power3",
151 },
152 { /* Northstar */
153 .pvr_mask = 0xffff0000,
154 .pvr_value = 0x00330000,
155 .cpu_name = "RS64-II (northstar)",
156 .cpu_features = CPU_FTRS_RS64,
157 .cpu_user_features = COMMON_USER_PPC64,
158 .mmu_features = MMU_FTR_HPTE_TABLE,
159 .icache_bsize = 128,
160 .dcache_bsize = 128,
161 .num_pmcs = 8,
162 .pmc_type = PPC_PMC_IBM,
163 .oprofile_cpu_type = "ppc64/rs64",
164 .oprofile_type = PPC_OPROFILE_RS64,
165 .platform = "rs64",
166 },
167 { /* Pulsar */
168 .pvr_mask = 0xffff0000,
169 .pvr_value = 0x00340000,
170 .cpu_name = "RS64-III (pulsar)",
171 .cpu_features = CPU_FTRS_RS64,
172 .cpu_user_features = COMMON_USER_PPC64,
173 .mmu_features = MMU_FTR_HPTE_TABLE,
174 .icache_bsize = 128,
175 .dcache_bsize = 128,
176 .num_pmcs = 8,
177 .pmc_type = PPC_PMC_IBM,
178 .oprofile_cpu_type = "ppc64/rs64",
179 .oprofile_type = PPC_OPROFILE_RS64,
180 .platform = "rs64",
181 },
182 { /* I-star */
183 .pvr_mask = 0xffff0000,
184 .pvr_value = 0x00360000,
185 .cpu_name = "RS64-III (icestar)",
186 .cpu_features = CPU_FTRS_RS64,
187 .cpu_user_features = COMMON_USER_PPC64,
188 .mmu_features = MMU_FTR_HPTE_TABLE,
189 .icache_bsize = 128,
190 .dcache_bsize = 128,
191 .num_pmcs = 8,
192 .pmc_type = PPC_PMC_IBM,
193 .oprofile_cpu_type = "ppc64/rs64",
194 .oprofile_type = PPC_OPROFILE_RS64,
195 .platform = "rs64",
196 },
197 { /* S-star */
198 .pvr_mask = 0xffff0000,
199 .pvr_value = 0x00370000,
200 .cpu_name = "RS64-IV (sstar)",
201 .cpu_features = CPU_FTRS_RS64,
202 .cpu_user_features = COMMON_USER_PPC64,
203 .mmu_features = MMU_FTR_HPTE_TABLE,
204 .icache_bsize = 128,
205 .dcache_bsize = 128,
206 .num_pmcs = 8,
207 .pmc_type = PPC_PMC_IBM,
208 .oprofile_cpu_type = "ppc64/rs64",
209 .oprofile_type = PPC_OPROFILE_RS64,
210 .platform = "rs64",
211 },
212 { /* Power4 */
213 .pvr_mask = 0xffff0000,
214 .pvr_value = 0x00350000,
215 .cpu_name = "POWER4 (gp)",
216 .cpu_features = CPU_FTRS_POWER4,
217 .cpu_user_features = COMMON_USER_POWER4,
218 .mmu_features = MMU_FTRS_POWER4,
219 .icache_bsize = 128,
220 .dcache_bsize = 128,
221 .num_pmcs = 8,
222 .pmc_type = PPC_PMC_IBM,
223 .oprofile_cpu_type = "ppc64/power4",
224 .oprofile_type = PPC_OPROFILE_POWER4,
225 .platform = "power4",
226 },
227 { /* Power4+ */
228 .pvr_mask = 0xffff0000,
229 .pvr_value = 0x00380000,
230 .cpu_name = "POWER4+ (gq)",
231 .cpu_features = CPU_FTRS_POWER4,
232 .cpu_user_features = COMMON_USER_POWER4,
233 .mmu_features = MMU_FTRS_POWER4,
234 .icache_bsize = 128,
235 .dcache_bsize = 128,
236 .num_pmcs = 8,
237 .pmc_type = PPC_PMC_IBM,
238 .oprofile_cpu_type = "ppc64/power4",
239 .oprofile_type = PPC_OPROFILE_POWER4,
240 .platform = "power4",
241 },
242 { /* PPC970 */
243 .pvr_mask = 0xffff0000,
244 .pvr_value = 0x00390000,
245 .cpu_name = "PPC970",
246 .cpu_features = CPU_FTRS_PPC970,
247 .cpu_user_features = COMMON_USER_POWER4 |
248 PPC_FEATURE_HAS_ALTIVEC_COMP,
249 .mmu_features = MMU_FTRS_PPC970,
250 .icache_bsize = 128,
251 .dcache_bsize = 128,
252 .num_pmcs = 8,
253 .pmc_type = PPC_PMC_IBM,
254 .cpu_setup = __setup_cpu_ppc970,
255 .cpu_restore = __restore_cpu_ppc970,
256 .oprofile_cpu_type = "ppc64/970",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 .platform = "ppc970",
259 },
260 { /* PPC970FX */
261 .pvr_mask = 0xffff0000,
262 .pvr_value = 0x003c0000,
263 .cpu_name = "PPC970FX",
264 .cpu_features = CPU_FTRS_PPC970,
265 .cpu_user_features = COMMON_USER_POWER4 |
266 PPC_FEATURE_HAS_ALTIVEC_COMP,
267 .mmu_features = MMU_FTRS_PPC970,
268 .icache_bsize = 128,
269 .dcache_bsize = 128,
270 .num_pmcs = 8,
271 .pmc_type = PPC_PMC_IBM,
272 .cpu_setup = __setup_cpu_ppc970,
273 .cpu_restore = __restore_cpu_ppc970,
274 .oprofile_cpu_type = "ppc64/970",
275 .oprofile_type = PPC_OPROFILE_POWER4,
276 .platform = "ppc970",
277 },
278 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
279 .pvr_mask = 0xffffffff,
280 .pvr_value = 0x00440100,
281 .cpu_name = "PPC970MP",
282 .cpu_features = CPU_FTRS_PPC970,
283 .cpu_user_features = COMMON_USER_POWER4 |
284 PPC_FEATURE_HAS_ALTIVEC_COMP,
285 .mmu_features = MMU_FTRS_PPC970,
286 .icache_bsize = 128,
287 .dcache_bsize = 128,
288 .num_pmcs = 8,
289 .pmc_type = PPC_PMC_IBM,
290 .cpu_setup = __setup_cpu_ppc970,
291 .cpu_restore = __restore_cpu_ppc970,
292 .oprofile_cpu_type = "ppc64/970MP",
293 .oprofile_type = PPC_OPROFILE_POWER4,
294 .platform = "ppc970",
295 },
296 { /* PPC970MP */
297 .pvr_mask = 0xffff0000,
298 .pvr_value = 0x00440000,
299 .cpu_name = "PPC970MP",
300 .cpu_features = CPU_FTRS_PPC970,
301 .cpu_user_features = COMMON_USER_POWER4 |
302 PPC_FEATURE_HAS_ALTIVEC_COMP,
303 .mmu_features = MMU_FTRS_PPC970,
304 .icache_bsize = 128,
305 .dcache_bsize = 128,
306 .num_pmcs = 8,
307 .pmc_type = PPC_PMC_IBM,
308 .cpu_setup = __setup_cpu_ppc970MP,
309 .cpu_restore = __restore_cpu_ppc970,
310 .oprofile_cpu_type = "ppc64/970MP",
311 .oprofile_type = PPC_OPROFILE_POWER4,
312 .platform = "ppc970",
313 },
314 { /* PPC970GX */
315 .pvr_mask = 0xffff0000,
316 .pvr_value = 0x00450000,
317 .cpu_name = "PPC970GX",
318 .cpu_features = CPU_FTRS_PPC970,
319 .cpu_user_features = COMMON_USER_POWER4 |
320 PPC_FEATURE_HAS_ALTIVEC_COMP,
321 .mmu_features = MMU_FTRS_PPC970,
322 .icache_bsize = 128,
323 .dcache_bsize = 128,
324 .num_pmcs = 8,
325 .pmc_type = PPC_PMC_IBM,
326 .cpu_setup = __setup_cpu_ppc970,
327 .oprofile_cpu_type = "ppc64/970",
328 .oprofile_type = PPC_OPROFILE_POWER4,
329 .platform = "ppc970",
330 },
331 { /* Power5 GR */
332 .pvr_mask = 0xffff0000,
333 .pvr_value = 0x003a0000,
334 .cpu_name = "POWER5 (gr)",
335 .cpu_features = CPU_FTRS_POWER5,
336 .cpu_user_features = COMMON_USER_POWER5,
337 .mmu_features = MMU_FTRS_POWER5,
338 .icache_bsize = 128,
339 .dcache_bsize = 128,
340 .num_pmcs = 6,
341 .pmc_type = PPC_PMC_IBM,
342 .oprofile_cpu_type = "ppc64/power5",
343 .oprofile_type = PPC_OPROFILE_POWER4,
344 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
345 * and above but only works on POWER5 and above
346 */
347 .oprofile_mmcra_sihv = MMCRA_SIHV,
348 .oprofile_mmcra_sipr = MMCRA_SIPR,
349 .platform = "power5",
350 },
351 { /* Power5++ */
352 .pvr_mask = 0xffffff00,
353 .pvr_value = 0x003b0300,
354 .cpu_name = "POWER5+ (gs)",
355 .cpu_features = CPU_FTRS_POWER5,
356 .cpu_user_features = COMMON_USER_POWER5_PLUS,
357 .mmu_features = MMU_FTRS_POWER5,
358 .icache_bsize = 128,
359 .dcache_bsize = 128,
360 .num_pmcs = 6,
361 .oprofile_cpu_type = "ppc64/power5++",
362 .oprofile_type = PPC_OPROFILE_POWER4,
363 .oprofile_mmcra_sihv = MMCRA_SIHV,
364 .oprofile_mmcra_sipr = MMCRA_SIPR,
365 .platform = "power5+",
366 },
367 { /* Power5 GS */
368 .pvr_mask = 0xffff0000,
369 .pvr_value = 0x003b0000,
370 .cpu_name = "POWER5+ (gs)",
371 .cpu_features = CPU_FTRS_POWER5,
372 .cpu_user_features = COMMON_USER_POWER5_PLUS,
373 .mmu_features = MMU_FTRS_POWER5,
374 .icache_bsize = 128,
375 .dcache_bsize = 128,
376 .num_pmcs = 6,
377 .pmc_type = PPC_PMC_IBM,
378 .oprofile_cpu_type = "ppc64/power5+",
379 .oprofile_type = PPC_OPROFILE_POWER4,
380 .oprofile_mmcra_sihv = MMCRA_SIHV,
381 .oprofile_mmcra_sipr = MMCRA_SIPR,
382 .platform = "power5+",
383 },
384 { /* POWER6 in P5+ mode; 2.04-compliant processor */
385 .pvr_mask = 0xffffffff,
386 .pvr_value = 0x0f000001,
387 .cpu_name = "POWER5+",
388 .cpu_features = CPU_FTRS_POWER5,
389 .cpu_user_features = COMMON_USER_POWER5_PLUS,
390 .mmu_features = MMU_FTRS_POWER5,
391 .icache_bsize = 128,
392 .dcache_bsize = 128,
393 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
394 .oprofile_type = PPC_OPROFILE_POWER4,
395 .platform = "power5+",
396 },
397 { /* Power6 */
398 .pvr_mask = 0xffff0000,
399 .pvr_value = 0x003e0000,
400 .cpu_name = "POWER6 (raw)",
401 .cpu_features = CPU_FTRS_POWER6,
402 .cpu_user_features = COMMON_USER_POWER6 |
403 PPC_FEATURE_POWER6_EXT,
404 .mmu_features = MMU_FTRS_POWER6,
405 .icache_bsize = 128,
406 .dcache_bsize = 128,
407 .num_pmcs = 6,
408 .pmc_type = PPC_PMC_IBM,
409 .oprofile_cpu_type = "ppc64/power6",
410 .oprofile_type = PPC_OPROFILE_POWER4,
411 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
412 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
413 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
414 POWER6_MMCRA_OTHER,
415 .platform = "power6x",
416 },
417 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
418 .pvr_mask = 0xffffffff,
419 .pvr_value = 0x0f000002,
420 .cpu_name = "POWER6 (architected)",
421 .cpu_features = CPU_FTRS_POWER6,
422 .cpu_user_features = COMMON_USER_POWER6,
423 .mmu_features = MMU_FTRS_POWER6,
424 .icache_bsize = 128,
425 .dcache_bsize = 128,
426 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
427 .oprofile_type = PPC_OPROFILE_POWER4,
428 .platform = "power6",
429 },
430 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
431 .pvr_mask = 0xffffffff,
432 .pvr_value = 0x0f000003,
433 .cpu_name = "POWER7 (architected)",
434 .cpu_features = CPU_FTRS_POWER7,
435 .cpu_user_features = COMMON_USER_POWER7,
436 .cpu_user_features2 = COMMON_USER2_POWER7,
437 .mmu_features = MMU_FTRS_POWER7,
438 .icache_bsize = 128,
439 .dcache_bsize = 128,
440 .oprofile_type = PPC_OPROFILE_POWER4,
441 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
442 .cpu_setup = __setup_cpu_power7,
443 .cpu_restore = __restore_cpu_power7,
444 .platform = "power7",
445 },
446 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
447 .pvr_mask = 0xffffffff,
448 .pvr_value = 0x0f000004,
449 .cpu_name = "POWER8 (architected)",
450 .cpu_features = CPU_FTRS_POWER8,
451 .cpu_user_features = COMMON_USER_POWER8,
452 .cpu_user_features2 = COMMON_USER2_POWER8,
453 .mmu_features = MMU_FTRS_POWER8,
454 .icache_bsize = 128,
455 .dcache_bsize = 128,
456 .oprofile_type = PPC_OPROFILE_INVALID,
457 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
458 .cpu_setup = __setup_cpu_power8,
459 .cpu_restore = __restore_cpu_power8,
460 .platform = "power8",
461 },
462 { /* Power7 */
463 .pvr_mask = 0xffff0000,
464 .pvr_value = 0x003f0000,
465 .cpu_name = "POWER7 (raw)",
466 .cpu_features = CPU_FTRS_POWER7,
467 .cpu_user_features = COMMON_USER_POWER7,
468 .cpu_user_features2 = COMMON_USER2_POWER7,
469 .mmu_features = MMU_FTRS_POWER7,
470 .icache_bsize = 128,
471 .dcache_bsize = 128,
472 .num_pmcs = 6,
473 .pmc_type = PPC_PMC_IBM,
474 .oprofile_cpu_type = "ppc64/power7",
475 .oprofile_type = PPC_OPROFILE_POWER4,
476 .cpu_setup = __setup_cpu_power7,
477 .cpu_restore = __restore_cpu_power7,
478 .platform = "power7",
479 },
480 { /* Power7+ */
481 .pvr_mask = 0xffff0000,
482 .pvr_value = 0x004A0000,
483 .cpu_name = "POWER7+ (raw)",
484 .cpu_features = CPU_FTRS_POWER7,
485 .cpu_user_features = COMMON_USER_POWER7,
486 .cpu_user_features2 = COMMON_USER2_POWER7,
487 .mmu_features = MMU_FTRS_POWER7,
488 .icache_bsize = 128,
489 .dcache_bsize = 128,
490 .num_pmcs = 6,
491 .pmc_type = PPC_PMC_IBM,
492 .oprofile_cpu_type = "ppc64/power7",
493 .oprofile_type = PPC_OPROFILE_POWER4,
494 .cpu_setup = __setup_cpu_power7,
495 .cpu_restore = __restore_cpu_power7,
496 .platform = "power7+",
497 },
498 { /* Power8E */
499 .pvr_mask = 0xffff0000,
500 .pvr_value = 0x004b0000,
501 .cpu_name = "POWER8E (raw)",
502 .cpu_features = CPU_FTRS_POWER8,
503 .cpu_user_features = COMMON_USER_POWER8,
504 .cpu_user_features2 = COMMON_USER2_POWER8,
505 .mmu_features = MMU_FTRS_POWER8,
506 .icache_bsize = 128,
507 .dcache_bsize = 128,
508 .num_pmcs = 6,
509 .pmc_type = PPC_PMC_IBM,
510 .oprofile_cpu_type = "ppc64/power8",
511 .oprofile_type = PPC_OPROFILE_INVALID,
512 .cpu_setup = __setup_cpu_power8,
513 .cpu_restore = __restore_cpu_power8,
514 .platform = "power8",
515 },
516 { /* Power8 */
517 .pvr_mask = 0xffff0000,
518 .pvr_value = 0x004d0000,
519 .cpu_name = "POWER8 (raw)",
520 .cpu_features = CPU_FTRS_POWER8,
521 .cpu_user_features = COMMON_USER_POWER8,
522 .cpu_user_features2 = COMMON_USER2_POWER8,
523 .mmu_features = MMU_FTRS_POWER8,
524 .icache_bsize = 128,
525 .dcache_bsize = 128,
526 .num_pmcs = 6,
527 .pmc_type = PPC_PMC_IBM,
528 .oprofile_cpu_type = "ppc64/power8",
529 .oprofile_type = PPC_OPROFILE_INVALID,
530 .cpu_setup = __setup_cpu_power8,
531 .cpu_restore = __restore_cpu_power8,
532 .platform = "power8",
533 },
534 { /* Cell Broadband Engine */
535 .pvr_mask = 0xffff0000,
536 .pvr_value = 0x00700000,
537 .cpu_name = "Cell Broadband Engine",
538 .cpu_features = CPU_FTRS_CELL,
539 .cpu_user_features = COMMON_USER_PPC64 |
540 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
541 PPC_FEATURE_SMT,
542 .mmu_features = MMU_FTRS_CELL,
543 .icache_bsize = 128,
544 .dcache_bsize = 128,
545 .num_pmcs = 4,
546 .pmc_type = PPC_PMC_IBM,
547 .oprofile_cpu_type = "ppc64/cell-be",
548 .oprofile_type = PPC_OPROFILE_CELL,
549 .platform = "ppc-cell-be",
550 },
551 { /* PA Semi PA6T */
552 .pvr_mask = 0x7fff0000,
553 .pvr_value = 0x00900000,
554 .cpu_name = "PA6T",
555 .cpu_features = CPU_FTRS_PA6T,
556 .cpu_user_features = COMMON_USER_PA6T,
557 .mmu_features = MMU_FTRS_PA6T,
558 .icache_bsize = 64,
559 .dcache_bsize = 64,
560 .num_pmcs = 6,
561 .pmc_type = PPC_PMC_PA6T,
562 .cpu_setup = __setup_cpu_pa6t,
563 .cpu_restore = __restore_cpu_pa6t,
564 .oprofile_cpu_type = "ppc64/pa6t",
565 .oprofile_type = PPC_OPROFILE_PA6T,
566 .platform = "pa6t",
567 },
568 { /* default match */
569 .pvr_mask = 0x00000000,
570 .pvr_value = 0x00000000,
571 .cpu_name = "POWER4 (compatible)",
572 .cpu_features = CPU_FTRS_COMPATIBLE,
573 .cpu_user_features = COMMON_USER_PPC64,
574 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
575 .icache_bsize = 128,
576 .dcache_bsize = 128,
577 .num_pmcs = 6,
578 .pmc_type = PPC_PMC_IBM,
579 .platform = "power4",
580 }
581 #endif /* CONFIG_PPC_BOOK3S_64 */
582
583 #ifdef CONFIG_PPC32
584 #if CLASSIC_PPC
585 { /* 601 */
586 .pvr_mask = 0xffff0000,
587 .pvr_value = 0x00010000,
588 .cpu_name = "601",
589 .cpu_features = CPU_FTRS_PPC601,
590 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
591 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
592 .mmu_features = MMU_FTR_HPTE_TABLE,
593 .icache_bsize = 32,
594 .dcache_bsize = 32,
595 .machine_check = machine_check_generic,
596 .platform = "ppc601",
597 },
598 { /* 603 */
599 .pvr_mask = 0xffff0000,
600 .pvr_value = 0x00030000,
601 .cpu_name = "603",
602 .cpu_features = CPU_FTRS_603,
603 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
604 .mmu_features = 0,
605 .icache_bsize = 32,
606 .dcache_bsize = 32,
607 .cpu_setup = __setup_cpu_603,
608 .machine_check = machine_check_generic,
609 .platform = "ppc603",
610 },
611 { /* 603e */
612 .pvr_mask = 0xffff0000,
613 .pvr_value = 0x00060000,
614 .cpu_name = "603e",
615 .cpu_features = CPU_FTRS_603,
616 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
617 .mmu_features = 0,
618 .icache_bsize = 32,
619 .dcache_bsize = 32,
620 .cpu_setup = __setup_cpu_603,
621 .machine_check = machine_check_generic,
622 .platform = "ppc603",
623 },
624 { /* 603ev */
625 .pvr_mask = 0xffff0000,
626 .pvr_value = 0x00070000,
627 .cpu_name = "603ev",
628 .cpu_features = CPU_FTRS_603,
629 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
630 .mmu_features = 0,
631 .icache_bsize = 32,
632 .dcache_bsize = 32,
633 .cpu_setup = __setup_cpu_603,
634 .machine_check = machine_check_generic,
635 .platform = "ppc603",
636 },
637 { /* 604 */
638 .pvr_mask = 0xffff0000,
639 .pvr_value = 0x00040000,
640 .cpu_name = "604",
641 .cpu_features = CPU_FTRS_604,
642 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
643 .mmu_features = MMU_FTR_HPTE_TABLE,
644 .icache_bsize = 32,
645 .dcache_bsize = 32,
646 .num_pmcs = 2,
647 .cpu_setup = __setup_cpu_604,
648 .machine_check = machine_check_generic,
649 .platform = "ppc604",
650 },
651 { /* 604e */
652 .pvr_mask = 0xfffff000,
653 .pvr_value = 0x00090000,
654 .cpu_name = "604e",
655 .cpu_features = CPU_FTRS_604,
656 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
657 .mmu_features = MMU_FTR_HPTE_TABLE,
658 .icache_bsize = 32,
659 .dcache_bsize = 32,
660 .num_pmcs = 4,
661 .cpu_setup = __setup_cpu_604,
662 .machine_check = machine_check_generic,
663 .platform = "ppc604",
664 },
665 { /* 604r */
666 .pvr_mask = 0xffff0000,
667 .pvr_value = 0x00090000,
668 .cpu_name = "604r",
669 .cpu_features = CPU_FTRS_604,
670 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
671 .mmu_features = MMU_FTR_HPTE_TABLE,
672 .icache_bsize = 32,
673 .dcache_bsize = 32,
674 .num_pmcs = 4,
675 .cpu_setup = __setup_cpu_604,
676 .machine_check = machine_check_generic,
677 .platform = "ppc604",
678 },
679 { /* 604ev */
680 .pvr_mask = 0xffff0000,
681 .pvr_value = 0x000a0000,
682 .cpu_name = "604ev",
683 .cpu_features = CPU_FTRS_604,
684 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
685 .mmu_features = MMU_FTR_HPTE_TABLE,
686 .icache_bsize = 32,
687 .dcache_bsize = 32,
688 .num_pmcs = 4,
689 .cpu_setup = __setup_cpu_604,
690 .machine_check = machine_check_generic,
691 .platform = "ppc604",
692 },
693 { /* 740/750 (0x4202, don't support TAU ?) */
694 .pvr_mask = 0xffffffff,
695 .pvr_value = 0x00084202,
696 .cpu_name = "740/750",
697 .cpu_features = CPU_FTRS_740_NOTAU,
698 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
699 .mmu_features = MMU_FTR_HPTE_TABLE,
700 .icache_bsize = 32,
701 .dcache_bsize = 32,
702 .num_pmcs = 4,
703 .cpu_setup = __setup_cpu_750,
704 .machine_check = machine_check_generic,
705 .platform = "ppc750",
706 },
707 { /* 750CX (80100 and 8010x?) */
708 .pvr_mask = 0xfffffff0,
709 .pvr_value = 0x00080100,
710 .cpu_name = "750CX",
711 .cpu_features = CPU_FTRS_750,
712 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
713 .mmu_features = MMU_FTR_HPTE_TABLE,
714 .icache_bsize = 32,
715 .dcache_bsize = 32,
716 .num_pmcs = 4,
717 .cpu_setup = __setup_cpu_750cx,
718 .machine_check = machine_check_generic,
719 .platform = "ppc750",
720 },
721 { /* 750CX (82201 and 82202) */
722 .pvr_mask = 0xfffffff0,
723 .pvr_value = 0x00082200,
724 .cpu_name = "750CX",
725 .cpu_features = CPU_FTRS_750,
726 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
727 .mmu_features = MMU_FTR_HPTE_TABLE,
728 .icache_bsize = 32,
729 .dcache_bsize = 32,
730 .num_pmcs = 4,
731 .pmc_type = PPC_PMC_IBM,
732 .cpu_setup = __setup_cpu_750cx,
733 .machine_check = machine_check_generic,
734 .platform = "ppc750",
735 },
736 { /* 750CXe (82214) */
737 .pvr_mask = 0xfffffff0,
738 .pvr_value = 0x00082210,
739 .cpu_name = "750CXe",
740 .cpu_features = CPU_FTRS_750,
741 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
742 .mmu_features = MMU_FTR_HPTE_TABLE,
743 .icache_bsize = 32,
744 .dcache_bsize = 32,
745 .num_pmcs = 4,
746 .pmc_type = PPC_PMC_IBM,
747 .cpu_setup = __setup_cpu_750cx,
748 .machine_check = machine_check_generic,
749 .platform = "ppc750",
750 },
751 { /* 750CXe "Gekko" (83214) */
752 .pvr_mask = 0xffffffff,
753 .pvr_value = 0x00083214,
754 .cpu_name = "750CXe",
755 .cpu_features = CPU_FTRS_750,
756 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
757 .mmu_features = MMU_FTR_HPTE_TABLE,
758 .icache_bsize = 32,
759 .dcache_bsize = 32,
760 .num_pmcs = 4,
761 .pmc_type = PPC_PMC_IBM,
762 .cpu_setup = __setup_cpu_750cx,
763 .machine_check = machine_check_generic,
764 .platform = "ppc750",
765 },
766 { /* 750CL (and "Broadway") */
767 .pvr_mask = 0xfffff0e0,
768 .pvr_value = 0x00087000,
769 .cpu_name = "750CL",
770 .cpu_features = CPU_FTRS_750CL,
771 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
772 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
773 .icache_bsize = 32,
774 .dcache_bsize = 32,
775 .num_pmcs = 4,
776 .pmc_type = PPC_PMC_IBM,
777 .cpu_setup = __setup_cpu_750,
778 .machine_check = machine_check_generic,
779 .platform = "ppc750",
780 .oprofile_cpu_type = "ppc/750",
781 .oprofile_type = PPC_OPROFILE_G4,
782 },
783 { /* 745/755 */
784 .pvr_mask = 0xfffff000,
785 .pvr_value = 0x00083000,
786 .cpu_name = "745/755",
787 .cpu_features = CPU_FTRS_750,
788 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
789 .mmu_features = MMU_FTR_HPTE_TABLE,
790 .icache_bsize = 32,
791 .dcache_bsize = 32,
792 .num_pmcs = 4,
793 .pmc_type = PPC_PMC_IBM,
794 .cpu_setup = __setup_cpu_750,
795 .machine_check = machine_check_generic,
796 .platform = "ppc750",
797 },
798 { /* 750FX rev 1.x */
799 .pvr_mask = 0xffffff00,
800 .pvr_value = 0x70000100,
801 .cpu_name = "750FX",
802 .cpu_features = CPU_FTRS_750FX1,
803 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
804 .mmu_features = MMU_FTR_HPTE_TABLE,
805 .icache_bsize = 32,
806 .dcache_bsize = 32,
807 .num_pmcs = 4,
808 .pmc_type = PPC_PMC_IBM,
809 .cpu_setup = __setup_cpu_750,
810 .machine_check = machine_check_generic,
811 .platform = "ppc750",
812 .oprofile_cpu_type = "ppc/750",
813 .oprofile_type = PPC_OPROFILE_G4,
814 },
815 { /* 750FX rev 2.0 must disable HID0[DPM] */
816 .pvr_mask = 0xffffffff,
817 .pvr_value = 0x70000200,
818 .cpu_name = "750FX",
819 .cpu_features = CPU_FTRS_750FX2,
820 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
821 .mmu_features = MMU_FTR_HPTE_TABLE,
822 .icache_bsize = 32,
823 .dcache_bsize = 32,
824 .num_pmcs = 4,
825 .pmc_type = PPC_PMC_IBM,
826 .cpu_setup = __setup_cpu_750,
827 .machine_check = machine_check_generic,
828 .platform = "ppc750",
829 .oprofile_cpu_type = "ppc/750",
830 .oprofile_type = PPC_OPROFILE_G4,
831 },
832 { /* 750FX (All revs except 2.0) */
833 .pvr_mask = 0xffff0000,
834 .pvr_value = 0x70000000,
835 .cpu_name = "750FX",
836 .cpu_features = CPU_FTRS_750FX,
837 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
838 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
839 .icache_bsize = 32,
840 .dcache_bsize = 32,
841 .num_pmcs = 4,
842 .pmc_type = PPC_PMC_IBM,
843 .cpu_setup = __setup_cpu_750fx,
844 .machine_check = machine_check_generic,
845 .platform = "ppc750",
846 .oprofile_cpu_type = "ppc/750",
847 .oprofile_type = PPC_OPROFILE_G4,
848 },
849 { /* 750GX */
850 .pvr_mask = 0xffff0000,
851 .pvr_value = 0x70020000,
852 .cpu_name = "750GX",
853 .cpu_features = CPU_FTRS_750GX,
854 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
855 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
856 .icache_bsize = 32,
857 .dcache_bsize = 32,
858 .num_pmcs = 4,
859 .pmc_type = PPC_PMC_IBM,
860 .cpu_setup = __setup_cpu_750fx,
861 .machine_check = machine_check_generic,
862 .platform = "ppc750",
863 .oprofile_cpu_type = "ppc/750",
864 .oprofile_type = PPC_OPROFILE_G4,
865 },
866 { /* 740/750 (L2CR bit need fixup for 740) */
867 .pvr_mask = 0xffff0000,
868 .pvr_value = 0x00080000,
869 .cpu_name = "740/750",
870 .cpu_features = CPU_FTRS_740,
871 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
872 .mmu_features = MMU_FTR_HPTE_TABLE,
873 .icache_bsize = 32,
874 .dcache_bsize = 32,
875 .num_pmcs = 4,
876 .pmc_type = PPC_PMC_IBM,
877 .cpu_setup = __setup_cpu_750,
878 .machine_check = machine_check_generic,
879 .platform = "ppc750",
880 },
881 { /* 7400 rev 1.1 ? (no TAU) */
882 .pvr_mask = 0xffffffff,
883 .pvr_value = 0x000c1101,
884 .cpu_name = "7400 (1.1)",
885 .cpu_features = CPU_FTRS_7400_NOTAU,
886 .cpu_user_features = COMMON_USER |
887 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
888 .mmu_features = MMU_FTR_HPTE_TABLE,
889 .icache_bsize = 32,
890 .dcache_bsize = 32,
891 .num_pmcs = 4,
892 .pmc_type = PPC_PMC_G4,
893 .cpu_setup = __setup_cpu_7400,
894 .machine_check = machine_check_generic,
895 .platform = "ppc7400",
896 },
897 { /* 7400 */
898 .pvr_mask = 0xffff0000,
899 .pvr_value = 0x000c0000,
900 .cpu_name = "7400",
901 .cpu_features = CPU_FTRS_7400,
902 .cpu_user_features = COMMON_USER |
903 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
904 .mmu_features = MMU_FTR_HPTE_TABLE,
905 .icache_bsize = 32,
906 .dcache_bsize = 32,
907 .num_pmcs = 4,
908 .pmc_type = PPC_PMC_G4,
909 .cpu_setup = __setup_cpu_7400,
910 .machine_check = machine_check_generic,
911 .platform = "ppc7400",
912 },
913 { /* 7410 */
914 .pvr_mask = 0xffff0000,
915 .pvr_value = 0x800c0000,
916 .cpu_name = "7410",
917 .cpu_features = CPU_FTRS_7400,
918 .cpu_user_features = COMMON_USER |
919 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
920 .mmu_features = MMU_FTR_HPTE_TABLE,
921 .icache_bsize = 32,
922 .dcache_bsize = 32,
923 .num_pmcs = 4,
924 .pmc_type = PPC_PMC_G4,
925 .cpu_setup = __setup_cpu_7410,
926 .machine_check = machine_check_generic,
927 .platform = "ppc7400",
928 },
929 { /* 7450 2.0 - no doze/nap */
930 .pvr_mask = 0xffffffff,
931 .pvr_value = 0x80000200,
932 .cpu_name = "7450",
933 .cpu_features = CPU_FTRS_7450_20,
934 .cpu_user_features = COMMON_USER |
935 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
936 .mmu_features = MMU_FTR_HPTE_TABLE,
937 .icache_bsize = 32,
938 .dcache_bsize = 32,
939 .num_pmcs = 6,
940 .pmc_type = PPC_PMC_G4,
941 .cpu_setup = __setup_cpu_745x,
942 .oprofile_cpu_type = "ppc/7450",
943 .oprofile_type = PPC_OPROFILE_G4,
944 .machine_check = machine_check_generic,
945 .platform = "ppc7450",
946 },
947 { /* 7450 2.1 */
948 .pvr_mask = 0xffffffff,
949 .pvr_value = 0x80000201,
950 .cpu_name = "7450",
951 .cpu_features = CPU_FTRS_7450_21,
952 .cpu_user_features = COMMON_USER |
953 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
954 .mmu_features = MMU_FTR_HPTE_TABLE,
955 .icache_bsize = 32,
956 .dcache_bsize = 32,
957 .num_pmcs = 6,
958 .pmc_type = PPC_PMC_G4,
959 .cpu_setup = __setup_cpu_745x,
960 .oprofile_cpu_type = "ppc/7450",
961 .oprofile_type = PPC_OPROFILE_G4,
962 .machine_check = machine_check_generic,
963 .platform = "ppc7450",
964 },
965 { /* 7450 2.3 and newer */
966 .pvr_mask = 0xffff0000,
967 .pvr_value = 0x80000000,
968 .cpu_name = "7450",
969 .cpu_features = CPU_FTRS_7450_23,
970 .cpu_user_features = COMMON_USER |
971 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
972 .mmu_features = MMU_FTR_HPTE_TABLE,
973 .icache_bsize = 32,
974 .dcache_bsize = 32,
975 .num_pmcs = 6,
976 .pmc_type = PPC_PMC_G4,
977 .cpu_setup = __setup_cpu_745x,
978 .oprofile_cpu_type = "ppc/7450",
979 .oprofile_type = PPC_OPROFILE_G4,
980 .machine_check = machine_check_generic,
981 .platform = "ppc7450",
982 },
983 { /* 7455 rev 1.x */
984 .pvr_mask = 0xffffff00,
985 .pvr_value = 0x80010100,
986 .cpu_name = "7455",
987 .cpu_features = CPU_FTRS_7455_1,
988 .cpu_user_features = COMMON_USER |
989 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
990 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
991 .icache_bsize = 32,
992 .dcache_bsize = 32,
993 .num_pmcs = 6,
994 .pmc_type = PPC_PMC_G4,
995 .cpu_setup = __setup_cpu_745x,
996 .oprofile_cpu_type = "ppc/7450",
997 .oprofile_type = PPC_OPROFILE_G4,
998 .machine_check = machine_check_generic,
999 .platform = "ppc7450",
1000 },
1001 { /* 7455 rev 2.0 */
1002 .pvr_mask = 0xffffffff,
1003 .pvr_value = 0x80010200,
1004 .cpu_name = "7455",
1005 .cpu_features = CPU_FTRS_7455_20,
1006 .cpu_user_features = COMMON_USER |
1007 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1008 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1009 .icache_bsize = 32,
1010 .dcache_bsize = 32,
1011 .num_pmcs = 6,
1012 .pmc_type = PPC_PMC_G4,
1013 .cpu_setup = __setup_cpu_745x,
1014 .oprofile_cpu_type = "ppc/7450",
1015 .oprofile_type = PPC_OPROFILE_G4,
1016 .machine_check = machine_check_generic,
1017 .platform = "ppc7450",
1018 },
1019 { /* 7455 others */
1020 .pvr_mask = 0xffff0000,
1021 .pvr_value = 0x80010000,
1022 .cpu_name = "7455",
1023 .cpu_features = CPU_FTRS_7455,
1024 .cpu_user_features = COMMON_USER |
1025 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1026 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1027 .icache_bsize = 32,
1028 .dcache_bsize = 32,
1029 .num_pmcs = 6,
1030 .pmc_type = PPC_PMC_G4,
1031 .cpu_setup = __setup_cpu_745x,
1032 .oprofile_cpu_type = "ppc/7450",
1033 .oprofile_type = PPC_OPROFILE_G4,
1034 .machine_check = machine_check_generic,
1035 .platform = "ppc7450",
1036 },
1037 { /* 7447/7457 Rev 1.0 */
1038 .pvr_mask = 0xffffffff,
1039 .pvr_value = 0x80020100,
1040 .cpu_name = "7447/7457",
1041 .cpu_features = CPU_FTRS_7447_10,
1042 .cpu_user_features = COMMON_USER |
1043 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1044 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1045 .icache_bsize = 32,
1046 .dcache_bsize = 32,
1047 .num_pmcs = 6,
1048 .pmc_type = PPC_PMC_G4,
1049 .cpu_setup = __setup_cpu_745x,
1050 .oprofile_cpu_type = "ppc/7450",
1051 .oprofile_type = PPC_OPROFILE_G4,
1052 .machine_check = machine_check_generic,
1053 .platform = "ppc7450",
1054 },
1055 { /* 7447/7457 Rev 1.1 */
1056 .pvr_mask = 0xffffffff,
1057 .pvr_value = 0x80020101,
1058 .cpu_name = "7447/7457",
1059 .cpu_features = CPU_FTRS_7447_10,
1060 .cpu_user_features = COMMON_USER |
1061 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1062 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1063 .icache_bsize = 32,
1064 .dcache_bsize = 32,
1065 .num_pmcs = 6,
1066 .pmc_type = PPC_PMC_G4,
1067 .cpu_setup = __setup_cpu_745x,
1068 .oprofile_cpu_type = "ppc/7450",
1069 .oprofile_type = PPC_OPROFILE_G4,
1070 .machine_check = machine_check_generic,
1071 .platform = "ppc7450",
1072 },
1073 { /* 7447/7457 Rev 1.2 and later */
1074 .pvr_mask = 0xffff0000,
1075 .pvr_value = 0x80020000,
1076 .cpu_name = "7447/7457",
1077 .cpu_features = CPU_FTRS_7447,
1078 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1079 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1080 .icache_bsize = 32,
1081 .dcache_bsize = 32,
1082 .num_pmcs = 6,
1083 .pmc_type = PPC_PMC_G4,
1084 .cpu_setup = __setup_cpu_745x,
1085 .oprofile_cpu_type = "ppc/7450",
1086 .oprofile_type = PPC_OPROFILE_G4,
1087 .machine_check = machine_check_generic,
1088 .platform = "ppc7450",
1089 },
1090 { /* 7447A */
1091 .pvr_mask = 0xffff0000,
1092 .pvr_value = 0x80030000,
1093 .cpu_name = "7447A",
1094 .cpu_features = CPU_FTRS_7447A,
1095 .cpu_user_features = COMMON_USER |
1096 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1097 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1098 .icache_bsize = 32,
1099 .dcache_bsize = 32,
1100 .num_pmcs = 6,
1101 .pmc_type = PPC_PMC_G4,
1102 .cpu_setup = __setup_cpu_745x,
1103 .oprofile_cpu_type = "ppc/7450",
1104 .oprofile_type = PPC_OPROFILE_G4,
1105 .machine_check = machine_check_generic,
1106 .platform = "ppc7450",
1107 },
1108 { /* 7448 */
1109 .pvr_mask = 0xffff0000,
1110 .pvr_value = 0x80040000,
1111 .cpu_name = "7448",
1112 .cpu_features = CPU_FTRS_7448,
1113 .cpu_user_features = COMMON_USER |
1114 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1115 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1116 .icache_bsize = 32,
1117 .dcache_bsize = 32,
1118 .num_pmcs = 6,
1119 .pmc_type = PPC_PMC_G4,
1120 .cpu_setup = __setup_cpu_745x,
1121 .oprofile_cpu_type = "ppc/7450",
1122 .oprofile_type = PPC_OPROFILE_G4,
1123 .machine_check = machine_check_generic,
1124 .platform = "ppc7450",
1125 },
1126 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1127 .pvr_mask = 0x7fff0000,
1128 .pvr_value = 0x00810000,
1129 .cpu_name = "82xx",
1130 .cpu_features = CPU_FTRS_82XX,
1131 .cpu_user_features = COMMON_USER,
1132 .mmu_features = 0,
1133 .icache_bsize = 32,
1134 .dcache_bsize = 32,
1135 .cpu_setup = __setup_cpu_603,
1136 .machine_check = machine_check_generic,
1137 .platform = "ppc603",
1138 },
1139 { /* All G2_LE (603e core, plus some) have the same pvr */
1140 .pvr_mask = 0x7fff0000,
1141 .pvr_value = 0x00820000,
1142 .cpu_name = "G2_LE",
1143 .cpu_features = CPU_FTRS_G2_LE,
1144 .cpu_user_features = COMMON_USER,
1145 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1146 .icache_bsize = 32,
1147 .dcache_bsize = 32,
1148 .cpu_setup = __setup_cpu_603,
1149 .machine_check = machine_check_generic,
1150 .platform = "ppc603",
1151 },
1152 { /* e300c1 (a 603e core, plus some) on 83xx */
1153 .pvr_mask = 0x7fff0000,
1154 .pvr_value = 0x00830000,
1155 .cpu_name = "e300c1",
1156 .cpu_features = CPU_FTRS_E300,
1157 .cpu_user_features = COMMON_USER,
1158 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1159 .icache_bsize = 32,
1160 .dcache_bsize = 32,
1161 .cpu_setup = __setup_cpu_603,
1162 .machine_check = machine_check_generic,
1163 .platform = "ppc603",
1164 },
1165 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1166 .pvr_mask = 0x7fff0000,
1167 .pvr_value = 0x00840000,
1168 .cpu_name = "e300c2",
1169 .cpu_features = CPU_FTRS_E300C2,
1170 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1171 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1172 MMU_FTR_NEED_DTLB_SW_LRU,
1173 .icache_bsize = 32,
1174 .dcache_bsize = 32,
1175 .cpu_setup = __setup_cpu_603,
1176 .machine_check = machine_check_generic,
1177 .platform = "ppc603",
1178 },
1179 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1180 .pvr_mask = 0x7fff0000,
1181 .pvr_value = 0x00850000,
1182 .cpu_name = "e300c3",
1183 .cpu_features = CPU_FTRS_E300,
1184 .cpu_user_features = COMMON_USER,
1185 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1186 MMU_FTR_NEED_DTLB_SW_LRU,
1187 .icache_bsize = 32,
1188 .dcache_bsize = 32,
1189 .cpu_setup = __setup_cpu_603,
1190 .num_pmcs = 4,
1191 .oprofile_cpu_type = "ppc/e300",
1192 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1193 .platform = "ppc603",
1194 },
1195 { /* e300c4 (e300c1, plus one IU) */
1196 .pvr_mask = 0x7fff0000,
1197 .pvr_value = 0x00860000,
1198 .cpu_name = "e300c4",
1199 .cpu_features = CPU_FTRS_E300,
1200 .cpu_user_features = COMMON_USER,
1201 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1202 MMU_FTR_NEED_DTLB_SW_LRU,
1203 .icache_bsize = 32,
1204 .dcache_bsize = 32,
1205 .cpu_setup = __setup_cpu_603,
1206 .machine_check = machine_check_generic,
1207 .num_pmcs = 4,
1208 .oprofile_cpu_type = "ppc/e300",
1209 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1210 .platform = "ppc603",
1211 },
1212 { /* default match, we assume split I/D cache & TB (non-601)... */
1213 .pvr_mask = 0x00000000,
1214 .pvr_value = 0x00000000,
1215 .cpu_name = "(generic PPC)",
1216 .cpu_features = CPU_FTRS_CLASSIC32,
1217 .cpu_user_features = COMMON_USER,
1218 .mmu_features = MMU_FTR_HPTE_TABLE,
1219 .icache_bsize = 32,
1220 .dcache_bsize = 32,
1221 .machine_check = machine_check_generic,
1222 .platform = "ppc603",
1223 },
1224 #endif /* CLASSIC_PPC */
1225 #ifdef CONFIG_8xx
1226 { /* 8xx */
1227 .pvr_mask = 0xffff0000,
1228 .pvr_value = 0x00500000,
1229 .cpu_name = "8xx",
1230 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1231 * if the 8xx code is there.... */
1232 .cpu_features = CPU_FTRS_8XX,
1233 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1234 .mmu_features = MMU_FTR_TYPE_8xx,
1235 .icache_bsize = 16,
1236 .dcache_bsize = 16,
1237 .platform = "ppc823",
1238 },
1239 #endif /* CONFIG_8xx */
1240 #ifdef CONFIG_40x
1241 { /* 403GC */
1242 .pvr_mask = 0xffffff00,
1243 .pvr_value = 0x00200200,
1244 .cpu_name = "403GC",
1245 .cpu_features = CPU_FTRS_40X,
1246 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1247 .mmu_features = MMU_FTR_TYPE_40x,
1248 .icache_bsize = 16,
1249 .dcache_bsize = 16,
1250 .machine_check = machine_check_4xx,
1251 .platform = "ppc403",
1252 },
1253 { /* 403GCX */
1254 .pvr_mask = 0xffffff00,
1255 .pvr_value = 0x00201400,
1256 .cpu_name = "403GCX",
1257 .cpu_features = CPU_FTRS_40X,
1258 .cpu_user_features = PPC_FEATURE_32 |
1259 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1260 .mmu_features = MMU_FTR_TYPE_40x,
1261 .icache_bsize = 16,
1262 .dcache_bsize = 16,
1263 .machine_check = machine_check_4xx,
1264 .platform = "ppc403",
1265 },
1266 { /* 403G ?? */
1267 .pvr_mask = 0xffff0000,
1268 .pvr_value = 0x00200000,
1269 .cpu_name = "403G ??",
1270 .cpu_features = CPU_FTRS_40X,
1271 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1272 .mmu_features = MMU_FTR_TYPE_40x,
1273 .icache_bsize = 16,
1274 .dcache_bsize = 16,
1275 .machine_check = machine_check_4xx,
1276 .platform = "ppc403",
1277 },
1278 { /* 405GP */
1279 .pvr_mask = 0xffff0000,
1280 .pvr_value = 0x40110000,
1281 .cpu_name = "405GP",
1282 .cpu_features = CPU_FTRS_40X,
1283 .cpu_user_features = PPC_FEATURE_32 |
1284 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1285 .mmu_features = MMU_FTR_TYPE_40x,
1286 .icache_bsize = 32,
1287 .dcache_bsize = 32,
1288 .machine_check = machine_check_4xx,
1289 .platform = "ppc405",
1290 },
1291 { /* STB 03xxx */
1292 .pvr_mask = 0xffff0000,
1293 .pvr_value = 0x40130000,
1294 .cpu_name = "STB03xxx",
1295 .cpu_features = CPU_FTRS_40X,
1296 .cpu_user_features = PPC_FEATURE_32 |
1297 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1298 .mmu_features = MMU_FTR_TYPE_40x,
1299 .icache_bsize = 32,
1300 .dcache_bsize = 32,
1301 .machine_check = machine_check_4xx,
1302 .platform = "ppc405",
1303 },
1304 { /* STB 04xxx */
1305 .pvr_mask = 0xffff0000,
1306 .pvr_value = 0x41810000,
1307 .cpu_name = "STB04xxx",
1308 .cpu_features = CPU_FTRS_40X,
1309 .cpu_user_features = PPC_FEATURE_32 |
1310 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1311 .mmu_features = MMU_FTR_TYPE_40x,
1312 .icache_bsize = 32,
1313 .dcache_bsize = 32,
1314 .machine_check = machine_check_4xx,
1315 .platform = "ppc405",
1316 },
1317 { /* NP405L */
1318 .pvr_mask = 0xffff0000,
1319 .pvr_value = 0x41610000,
1320 .cpu_name = "NP405L",
1321 .cpu_features = CPU_FTRS_40X,
1322 .cpu_user_features = PPC_FEATURE_32 |
1323 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1324 .mmu_features = MMU_FTR_TYPE_40x,
1325 .icache_bsize = 32,
1326 .dcache_bsize = 32,
1327 .machine_check = machine_check_4xx,
1328 .platform = "ppc405",
1329 },
1330 { /* NP4GS3 */
1331 .pvr_mask = 0xffff0000,
1332 .pvr_value = 0x40B10000,
1333 .cpu_name = "NP4GS3",
1334 .cpu_features = CPU_FTRS_40X,
1335 .cpu_user_features = PPC_FEATURE_32 |
1336 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1337 .mmu_features = MMU_FTR_TYPE_40x,
1338 .icache_bsize = 32,
1339 .dcache_bsize = 32,
1340 .machine_check = machine_check_4xx,
1341 .platform = "ppc405",
1342 },
1343 { /* NP405H */
1344 .pvr_mask = 0xffff0000,
1345 .pvr_value = 0x41410000,
1346 .cpu_name = "NP405H",
1347 .cpu_features = CPU_FTRS_40X,
1348 .cpu_user_features = PPC_FEATURE_32 |
1349 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1350 .mmu_features = MMU_FTR_TYPE_40x,
1351 .icache_bsize = 32,
1352 .dcache_bsize = 32,
1353 .machine_check = machine_check_4xx,
1354 .platform = "ppc405",
1355 },
1356 { /* 405GPr */
1357 .pvr_mask = 0xffff0000,
1358 .pvr_value = 0x50910000,
1359 .cpu_name = "405GPr",
1360 .cpu_features = CPU_FTRS_40X,
1361 .cpu_user_features = PPC_FEATURE_32 |
1362 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1363 .mmu_features = MMU_FTR_TYPE_40x,
1364 .icache_bsize = 32,
1365 .dcache_bsize = 32,
1366 .machine_check = machine_check_4xx,
1367 .platform = "ppc405",
1368 },
1369 { /* STBx25xx */
1370 .pvr_mask = 0xffff0000,
1371 .pvr_value = 0x51510000,
1372 .cpu_name = "STBx25xx",
1373 .cpu_features = CPU_FTRS_40X,
1374 .cpu_user_features = PPC_FEATURE_32 |
1375 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1376 .mmu_features = MMU_FTR_TYPE_40x,
1377 .icache_bsize = 32,
1378 .dcache_bsize = 32,
1379 .machine_check = machine_check_4xx,
1380 .platform = "ppc405",
1381 },
1382 { /* 405LP */
1383 .pvr_mask = 0xffff0000,
1384 .pvr_value = 0x41F10000,
1385 .cpu_name = "405LP",
1386 .cpu_features = CPU_FTRS_40X,
1387 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1388 .mmu_features = MMU_FTR_TYPE_40x,
1389 .icache_bsize = 32,
1390 .dcache_bsize = 32,
1391 .machine_check = machine_check_4xx,
1392 .platform = "ppc405",
1393 },
1394 { /* Xilinx Virtex-II Pro */
1395 .pvr_mask = 0xfffff000,
1396 .pvr_value = 0x20010000,
1397 .cpu_name = "Virtex-II Pro",
1398 .cpu_features = CPU_FTRS_40X,
1399 .cpu_user_features = PPC_FEATURE_32 |
1400 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1401 .mmu_features = MMU_FTR_TYPE_40x,
1402 .icache_bsize = 32,
1403 .dcache_bsize = 32,
1404 .machine_check = machine_check_4xx,
1405 .platform = "ppc405",
1406 },
1407 { /* Xilinx Virtex-4 FX */
1408 .pvr_mask = 0xfffff000,
1409 .pvr_value = 0x20011000,
1410 .cpu_name = "Virtex-4 FX",
1411 .cpu_features = CPU_FTRS_40X,
1412 .cpu_user_features = PPC_FEATURE_32 |
1413 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1414 .mmu_features = MMU_FTR_TYPE_40x,
1415 .icache_bsize = 32,
1416 .dcache_bsize = 32,
1417 .machine_check = machine_check_4xx,
1418 .platform = "ppc405",
1419 },
1420 { /* 405EP */
1421 .pvr_mask = 0xffff0000,
1422 .pvr_value = 0x51210000,
1423 .cpu_name = "405EP",
1424 .cpu_features = CPU_FTRS_40X,
1425 .cpu_user_features = PPC_FEATURE_32 |
1426 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1427 .mmu_features = MMU_FTR_TYPE_40x,
1428 .icache_bsize = 32,
1429 .dcache_bsize = 32,
1430 .machine_check = machine_check_4xx,
1431 .platform = "ppc405",
1432 },
1433 { /* 405EX Rev. A/B with Security */
1434 .pvr_mask = 0xffff000f,
1435 .pvr_value = 0x12910007,
1436 .cpu_name = "405EX Rev. A/B",
1437 .cpu_features = CPU_FTRS_40X,
1438 .cpu_user_features = PPC_FEATURE_32 |
1439 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1440 .mmu_features = MMU_FTR_TYPE_40x,
1441 .icache_bsize = 32,
1442 .dcache_bsize = 32,
1443 .machine_check = machine_check_4xx,
1444 .platform = "ppc405",
1445 },
1446 { /* 405EX Rev. C without Security */
1447 .pvr_mask = 0xffff000f,
1448 .pvr_value = 0x1291000d,
1449 .cpu_name = "405EX Rev. C",
1450 .cpu_features = CPU_FTRS_40X,
1451 .cpu_user_features = PPC_FEATURE_32 |
1452 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1453 .mmu_features = MMU_FTR_TYPE_40x,
1454 .icache_bsize = 32,
1455 .dcache_bsize = 32,
1456 .machine_check = machine_check_4xx,
1457 .platform = "ppc405",
1458 },
1459 { /* 405EX Rev. C with Security */
1460 .pvr_mask = 0xffff000f,
1461 .pvr_value = 0x1291000f,
1462 .cpu_name = "405EX Rev. C",
1463 .cpu_features = CPU_FTRS_40X,
1464 .cpu_user_features = PPC_FEATURE_32 |
1465 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1466 .mmu_features = MMU_FTR_TYPE_40x,
1467 .icache_bsize = 32,
1468 .dcache_bsize = 32,
1469 .machine_check = machine_check_4xx,
1470 .platform = "ppc405",
1471 },
1472 { /* 405EX Rev. D without Security */
1473 .pvr_mask = 0xffff000f,
1474 .pvr_value = 0x12910003,
1475 .cpu_name = "405EX Rev. D",
1476 .cpu_features = CPU_FTRS_40X,
1477 .cpu_user_features = PPC_FEATURE_32 |
1478 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1479 .mmu_features = MMU_FTR_TYPE_40x,
1480 .icache_bsize = 32,
1481 .dcache_bsize = 32,
1482 .machine_check = machine_check_4xx,
1483 .platform = "ppc405",
1484 },
1485 { /* 405EX Rev. D with Security */
1486 .pvr_mask = 0xffff000f,
1487 .pvr_value = 0x12910005,
1488 .cpu_name = "405EX Rev. D",
1489 .cpu_features = CPU_FTRS_40X,
1490 .cpu_user_features = PPC_FEATURE_32 |
1491 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1492 .mmu_features = MMU_FTR_TYPE_40x,
1493 .icache_bsize = 32,
1494 .dcache_bsize = 32,
1495 .machine_check = machine_check_4xx,
1496 .platform = "ppc405",
1497 },
1498 { /* 405EXr Rev. A/B without Security */
1499 .pvr_mask = 0xffff000f,
1500 .pvr_value = 0x12910001,
1501 .cpu_name = "405EXr Rev. A/B",
1502 .cpu_features = CPU_FTRS_40X,
1503 .cpu_user_features = PPC_FEATURE_32 |
1504 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1505 .mmu_features = MMU_FTR_TYPE_40x,
1506 .icache_bsize = 32,
1507 .dcache_bsize = 32,
1508 .machine_check = machine_check_4xx,
1509 .platform = "ppc405",
1510 },
1511 { /* 405EXr Rev. C without Security */
1512 .pvr_mask = 0xffff000f,
1513 .pvr_value = 0x12910009,
1514 .cpu_name = "405EXr Rev. C",
1515 .cpu_features = CPU_FTRS_40X,
1516 .cpu_user_features = PPC_FEATURE_32 |
1517 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1518 .mmu_features = MMU_FTR_TYPE_40x,
1519 .icache_bsize = 32,
1520 .dcache_bsize = 32,
1521 .machine_check = machine_check_4xx,
1522 .platform = "ppc405",
1523 },
1524 { /* 405EXr Rev. C with Security */
1525 .pvr_mask = 0xffff000f,
1526 .pvr_value = 0x1291000b,
1527 .cpu_name = "405EXr Rev. C",
1528 .cpu_features = CPU_FTRS_40X,
1529 .cpu_user_features = PPC_FEATURE_32 |
1530 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1531 .mmu_features = MMU_FTR_TYPE_40x,
1532 .icache_bsize = 32,
1533 .dcache_bsize = 32,
1534 .machine_check = machine_check_4xx,
1535 .platform = "ppc405",
1536 },
1537 { /* 405EXr Rev. D without Security */
1538 .pvr_mask = 0xffff000f,
1539 .pvr_value = 0x12910000,
1540 .cpu_name = "405EXr Rev. D",
1541 .cpu_features = CPU_FTRS_40X,
1542 .cpu_user_features = PPC_FEATURE_32 |
1543 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1544 .mmu_features = MMU_FTR_TYPE_40x,
1545 .icache_bsize = 32,
1546 .dcache_bsize = 32,
1547 .machine_check = machine_check_4xx,
1548 .platform = "ppc405",
1549 },
1550 { /* 405EXr Rev. D with Security */
1551 .pvr_mask = 0xffff000f,
1552 .pvr_value = 0x12910002,
1553 .cpu_name = "405EXr Rev. D",
1554 .cpu_features = CPU_FTRS_40X,
1555 .cpu_user_features = PPC_FEATURE_32 |
1556 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1557 .mmu_features = MMU_FTR_TYPE_40x,
1558 .icache_bsize = 32,
1559 .dcache_bsize = 32,
1560 .machine_check = machine_check_4xx,
1561 .platform = "ppc405",
1562 },
1563 {
1564 /* 405EZ */
1565 .pvr_mask = 0xffff0000,
1566 .pvr_value = 0x41510000,
1567 .cpu_name = "405EZ",
1568 .cpu_features = CPU_FTRS_40X,
1569 .cpu_user_features = PPC_FEATURE_32 |
1570 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1571 .mmu_features = MMU_FTR_TYPE_40x,
1572 .icache_bsize = 32,
1573 .dcache_bsize = 32,
1574 .machine_check = machine_check_4xx,
1575 .platform = "ppc405",
1576 },
1577 { /* APM8018X */
1578 .pvr_mask = 0xffff0000,
1579 .pvr_value = 0x7ff11432,
1580 .cpu_name = "APM8018X",
1581 .cpu_features = CPU_FTRS_40X,
1582 .cpu_user_features = PPC_FEATURE_32 |
1583 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1584 .mmu_features = MMU_FTR_TYPE_40x,
1585 .icache_bsize = 32,
1586 .dcache_bsize = 32,
1587 .machine_check = machine_check_4xx,
1588 .platform = "ppc405",
1589 },
1590 { /* default match */
1591 .pvr_mask = 0x00000000,
1592 .pvr_value = 0x00000000,
1593 .cpu_name = "(generic 40x PPC)",
1594 .cpu_features = CPU_FTRS_40X,
1595 .cpu_user_features = PPC_FEATURE_32 |
1596 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1597 .mmu_features = MMU_FTR_TYPE_40x,
1598 .icache_bsize = 32,
1599 .dcache_bsize = 32,
1600 .machine_check = machine_check_4xx,
1601 .platform = "ppc405",
1602 }
1603
1604 #endif /* CONFIG_40x */
1605 #ifdef CONFIG_44x
1606 {
1607 .pvr_mask = 0xf0000fff,
1608 .pvr_value = 0x40000850,
1609 .cpu_name = "440GR Rev. A",
1610 .cpu_features = CPU_FTRS_44X,
1611 .cpu_user_features = COMMON_USER_BOOKE,
1612 .mmu_features = MMU_FTR_TYPE_44x,
1613 .icache_bsize = 32,
1614 .dcache_bsize = 32,
1615 .machine_check = machine_check_4xx,
1616 .platform = "ppc440",
1617 },
1618 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1619 .pvr_mask = 0xf0000fff,
1620 .pvr_value = 0x40000858,
1621 .cpu_name = "440EP Rev. A",
1622 .cpu_features = CPU_FTRS_44X,
1623 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1624 .mmu_features = MMU_FTR_TYPE_44x,
1625 .icache_bsize = 32,
1626 .dcache_bsize = 32,
1627 .cpu_setup = __setup_cpu_440ep,
1628 .machine_check = machine_check_4xx,
1629 .platform = "ppc440",
1630 },
1631 {
1632 .pvr_mask = 0xf0000fff,
1633 .pvr_value = 0x400008d3,
1634 .cpu_name = "440GR Rev. B",
1635 .cpu_features = CPU_FTRS_44X,
1636 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1637 .mmu_features = MMU_FTR_TYPE_44x,
1638 .icache_bsize = 32,
1639 .dcache_bsize = 32,
1640 .machine_check = machine_check_4xx,
1641 .platform = "ppc440",
1642 },
1643 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1644 .pvr_mask = 0xf0000ff7,
1645 .pvr_value = 0x400008d4,
1646 .cpu_name = "440EP Rev. C",
1647 .cpu_features = CPU_FTRS_44X,
1648 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1649 .mmu_features = MMU_FTR_TYPE_44x,
1650 .icache_bsize = 32,
1651 .dcache_bsize = 32,
1652 .cpu_setup = __setup_cpu_440ep,
1653 .machine_check = machine_check_4xx,
1654 .platform = "ppc440",
1655 },
1656 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1657 .pvr_mask = 0xf0000fff,
1658 .pvr_value = 0x400008db,
1659 .cpu_name = "440EP Rev. B",
1660 .cpu_features = CPU_FTRS_44X,
1661 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1662 .mmu_features = MMU_FTR_TYPE_44x,
1663 .icache_bsize = 32,
1664 .dcache_bsize = 32,
1665 .cpu_setup = __setup_cpu_440ep,
1666 .machine_check = machine_check_4xx,
1667 .platform = "ppc440",
1668 },
1669 { /* 440GRX */
1670 .pvr_mask = 0xf0000ffb,
1671 .pvr_value = 0x200008D0,
1672 .cpu_name = "440GRX",
1673 .cpu_features = CPU_FTRS_44X,
1674 .cpu_user_features = COMMON_USER_BOOKE,
1675 .mmu_features = MMU_FTR_TYPE_44x,
1676 .icache_bsize = 32,
1677 .dcache_bsize = 32,
1678 .cpu_setup = __setup_cpu_440grx,
1679 .machine_check = machine_check_440A,
1680 .platform = "ppc440",
1681 },
1682 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1683 .pvr_mask = 0xf0000ffb,
1684 .pvr_value = 0x200008D8,
1685 .cpu_name = "440EPX",
1686 .cpu_features = CPU_FTRS_44X,
1687 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1688 .mmu_features = MMU_FTR_TYPE_44x,
1689 .icache_bsize = 32,
1690 .dcache_bsize = 32,
1691 .cpu_setup = __setup_cpu_440epx,
1692 .machine_check = machine_check_440A,
1693 .platform = "ppc440",
1694 },
1695 { /* 440GP Rev. B */
1696 .pvr_mask = 0xf0000fff,
1697 .pvr_value = 0x40000440,
1698 .cpu_name = "440GP Rev. B",
1699 .cpu_features = CPU_FTRS_44X,
1700 .cpu_user_features = COMMON_USER_BOOKE,
1701 .mmu_features = MMU_FTR_TYPE_44x,
1702 .icache_bsize = 32,
1703 .dcache_bsize = 32,
1704 .machine_check = machine_check_4xx,
1705 .platform = "ppc440gp",
1706 },
1707 { /* 440GP Rev. C */
1708 .pvr_mask = 0xf0000fff,
1709 .pvr_value = 0x40000481,
1710 .cpu_name = "440GP Rev. C",
1711 .cpu_features = CPU_FTRS_44X,
1712 .cpu_user_features = COMMON_USER_BOOKE,
1713 .mmu_features = MMU_FTR_TYPE_44x,
1714 .icache_bsize = 32,
1715 .dcache_bsize = 32,
1716 .machine_check = machine_check_4xx,
1717 .platform = "ppc440gp",
1718 },
1719 { /* 440GX Rev. A */
1720 .pvr_mask = 0xf0000fff,
1721 .pvr_value = 0x50000850,
1722 .cpu_name = "440GX Rev. A",
1723 .cpu_features = CPU_FTRS_44X,
1724 .cpu_user_features = COMMON_USER_BOOKE,
1725 .mmu_features = MMU_FTR_TYPE_44x,
1726 .icache_bsize = 32,
1727 .dcache_bsize = 32,
1728 .cpu_setup = __setup_cpu_440gx,
1729 .machine_check = machine_check_440A,
1730 .platform = "ppc440",
1731 },
1732 { /* 440GX Rev. B */
1733 .pvr_mask = 0xf0000fff,
1734 .pvr_value = 0x50000851,
1735 .cpu_name = "440GX Rev. B",
1736 .cpu_features = CPU_FTRS_44X,
1737 .cpu_user_features = COMMON_USER_BOOKE,
1738 .mmu_features = MMU_FTR_TYPE_44x,
1739 .icache_bsize = 32,
1740 .dcache_bsize = 32,
1741 .cpu_setup = __setup_cpu_440gx,
1742 .machine_check = machine_check_440A,
1743 .platform = "ppc440",
1744 },
1745 { /* 440GX Rev. C */
1746 .pvr_mask = 0xf0000fff,
1747 .pvr_value = 0x50000892,
1748 .cpu_name = "440GX Rev. C",
1749 .cpu_features = CPU_FTRS_44X,
1750 .cpu_user_features = COMMON_USER_BOOKE,
1751 .mmu_features = MMU_FTR_TYPE_44x,
1752 .icache_bsize = 32,
1753 .dcache_bsize = 32,
1754 .cpu_setup = __setup_cpu_440gx,
1755 .machine_check = machine_check_440A,
1756 .platform = "ppc440",
1757 },
1758 { /* 440GX Rev. F */
1759 .pvr_mask = 0xf0000fff,
1760 .pvr_value = 0x50000894,
1761 .cpu_name = "440GX Rev. F",
1762 .cpu_features = CPU_FTRS_44X,
1763 .cpu_user_features = COMMON_USER_BOOKE,
1764 .mmu_features = MMU_FTR_TYPE_44x,
1765 .icache_bsize = 32,
1766 .dcache_bsize = 32,
1767 .cpu_setup = __setup_cpu_440gx,
1768 .machine_check = machine_check_440A,
1769 .platform = "ppc440",
1770 },
1771 { /* 440SP Rev. A */
1772 .pvr_mask = 0xfff00fff,
1773 .pvr_value = 0x53200891,
1774 .cpu_name = "440SP Rev. A",
1775 .cpu_features = CPU_FTRS_44X,
1776 .cpu_user_features = COMMON_USER_BOOKE,
1777 .mmu_features = MMU_FTR_TYPE_44x,
1778 .icache_bsize = 32,
1779 .dcache_bsize = 32,
1780 .machine_check = machine_check_4xx,
1781 .platform = "ppc440",
1782 },
1783 { /* 440SPe Rev. A */
1784 .pvr_mask = 0xfff00fff,
1785 .pvr_value = 0x53400890,
1786 .cpu_name = "440SPe Rev. A",
1787 .cpu_features = CPU_FTRS_44X,
1788 .cpu_user_features = COMMON_USER_BOOKE,
1789 .mmu_features = MMU_FTR_TYPE_44x,
1790 .icache_bsize = 32,
1791 .dcache_bsize = 32,
1792 .cpu_setup = __setup_cpu_440spe,
1793 .machine_check = machine_check_440A,
1794 .platform = "ppc440",
1795 },
1796 { /* 440SPe Rev. B */
1797 .pvr_mask = 0xfff00fff,
1798 .pvr_value = 0x53400891,
1799 .cpu_name = "440SPe Rev. B",
1800 .cpu_features = CPU_FTRS_44X,
1801 .cpu_user_features = COMMON_USER_BOOKE,
1802 .mmu_features = MMU_FTR_TYPE_44x,
1803 .icache_bsize = 32,
1804 .dcache_bsize = 32,
1805 .cpu_setup = __setup_cpu_440spe,
1806 .machine_check = machine_check_440A,
1807 .platform = "ppc440",
1808 },
1809 { /* 440 in Xilinx Virtex-5 FXT */
1810 .pvr_mask = 0xfffffff0,
1811 .pvr_value = 0x7ff21910,
1812 .cpu_name = "440 in Virtex-5 FXT",
1813 .cpu_features = CPU_FTRS_44X,
1814 .cpu_user_features = COMMON_USER_BOOKE,
1815 .mmu_features = MMU_FTR_TYPE_44x,
1816 .icache_bsize = 32,
1817 .dcache_bsize = 32,
1818 .cpu_setup = __setup_cpu_440x5,
1819 .machine_check = machine_check_440A,
1820 .platform = "ppc440",
1821 },
1822 { /* 460EX */
1823 .pvr_mask = 0xffff0006,
1824 .pvr_value = 0x13020002,
1825 .cpu_name = "460EX",
1826 .cpu_features = CPU_FTRS_440x6,
1827 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1828 .mmu_features = MMU_FTR_TYPE_44x,
1829 .icache_bsize = 32,
1830 .dcache_bsize = 32,
1831 .cpu_setup = __setup_cpu_460ex,
1832 .machine_check = machine_check_440A,
1833 .platform = "ppc440",
1834 },
1835 { /* 460EX Rev B */
1836 .pvr_mask = 0xffff0007,
1837 .pvr_value = 0x13020004,
1838 .cpu_name = "460EX Rev. B",
1839 .cpu_features = CPU_FTRS_440x6,
1840 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1841 .mmu_features = MMU_FTR_TYPE_44x,
1842 .icache_bsize = 32,
1843 .dcache_bsize = 32,
1844 .cpu_setup = __setup_cpu_460ex,
1845 .machine_check = machine_check_440A,
1846 .platform = "ppc440",
1847 },
1848 { /* 460GT */
1849 .pvr_mask = 0xffff0006,
1850 .pvr_value = 0x13020000,
1851 .cpu_name = "460GT",
1852 .cpu_features = CPU_FTRS_440x6,
1853 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1854 .mmu_features = MMU_FTR_TYPE_44x,
1855 .icache_bsize = 32,
1856 .dcache_bsize = 32,
1857 .cpu_setup = __setup_cpu_460gt,
1858 .machine_check = machine_check_440A,
1859 .platform = "ppc440",
1860 },
1861 { /* 460GT Rev B */
1862 .pvr_mask = 0xffff0007,
1863 .pvr_value = 0x13020005,
1864 .cpu_name = "460GT Rev. B",
1865 .cpu_features = CPU_FTRS_440x6,
1866 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1867 .mmu_features = MMU_FTR_TYPE_44x,
1868 .icache_bsize = 32,
1869 .dcache_bsize = 32,
1870 .cpu_setup = __setup_cpu_460gt,
1871 .machine_check = machine_check_440A,
1872 .platform = "ppc440",
1873 },
1874 { /* 460SX */
1875 .pvr_mask = 0xffffff00,
1876 .pvr_value = 0x13541800,
1877 .cpu_name = "460SX",
1878 .cpu_features = CPU_FTRS_44X,
1879 .cpu_user_features = COMMON_USER_BOOKE,
1880 .mmu_features = MMU_FTR_TYPE_44x,
1881 .icache_bsize = 32,
1882 .dcache_bsize = 32,
1883 .cpu_setup = __setup_cpu_460sx,
1884 .machine_check = machine_check_440A,
1885 .platform = "ppc440",
1886 },
1887 { /* 464 in APM821xx */
1888 .pvr_mask = 0xfffffff0,
1889 .pvr_value = 0x12C41C80,
1890 .cpu_name = "APM821XX",
1891 .cpu_features = CPU_FTRS_44X,
1892 .cpu_user_features = COMMON_USER_BOOKE |
1893 PPC_FEATURE_HAS_FPU,
1894 .mmu_features = MMU_FTR_TYPE_44x,
1895 .icache_bsize = 32,
1896 .dcache_bsize = 32,
1897 .cpu_setup = __setup_cpu_apm821xx,
1898 .machine_check = machine_check_440A,
1899 .platform = "ppc440",
1900 },
1901 { /* 476 DD2 core */
1902 .pvr_mask = 0xffffffff,
1903 .pvr_value = 0x11a52080,
1904 .cpu_name = "476",
1905 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1906 .cpu_user_features = COMMON_USER_BOOKE |
1907 PPC_FEATURE_HAS_FPU,
1908 .mmu_features = MMU_FTR_TYPE_47x |
1909 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1910 .icache_bsize = 32,
1911 .dcache_bsize = 128,
1912 .machine_check = machine_check_47x,
1913 .platform = "ppc470",
1914 },
1915 { /* 476fpe */
1916 .pvr_mask = 0xffff0000,
1917 .pvr_value = 0x7ff50000,
1918 .cpu_name = "476fpe",
1919 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1920 .cpu_user_features = COMMON_USER_BOOKE |
1921 PPC_FEATURE_HAS_FPU,
1922 .mmu_features = MMU_FTR_TYPE_47x |
1923 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1924 .icache_bsize = 32,
1925 .dcache_bsize = 128,
1926 .machine_check = machine_check_47x,
1927 .platform = "ppc470",
1928 },
1929 { /* 476 iss */
1930 .pvr_mask = 0xffff0000,
1931 .pvr_value = 0x00050000,
1932 .cpu_name = "476",
1933 .cpu_features = CPU_FTRS_47X,
1934 .cpu_user_features = COMMON_USER_BOOKE |
1935 PPC_FEATURE_HAS_FPU,
1936 .mmu_features = MMU_FTR_TYPE_47x |
1937 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1938 .icache_bsize = 32,
1939 .dcache_bsize = 128,
1940 .machine_check = machine_check_47x,
1941 .platform = "ppc470",
1942 },
1943 { /* 476 others */
1944 .pvr_mask = 0xffff0000,
1945 .pvr_value = 0x11a50000,
1946 .cpu_name = "476",
1947 .cpu_features = CPU_FTRS_47X,
1948 .cpu_user_features = COMMON_USER_BOOKE |
1949 PPC_FEATURE_HAS_FPU,
1950 .mmu_features = MMU_FTR_TYPE_47x |
1951 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1952 .icache_bsize = 32,
1953 .dcache_bsize = 128,
1954 .machine_check = machine_check_47x,
1955 .platform = "ppc470",
1956 },
1957 { /* default match */
1958 .pvr_mask = 0x00000000,
1959 .pvr_value = 0x00000000,
1960 .cpu_name = "(generic 44x PPC)",
1961 .cpu_features = CPU_FTRS_44X,
1962 .cpu_user_features = COMMON_USER_BOOKE,
1963 .mmu_features = MMU_FTR_TYPE_44x,
1964 .icache_bsize = 32,
1965 .dcache_bsize = 32,
1966 .machine_check = machine_check_4xx,
1967 .platform = "ppc440",
1968 }
1969 #endif /* CONFIG_44x */
1970 #ifdef CONFIG_E200
1971 { /* e200z5 */
1972 .pvr_mask = 0xfff00000,
1973 .pvr_value = 0x81000000,
1974 .cpu_name = "e200z5",
1975 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1976 .cpu_features = CPU_FTRS_E200,
1977 .cpu_user_features = COMMON_USER_BOOKE |
1978 PPC_FEATURE_HAS_EFP_SINGLE |
1979 PPC_FEATURE_UNIFIED_CACHE,
1980 .mmu_features = MMU_FTR_TYPE_FSL_E,
1981 .dcache_bsize = 32,
1982 .machine_check = machine_check_e200,
1983 .platform = "ppc5554",
1984 },
1985 { /* e200z6 */
1986 .pvr_mask = 0xfff00000,
1987 .pvr_value = 0x81100000,
1988 .cpu_name = "e200z6",
1989 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1990 .cpu_features = CPU_FTRS_E200,
1991 .cpu_user_features = COMMON_USER_BOOKE |
1992 PPC_FEATURE_HAS_SPE_COMP |
1993 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1994 PPC_FEATURE_UNIFIED_CACHE,
1995 .mmu_features = MMU_FTR_TYPE_FSL_E,
1996 .dcache_bsize = 32,
1997 .machine_check = machine_check_e200,
1998 .platform = "ppc5554",
1999 },
2000 { /* default match */
2001 .pvr_mask = 0x00000000,
2002 .pvr_value = 0x00000000,
2003 .cpu_name = "(generic E200 PPC)",
2004 .cpu_features = CPU_FTRS_E200,
2005 .cpu_user_features = COMMON_USER_BOOKE |
2006 PPC_FEATURE_HAS_EFP_SINGLE |
2007 PPC_FEATURE_UNIFIED_CACHE,
2008 .mmu_features = MMU_FTR_TYPE_FSL_E,
2009 .dcache_bsize = 32,
2010 .cpu_setup = __setup_cpu_e200,
2011 .machine_check = machine_check_e200,
2012 .platform = "ppc5554",
2013 }
2014 #endif /* CONFIG_E200 */
2015 #endif /* CONFIG_PPC32 */
2016 #ifdef CONFIG_E500
2017 #ifdef CONFIG_PPC32
2018 { /* e500 */
2019 .pvr_mask = 0xffff0000,
2020 .pvr_value = 0x80200000,
2021 .cpu_name = "e500",
2022 .cpu_features = CPU_FTRS_E500,
2023 .cpu_user_features = COMMON_USER_BOOKE |
2024 PPC_FEATURE_HAS_SPE_COMP |
2025 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2026 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2027 .mmu_features = MMU_FTR_TYPE_FSL_E,
2028 .icache_bsize = 32,
2029 .dcache_bsize = 32,
2030 .num_pmcs = 4,
2031 .oprofile_cpu_type = "ppc/e500",
2032 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2033 .cpu_setup = __setup_cpu_e500v1,
2034 .machine_check = machine_check_e500,
2035 .platform = "ppc8540",
2036 },
2037 { /* e500v2 */
2038 .pvr_mask = 0xffff0000,
2039 .pvr_value = 0x80210000,
2040 .cpu_name = "e500v2",
2041 .cpu_features = CPU_FTRS_E500_2,
2042 .cpu_user_features = COMMON_USER_BOOKE |
2043 PPC_FEATURE_HAS_SPE_COMP |
2044 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2045 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2046 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2047 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2048 .icache_bsize = 32,
2049 .dcache_bsize = 32,
2050 .num_pmcs = 4,
2051 .oprofile_cpu_type = "ppc/e500",
2052 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2053 .cpu_setup = __setup_cpu_e500v2,
2054 .machine_check = machine_check_e500,
2055 .platform = "ppc8548",
2056 },
2057 { /* e500mc */
2058 .pvr_mask = 0xffff0000,
2059 .pvr_value = 0x80230000,
2060 .cpu_name = "e500mc",
2061 .cpu_features = CPU_FTRS_E500MC,
2062 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2063 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2064 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2065 MMU_FTR_USE_TLBILX,
2066 .icache_bsize = 64,
2067 .dcache_bsize = 64,
2068 .num_pmcs = 4,
2069 .oprofile_cpu_type = "ppc/e500mc",
2070 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2071 .cpu_setup = __setup_cpu_e500mc,
2072 .machine_check = machine_check_e500mc,
2073 .platform = "ppce500mc",
2074 },
2075 #endif /* CONFIG_PPC32 */
2076 { /* e5500 */
2077 .pvr_mask = 0xffff0000,
2078 .pvr_value = 0x80240000,
2079 .cpu_name = "e5500",
2080 .cpu_features = CPU_FTRS_E5500,
2081 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2082 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2083 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2084 MMU_FTR_USE_TLBILX,
2085 .icache_bsize = 64,
2086 .dcache_bsize = 64,
2087 .num_pmcs = 4,
2088 .oprofile_cpu_type = "ppc/e500mc",
2089 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2090 .cpu_setup = __setup_cpu_e5500,
2091 #ifndef CONFIG_PPC32
2092 .cpu_restore = __restore_cpu_e5500,
2093 #endif
2094 .machine_check = machine_check_e500mc,
2095 .platform = "ppce5500",
2096 },
2097 { /* e6500 */
2098 .pvr_mask = 0xffff0000,
2099 .pvr_value = 0x80400000,
2100 .cpu_name = "e6500",
2101 .cpu_features = CPU_FTRS_E6500,
2102 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2103 PPC_FEATURE_HAS_ALTIVEC_COMP,
2104 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2105 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2106 MMU_FTR_USE_TLBILX,
2107 .icache_bsize = 64,
2108 .dcache_bsize = 64,
2109 .num_pmcs = 6,
2110 .oprofile_cpu_type = "ppc/e6500",
2111 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2112 .cpu_setup = __setup_cpu_e6500,
2113 #ifndef CONFIG_PPC32
2114 .cpu_restore = __restore_cpu_e6500,
2115 #endif
2116 .machine_check = machine_check_e500mc,
2117 .platform = "ppce6500",
2118 },
2119 #ifdef CONFIG_PPC32
2120 { /* default match */
2121 .pvr_mask = 0x00000000,
2122 .pvr_value = 0x00000000,
2123 .cpu_name = "(generic E500 PPC)",
2124 .cpu_features = CPU_FTRS_E500,
2125 .cpu_user_features = COMMON_USER_BOOKE |
2126 PPC_FEATURE_HAS_SPE_COMP |
2127 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2128 .mmu_features = MMU_FTR_TYPE_FSL_E,
2129 .icache_bsize = 32,
2130 .dcache_bsize = 32,
2131 .machine_check = machine_check_e500,
2132 .platform = "powerpc",
2133 }
2134 #endif /* CONFIG_PPC32 */
2135 #endif /* CONFIG_E500 */
2136
2137 #ifdef CONFIG_PPC_A2
2138 { /* Standard A2 (>= DD2) + FPU core */
2139 .pvr_mask = 0xffff0000,
2140 .pvr_value = 0x00480000,
2141 .cpu_name = "A2 (>= DD2)",
2142 .cpu_features = CPU_FTRS_A2,
2143 .cpu_user_features = COMMON_USER_PPC64,
2144 .mmu_features = MMU_FTRS_A2,
2145 .icache_bsize = 64,
2146 .dcache_bsize = 64,
2147 .num_pmcs = 0,
2148 .cpu_setup = __setup_cpu_a2,
2149 .cpu_restore = __restore_cpu_a2,
2150 .machine_check = machine_check_generic,
2151 .platform = "ppca2",
2152 },
2153 { /* This is a default entry to get going, to be replaced by
2154 * a real one at some stage
2155 */
2156 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2157 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2158 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2159 .pvr_mask = 0x00000000,
2160 .pvr_value = 0x00000000,
2161 .cpu_name = "Book3E",
2162 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2163 .cpu_user_features = COMMON_USER_PPC64,
2164 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2165 MMU_FTR_USE_TLBIVAX_BCAST |
2166 MMU_FTR_LOCK_BCAST_INVAL,
2167 .icache_bsize = 64,
2168 .dcache_bsize = 64,
2169 .num_pmcs = 0,
2170 .machine_check = machine_check_generic,
2171 .platform = "power6",
2172 },
2173 #endif /* CONFIG_PPC_A2 */
2174 };
2175
2176 static struct cpu_spec the_cpu_spec;
2177
2178 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2179 struct cpu_spec *s)
2180 {
2181 struct cpu_spec *t = &the_cpu_spec;
2182 struct cpu_spec old;
2183
2184 t = PTRRELOC(t);
2185 old = *t;
2186
2187 /* Copy everything, then do fixups */
2188 *t = *s;
2189
2190 /*
2191 * If we are overriding a previous value derived from the real
2192 * PVR with a new value obtained using a logical PVR value,
2193 * don't modify the performance monitor fields.
2194 */
2195 if (old.num_pmcs && !s->num_pmcs) {
2196 t->num_pmcs = old.num_pmcs;
2197 t->pmc_type = old.pmc_type;
2198 t->oprofile_type = old.oprofile_type;
2199 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2200 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2201 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2202
2203 /*
2204 * If we have passed through this logic once before and
2205 * have pulled the default case because the real PVR was
2206 * not found inside cpu_specs[], then we are possibly
2207 * running in compatibility mode. In that case, let the
2208 * oprofiler know which set of compatibility counters to
2209 * pull from by making sure the oprofile_cpu_type string
2210 * is set to that of compatibility mode. If the
2211 * oprofile_cpu_type already has a value, then we are
2212 * possibly overriding a real PVR with a logical one,
2213 * and, in that case, keep the current value for
2214 * oprofile_cpu_type.
2215 */
2216 if (old.oprofile_cpu_type != NULL) {
2217 t->oprofile_cpu_type = old.oprofile_cpu_type;
2218 t->oprofile_type = old.oprofile_type;
2219 }
2220 }
2221
2222 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2223
2224 /*
2225 * Set the base platform string once; assumes
2226 * we're called with real pvr first.
2227 */
2228 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2229 *PTRRELOC(&powerpc_base_platform) = t->platform;
2230
2231 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2232 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2233 * that processor. I will consolidate that at a later time, for now,
2234 * just use #ifdef. We also don't need to PTRRELOC the function
2235 * pointer on ppc64 and booke as we are running at 0 in real mode
2236 * on ppc64 and reloc_offset is always 0 on booke.
2237 */
2238 if (t->cpu_setup) {
2239 t->cpu_setup(offset, t);
2240 }
2241 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2242
2243 return t;
2244 }
2245
2246 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2247 {
2248 struct cpu_spec *s = cpu_specs;
2249 int i;
2250
2251 s = PTRRELOC(s);
2252
2253 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2254 if ((pvr & s->pvr_mask) == s->pvr_value)
2255 return setup_cpu_spec(offset, s);
2256 }
2257
2258 BUG();
2259
2260 return NULL;
2261 }
Linux with added FPC-III support