3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
29 #include <asm/ppc_asm.h>
30 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
33 #include <asm/setup.h>
34 #include <asm/hvcall.h>
35 #include <asm/thread_info.h>
36 #include <asm/firmware.h>
37 #include <asm/page_64.h>
38 #include <asm/irqflags.h>
39 #include <asm/kvm_book3s_asm.h>
40 #include <asm/ptrace.h>
41 #include <asm/hw_irq.h>
43 /* The physical memory is laid out such that the secondary processor
44 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
45 * using the layout described in exceptions-64s.S
49 * Entering into this code we make the following assumptions:
51 * For pSeries or server processors:
52 * 1. The MMU is off & open firmware is running in real mode.
53 * 2. The kernel is entered at __start
54 * -or- For OPAL entry:
55 * 1. The MMU is off, processor in HV mode, primary CPU enters at 0
56 * with device-tree in gpr3. We also get OPAL base in r8 and
57 * entry in r9 for debugging purposes
58 * 2. Secondary processors enter at 0x60 with PIR in gpr3
60 * For Book3E processors:
61 * 1. The MMU is on running in AS0 in a state defined in ePAPR
62 * 2. The kernel is entered at __start
69 /* NOP this out unconditionally */
71 b .__start_initialization_multiplatform
74 /* Catch branch to 0 in real mode */
77 /* Secondary processors spin on this value until it becomes nonzero.
78 * When it does it contains the real address of the descriptor
79 * of the function that the cpu should jump to to continue
82 .globl __secondary_hold_spinloop
83 __secondary_hold_spinloop:
86 /* Secondary processors write this value with their cpu # */
87 /* after they enter the spin loop immediately below. */
88 .globl __secondary_hold_acknowledge
89 __secondary_hold_acknowledge:
92 #ifdef CONFIG_RELOCATABLE
93 /* This flag is set to 1 by a loader if the kernel should run
94 * at the loaded address instead of the linked address. This
95 * is used by kexec-tools to keep the the kdump kernel in the
96 * crash_kernel region. The loader is responsible for
97 * observing the alignment requirement.
99 /* Do not move this variable as kexec-tools knows about it. */
103 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
108 * The following code is used to hold secondary processors
109 * in a spin loop after they have entered the kernel, but
110 * before the bulk of the kernel has been relocated. This code
111 * is relocated to physical address 0x60 before prom_init is run.
112 * All of it must fit below the first exception vector at 0x100.
113 * Use .globl here not _GLOBAL because we want __secondary_hold
114 * to be the actual text address, not a descriptor.
116 .globl __secondary_hold
118 #ifndef CONFIG_PPC_BOOK3E
121 mtmsrd r24 /* RI on */
123 /* Grab our physical cpu number */
125 /* stash r4 for book3e */
128 /* Tell the master cpu we're here */
129 /* Relocation is off & we are located at an address less */
130 /* than 0x100, so only need to grab low order offset. */
131 std r24,__secondary_hold_acknowledge-_stext(0)
135 #ifdef CONFIG_PPC_BOOK3E
138 /* All secondary cpus wait here until told to start. */
139 100: ld r4,__secondary_hold_spinloop-_stext(r26)
143 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
144 #ifdef CONFIG_PPC_BOOK3E
147 ld r4,0(r4) /* deref function descriptor */
151 * it may be the case that other platforms have r4 right to
152 * begin with, this gives us some safety in case it is not
154 #ifdef CONFIG_PPC_BOOK3E
159 /* Make sure that patched code is visible */
166 /* This value is used to mark exception frames on the stack. */
169 .tc ID_72656773_68657265[TC],0x7265677368657265
173 * On server, we include the exception vectors code here as it
174 * relies on absolute addressing which is only possible within
175 * this compilation unit
177 #ifdef CONFIG_PPC_BOOK3S
178 #include "exceptions-64s.S"
181 _GLOBAL(generic_secondary_thread_init)
184 /* turn on 64-bit mode */
187 /* get a valid TOC pointer, wherever we're mapped at */
191 #ifdef CONFIG_PPC_BOOK3E
192 /* Book3E initialization */
194 bl .book3e_secondary_thread_init
196 b generic_secondary_common_init
199 * On pSeries and most other platforms, secondary processors spin
200 * in the following code.
201 * At entry, r3 = this processor's number (physical cpu id)
203 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
204 * this core already exists (setup via some other mechanism such
205 * as SCOM before entry).
207 _GLOBAL(generic_secondary_smp_init)
211 /* turn on 64-bit mode */
214 /* get a valid TOC pointer, wherever we're mapped at */
218 #ifdef CONFIG_PPC_BOOK3E
219 /* Book3E initialization */
222 bl .book3e_secondary_core_init
225 generic_secondary_common_init:
226 /* Set up a paca value for this processor. Since we have the
227 * physical cpu id in r24, we need to search the pacas to find
228 * which logical id maps to our physical one.
230 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
231 ld r13,0(r13) /* Get base vaddr of paca array */
233 addi r13,r13,PACA_SIZE /* know r13 if used accidentally */
234 b .kexec_wait /* wait for next kernel if !SMP */
236 LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */
237 lwz r7,0(r7) /* also the max paca allocated */
238 li r5,0 /* logical cpu id */
239 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
240 cmpw r6,r24 /* Compare to our id */
242 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
244 cmpw r5,r7 /* Check if more pacas exist */
247 mr r3,r24 /* not found, copy phys to r3 */
248 b .kexec_wait /* next kernel might do better */
251 #ifdef CONFIG_PPC_BOOK3E
252 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
253 mtspr SPRN_SPRG_TLB_EXFRAME,r12
256 /* From now on, r24 is expected to be logical cpuid */
259 /* See if we need to call a cpu state restore handler */
260 LOAD_REG_ADDR(r23, cur_cpu_spec)
262 ld r23,CPU_SPEC_RESTORE(r23)
269 3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
277 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
280 beq 4b /* Loop until told to go */
282 sync /* order paca.run and cur_cpu_spec */
283 isync /* In case code patching happened */
285 /* Create a temp kernel stack for use before relocation is on. */
286 ld r1,PACAEMERGSP(r13)
287 subi r1,r1,STACK_FRAME_OVERHEAD
294 * Assumes we're mapped EA == RA if the MMU is on.
296 #ifdef CONFIG_PPC_BOOK3S
299 andi. r0,r3,MSR_IR|MSR_DR
307 b . /* prevent speculative execution */
312 * Here is our main kernel entry point. We support currently 2 kind of entries
313 * depending on the value of r5.
315 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
318 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
319 * DT block, r4 is a physical pointer to the kernel itself
322 _GLOBAL(__start_initialization_multiplatform)
323 /* Make sure we are running in 64 bits mode */
326 /* Get TOC pointer (current runtime address) */
329 /* find out where we are now */
331 0: mflr r26 /* r26 = runtime addr here */
332 addis r26,r26,(_stext - 0b)@ha
333 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
336 * Are we booted from a PROM Of-type client-interface ?
340 b .__boot_from_prom /* yes -> prom */
342 /* Save parameters */
345 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
346 /* Save OPAL entry */
351 #ifdef CONFIG_PPC_BOOK3E
352 bl .start_initialization_book3e
353 b .__after_prom_start
355 /* Setup some critical 970 SPRs before switching MMU off */
358 cmpwi r0,0x39 /* 970 */
360 cmpwi r0,0x3c /* 970FX */
362 cmpwi r0,0x44 /* 970MP */
364 cmpwi r0,0x45 /* 970GX */
366 1: bl .__cpu_preinit_ppc970
369 /* Switch off MMU if not already off */
371 b .__after_prom_start
372 #endif /* CONFIG_PPC_BOOK3E */
374 _INIT_STATIC(__boot_from_prom)
375 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
376 /* Save parameters */
384 * Align the stack to 16-byte boundary
385 * Depending on the size and layout of the ELF sections in the initial
386 * boot binary, the stack pointer may be unaligned on PowerMac
390 #ifdef CONFIG_RELOCATABLE
391 /* Relocate code for where we are now */
396 /* Restore parameters */
403 /* Do all of the interaction with OF client interface */
406 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
408 /* We never return. We also hit that trap if trying to boot
409 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
412 _STATIC(__after_prom_start)
413 #ifdef CONFIG_RELOCATABLE
414 /* process relocations for the final address of the kernel */
415 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
417 lwz r7,__run_at_load-_stext(r26)
418 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
426 * We need to run with _stext at physical address PHYSICAL_START.
427 * This will leave some code in the first 256B of
428 * real memory, which are reserved for software use.
430 * Note: This process overwrites the OF exception vectors.
432 li r3,0 /* target addr */
433 #ifdef CONFIG_PPC_BOOK3E
434 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
436 mr. r4,r26 /* In some cases the loader may */
437 beq 9f /* have already put us at zero */
438 li r6,0x100 /* Start offset, the first 0x100 */
439 /* bytes were copied earlier. */
440 #ifdef CONFIG_PPC_BOOK3E
441 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */
444 #ifdef CONFIG_RELOCATABLE
446 * Check if the kernel has to be running as relocatable kernel based on the
447 * variable __run_at_load, if it is set the kernel is treated as relocatable
448 * kernel, otherwise it will be moved to PHYSICAL_START
450 lwz r7,__run_at_load-_stext(r26)
454 /* just copy interrupts */
455 LOAD_REG_IMMEDIATE(r5, __end_interrupts - _stext)
459 lis r5,(copy_to_here - _stext)@ha
460 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
462 bl .copy_and_flush /* copy the first n bytes */
463 /* this includes the code being */
465 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
466 addi r8,r8,(4f - _stext)@l /* that we just made */
471 p_end: .llong _end - _stext
473 4: /* Now copy the rest of the kernel up to _end */
474 addis r5,r26,(p_end - _stext)@ha
475 ld r5,(p_end - _stext)@l(r5) /* get _end */
476 5: bl .copy_and_flush /* copy the rest */
478 9: b .start_here_multiplatform
481 * Copy routine used to copy the kernel to start at physical address 0
482 * and flush and invalidate the caches as needed.
483 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
484 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
486 * Note: this routine *only* clobbers r0, r6 and lr
488 _GLOBAL(copy_and_flush)
491 4: li r0,8 /* Use the smallest common */
492 /* denominator cache line */
493 /* size. This results in */
494 /* extra cache line flushes */
495 /* but operation is correct. */
496 /* Can't get cache line size */
497 /* from NACA as it is being */
500 mtctr r0 /* put # words/line in ctr */
501 3: addi r6,r6,8 /* copy a cache line */
505 dcbst r6,r3 /* write it to memory */
507 icbi r6,r3 /* flush the icache line */
520 #ifdef CONFIG_PPC_PMAC
522 * On PowerMac, secondary processors starts from the reset vector, which
523 * is temporarily turned into a call to one of the functions below.
528 .globl __secondary_start_pmac_0
529 __secondary_start_pmac_0:
530 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
540 _GLOBAL(pmac_secondary_start)
541 /* turn on 64-bit mode */
546 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
553 /* get TOC pointer (real address) */
557 /* Copy some CPU settings from CPU 0 */
558 bl .__restore_cpu_ppc970
560 /* pSeries do that early though I don't think we really need it */
563 mtmsrd r3 /* RI on */
565 /* Set up a paca value for this processor. */
566 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
567 ld r4,0(r4) /* Get base vaddr of paca array */
568 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
569 add r13,r13,r4 /* for this processor. */
570 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
572 /* Mark interrupts soft and hard disabled (they might be enabled
573 * in the PACA when doing hotplug)
576 stb r0,PACASOFTIRQEN(r13)
577 li r0,PACA_IRQ_HARD_DIS
578 stb r0,PACAIRQHAPPENED(r13)
580 /* Create a temp kernel stack for use before relocation is on. */
581 ld r1,PACAEMERGSP(r13)
582 subi r1,r1,STACK_FRAME_OVERHEAD
586 #endif /* CONFIG_PPC_PMAC */
589 * This function is called after the master CPU has released the
590 * secondary processors. The execution environment is relocation off.
591 * The paca for this processor has the following fields initialized at
593 * 1. Processor number
594 * 2. Segment table pointer (virtual address)
595 * On entry the following are set:
596 * r1 = stack pointer (real addr of temp stack)
597 * r24 = cpu# (in Linux terms)
598 * r13 = paca virtual address
599 * SPRG_PACA = paca virtual address
604 .globl __secondary_start
606 /* Set thread priority to MEDIUM */
609 /* Initialize the kernel stack */
610 LOAD_REG_ADDR(r3, current_set)
611 sldi r28,r24,3 /* get current_set[cpu#] */
613 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
614 std r14,PACAKSAVE(r13)
616 /* Do early setup for that CPU (stab, slb, hash table pointer) */
617 bl .early_setup_secondary
620 * setup the new stack pointer, but *don't* use this until
625 /* Clear backchain so we get nice backtraces */
629 /* Mark interrupts soft and hard disabled (they might be enabled
630 * in the PACA when doing hotplug)
632 stb r7,PACASOFTIRQEN(r13)
633 li r0,PACA_IRQ_HARD_DIS
634 stb r0,PACAIRQHAPPENED(r13)
636 /* enable MMU and jump to start_secondary */
637 LOAD_REG_ADDR(r3, .start_secondary_prolog)
638 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
643 b . /* prevent speculative execution */
646 * Running with relocation on at this point. All we want to do is
647 * zero the stack back-chain pointer and get the TOC virtual address
648 * before going into C code.
650 _GLOBAL(start_secondary_prolog)
653 std r3,0(r1) /* Zero the stack frame pointer */
657 * Reset stack pointer and call start_secondary
658 * to continue with online operation when woken up
659 * from cede in cpu offline.
661 _GLOBAL(start_secondary_resume)
662 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
664 std r3,0(r1) /* Zero the stack frame pointer */
670 * This subroutine clobbers r11 and r12
672 _GLOBAL(enable_64b_mode)
673 mfmsr r11 /* grab the current MSR */
674 #ifdef CONFIG_PPC_BOOK3E
675 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
677 #else /* CONFIG_PPC_BOOK3E */
678 li r12,(MSR_64BIT | MSR_ISF)@highest
687 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
688 * by the toolchain). It computes the correct value for wherever we
689 * are running at the moment, using position-independent code.
691 * Note: The compiler constructs pointers using offsets from the
692 * TOC in -mcmodel=medium mode. After we relocate to 0 but before
693 * the MMU is on we need our TOC to be a virtual address otherwise
694 * these pointers will be real addresses which may get stored and
695 * accessed later with the MMU on. We use tovirt() at the call
696 * sites to handle this.
698 _GLOBAL(relative_toc)
702 ld r2,(p_toc - 0b)(r11)
708 p_toc: .llong __toc_start + 0x8000 - 0b
711 * This is where the main kernel code starts.
713 _INIT_STATIC(start_here_multiplatform)
718 /* Clear out the BSS. It may have been done in prom_init,
719 * already but that's irrelevant since prom_init will soon
720 * be detached from the kernel completely. Besides, we need
721 * to clear it now for kexec-style entry.
723 LOAD_REG_ADDR(r11,__bss_stop)
724 LOAD_REG_ADDR(r8,__bss_start)
725 sub r11,r11,r8 /* bss size */
726 addi r11,r11,7 /* round up to an even double word */
727 srdi. r11,r11,3 /* shift right by 3 */
731 mtctr r11 /* zero this many doublewords */
736 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
737 /* Setup OPAL entry */
738 LOAD_REG_ADDR(r11, opal)
743 #ifndef CONFIG_PPC_BOOK3E
746 mtmsrd r6 /* RI on */
749 #ifdef CONFIG_RELOCATABLE
750 /* Save the physical address we're running at in kernstart_addr */
751 LOAD_REG_ADDR(r4, kernstart_addr)
756 /* The following gets the stack set up with the regs */
757 /* pointing to the real addr of the kernel stack. This is */
758 /* all done to support the C function call below which sets */
759 /* up the htab. This is done because we have relocated the */
760 /* kernel but are still running in real mode. */
762 LOAD_REG_ADDR(r3,init_thread_union)
764 /* set up a stack pointer */
765 addi r1,r3,THREAD_SIZE
767 stdu r0,-STACK_FRAME_OVERHEAD(r1)
769 /* Do very early kernel initializations, including initial hash table,
770 * stab and slb setup before we turn on relocation. */
772 /* Restore parameters passed from prom_init/kexec */
774 bl .early_setup /* also sets r13 and SPRG_PACA */
776 LOAD_REG_ADDR(r3, .start_here_common)
781 b . /* prevent speculative execution */
783 /* This is where all platforms converge execution */
784 _INIT_GLOBAL(start_here_common)
785 /* relocation is on at this point */
786 std r1,PACAKSAVE(r13)
788 /* Load the TOC (virtual address) */
791 /* Do more system initializations in virtual mode */
794 /* Mark interrupts soft and hard disabled (they might be enabled
795 * in the PACA when doing hotplug)
798 stb r0,PACASOFTIRQEN(r13)
799 li r0,PACA_IRQ_HARD_DIS
800 stb r0,PACAIRQHAPPENED(r13)
802 /* Generic kernel entry */
809 * We put a few things here that have to be page-aligned.
810 * This stuff goes at the beginning of the bss, which is page-aligned.
816 .globl empty_zero_page
820 .globl swapper_pg_dir
822 .space PGD_TABLE_SIZE