arch/powerpc/platforms/44x/iss4xx.c

   1 /*
   2  * PPC476 board specific routines
   3  *
   4  * Copyright 2010 Torez Smith, IBM Corporation.
   5  *
   6  * Based on earlier code:
   7  *    Matt Porter <mporter@kernel.crashing.org>
   8  *    Copyright 2002-2005 MontaVista Software Inc.
   9  *
  10  *    Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  11  *    Copyright (c) 2003-2005 Zultys Technologies
  12  *
  13  *    Rewritten and ported to the merged powerpc tree:
  14  *    Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
  15  *
  16  * This program is free software; you can redistribute  it and/or modify it
  17  * under  the terms of  the GNU General  Public License as published by the
  18  * Free Software Foundation;  either version 2 of the  License, or (at your
  19  * option) any later version.
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/rtc.h>
  25
  26 #include <asm/machdep.h>
  27 #include <asm/prom.h>
  28 #include <asm/udbg.h>
  29 #include <asm/time.h>
  30 #include <asm/uic.h>
  31 #include <asm/ppc4xx.h>
  32 #include <asm/mpic.h>
  33 #include <asm/mmu.h>
  34
  35 static __initdata struct of_device_id iss4xx_of_bus[] = {
  36         { .compatible = "ibm,plb4", },
  37         { .compatible = "ibm,plb6", },
  38         { .compatible = "ibm,opb", },
  39         { .compatible = "ibm,ebc", },
  40         {},
  41 };
  42
  43 static int __init iss4xx_device_probe(void)
  44 {
  45         of_platform_bus_probe(NULL, iss4xx_of_bus, NULL);
  46         of_instantiate_rtc();
  47
  48         return 0;
  49 }
  50 machine_device_initcall(iss4xx, iss4xx_device_probe);
  51
  52 /* We can have either UICs or MPICs */
  53 static void __init iss4xx_init_irq(void)
  54 {
  55         struct device_node *np;
  56
  57         /* Find top level interrupt controller */
  58         for_each_node_with_property(np, "interrupt-controller") {
  59                 if (of_get_property(np, "interrupts", NULL) == NULL)
  60                         break;
  61         }
  62         if (np == NULL)
  63                 panic("Can't find top level interrupt controller");
  64
  65         /* Check type and do appropriate initialization */
  66         if (of_device_is_compatible(np, "ibm,uic")) {
  67                 uic_init_tree();
  68                 ppc_md.get_irq = uic_get_irq;
  69 #ifdef CONFIG_MPIC
  70         } else if (of_device_is_compatible(np, "chrp,open-pic")) {
  71                 /* The MPIC driver will get everything it needs from the
  72                  * device-tree, just pass 0 to all arguments
  73                  */
  74                 struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC     ");
  75                 BUG_ON(mpic == NULL);
  76                 mpic_init(mpic);
  77                 ppc_md.get_irq = mpic_get_irq;
  78 #endif
  79         } else
  80                 panic("Unrecognized top level interrupt controller");
  81 }
  82
  83 #ifdef CONFIG_SMP
  84 static void smp_iss4xx_setup_cpu(int cpu)
  85 {
  86         mpic_setup_this_cpu();
  87 }
  88
  89 static int smp_iss4xx_kick_cpu(int cpu)
  90 {
  91         struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
  92         const u64 *spin_table_addr_prop;
  93         u32 *spin_table;
  94         extern void start_secondary_47x(void);
  95
  96         BUG_ON(cpunode == NULL);
  97
  98         /* Assume spin table. We could test for the enable-method in
  99          * the device-tree but currently there's little point as it's
 100          * our only supported method
 101          */
 102         spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr",
 103                                                NULL);
 104         if (spin_table_addr_prop == NULL) {
 105                 pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu);
 106                 return -ENOENT;
 107         }
 108
 109         /* Assume it's mapped as part of the linear mapping. This is a bit
 110          * fishy but will work fine for now
 111          */
 112         spin_table = (u32 *)__va(*spin_table_addr_prop);
 113         pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
 114
 115         spin_table[3] = cpu;
 116         smp_wmb();
 117         spin_table[1] = __pa(start_secondary_47x);
 118         mb();
 119
 120         return 0;
 121 }
 122
 123 static struct smp_ops_t iss_smp_ops = {
 124         .probe          = smp_mpic_probe,
 125         .message_pass   = smp_mpic_message_pass,
 126         .setup_cpu      = smp_iss4xx_setup_cpu,
 127         .kick_cpu       = smp_iss4xx_kick_cpu,
 128         .give_timebase  = smp_generic_give_timebase,
 129         .take_timebase  = smp_generic_take_timebase,
 130 };
 131
 132 static void __init iss4xx_smp_init(void)
 133 {
 134         if (mmu_has_feature(MMU_FTR_TYPE_47x))
 135                 smp_ops = &iss_smp_ops;
 136 }
 137
 138 #else /* CONFIG_SMP */
 139 static void __init iss4xx_smp_init(void) { }
 140 #endif /* CONFIG_SMP */
 141
 142 static void __init iss4xx_setup_arch(void)
 143 {
 144         iss4xx_smp_init();
 145 }
 146
 147 /*
 148  * Called very early, MMU is off, device-tree isn't unflattened
 149  */
 150 static int __init iss4xx_probe(void)
 151 {
 152         unsigned long root = of_get_flat_dt_root();
 153
 154         if (!of_flat_dt_is_compatible(root, "ibm,iss-4xx"))
 155                 return 0;
 156
 157         return 1;
 158 }
 159
 160 define_machine(iss4xx) {
 161         .name                   = "ISS-4xx",
 162         .probe                  = iss4xx_probe,
 163         .progress               = udbg_progress,
 164         .init_IRQ               = iss4xx_init_irq,
 165         .setup_arch             = iss4xx_setup_arch,
 166         .restart                = ppc4xx_reset_system,
 167         .calibrate_decr         = generic_calibrate_decr,
 168 };