x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / powerpc / platforms / 83xx / suspend.c
blob1d769a29249f846a444bee68819730b5d12496ea
1 /*
2 * MPC83xx suspend support
4 * Author: Scott Wood <scottwood@freescale.com>
6 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/pm.h>
15 #include <linux/types.h>
16 #include <linux/ioport.h>
17 #include <linux/interrupt.h>
18 #include <linux/wait.h>
19 #include <linux/kthread.h>
20 #include <linux/freezer.h>
21 #include <linux/suspend.h>
22 #include <linux/fsl_devices.h>
23 #include <linux/of_platform.h>
24 #include <linux/export.h>
26 #include <asm/reg.h>
27 #include <asm/io.h>
28 #include <asm/time.h>
29 #include <asm/mpc6xx.h>
30 #include <asm/switch_to.h>
32 #include <sysdev/fsl_soc.h>
34 #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
35 #define PMCCR1_NEXT_STATE_SHIFT 2
36 #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
37 #define IMMR_SYSCR_OFFSET 0x100
38 #define IMMR_RCW_OFFSET 0x900
39 #define RCW_PCI_HOST 0x80000000
41 void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
43 struct mpc83xx_pmc {
44 u32 config;
45 #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
46 #define PMCCR_SLPEN 1 /* System low power enable */
48 u32 event;
49 u32 mask;
50 /* All but PMCI are deep-sleep only */
51 #define PMCER_GPIO 0x100
52 #define PMCER_PCI 0x080
53 #define PMCER_USB 0x040
54 #define PMCER_ETSEC1 0x020
55 #define PMCER_ETSEC2 0x010
56 #define PMCER_TIMER 0x008
57 #define PMCER_INT1 0x004
58 #define PMCER_INT2 0x002
59 #define PMCER_PMCI 0x001
60 #define PMCER_ALL 0x1FF
62 /* deep-sleep only */
63 u32 config1;
64 #define PMCCR1_USE_STATE 0x80000000
65 #define PMCCR1_PME_EN 0x00000080
66 #define PMCCR1_ASSERT_PME 0x00000040
67 #define PMCCR1_POWER_OFF 0x00000020
69 /* deep-sleep only */
70 u32 config2;
73 struct mpc83xx_rcw {
74 u32 rcwlr;
75 u32 rcwhr;
78 struct mpc83xx_clock {
79 u32 spmr;
80 u32 occr;
81 u32 sccr;
84 struct mpc83xx_syscr {
85 __be32 sgprl;
86 __be32 sgprh;
87 __be32 spridr;
88 __be32 :32;
89 __be32 spcr;
90 __be32 sicrl;
91 __be32 sicrh;
94 struct mpc83xx_saved {
95 u32 sicrl;
96 u32 sicrh;
97 u32 sccr;
100 struct pmc_type {
101 int has_deep_sleep;
104 static struct platform_device *pmc_dev;
105 static int has_deep_sleep, deep_sleeping;
106 static int pmc_irq;
107 static struct mpc83xx_pmc __iomem *pmc_regs;
108 static struct mpc83xx_clock __iomem *clock_regs;
109 static struct mpc83xx_syscr __iomem *syscr_regs;
110 static struct mpc83xx_saved saved_regs;
111 static int is_pci_agent, wake_from_pci;
112 static phys_addr_t immrbase;
113 static int pci_pm_state;
114 static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
116 int fsl_deep_sleep(void)
118 return deep_sleeping;
120 EXPORT_SYMBOL(fsl_deep_sleep);
122 static int mpc83xx_change_state(void)
124 u32 curr_state;
125 u32 reg_cfg1 = in_be32(&pmc_regs->config1);
127 if (is_pci_agent) {
128 pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
129 PMCCR1_NEXT_STATE_SHIFT;
130 curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
132 if (curr_state != pci_pm_state) {
133 reg_cfg1 &= ~PMCCR1_CURR_STATE;
134 reg_cfg1 |= pci_pm_state;
135 out_be32(&pmc_regs->config1, reg_cfg1);
137 wake_up(&agent_wq);
138 return 1;
142 return 0;
145 static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
147 u32 event = in_be32(&pmc_regs->event);
148 int ret = IRQ_NONE;
150 if (mpc83xx_change_state())
151 ret = IRQ_HANDLED;
153 if (event) {
154 out_be32(&pmc_regs->event, event);
155 ret = IRQ_HANDLED;
158 return ret;
161 static void mpc83xx_suspend_restore_regs(void)
163 out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
164 out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
165 out_be32(&clock_regs->sccr, saved_regs.sccr);
168 static void mpc83xx_suspend_save_regs(void)
170 saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
171 saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
172 saved_regs.sccr = in_be32(&clock_regs->sccr);
175 static int mpc83xx_suspend_enter(suspend_state_t state)
177 int ret = -EAGAIN;
179 /* Don't go to sleep if there's a race where pci_pm_state changes
180 * between the agent thread checking it and the PM code disabling
181 * interrupts.
183 if (wake_from_pci) {
184 if (pci_pm_state != (deep_sleeping ? 3 : 2))
185 goto out;
187 out_be32(&pmc_regs->config1,
188 in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
191 /* Put the system into low-power mode and the RAM
192 * into self-refresh mode once the core goes to
193 * sleep.
196 out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
198 /* If it has deep sleep (i.e. it's an 831x or compatible),
199 * disable power to the core upon entering sleep mode. This will
200 * require going through the boot firmware upon a wakeup event.
203 if (deep_sleeping) {
204 mpc83xx_suspend_save_regs();
206 out_be32(&pmc_regs->mask, PMCER_ALL);
208 out_be32(&pmc_regs->config1,
209 in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
211 enable_kernel_fp();
213 mpc83xx_enter_deep_sleep(immrbase);
215 out_be32(&pmc_regs->config1,
216 in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
218 out_be32(&pmc_regs->mask, PMCER_PMCI);
220 mpc83xx_suspend_restore_regs();
221 } else {
222 out_be32(&pmc_regs->mask, PMCER_PMCI);
224 mpc6xx_enter_standby();
227 ret = 0;
229 out:
230 out_be32(&pmc_regs->config1,
231 in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
233 return ret;
236 static void mpc83xx_suspend_end(void)
238 deep_sleeping = 0;
241 static int mpc83xx_suspend_valid(suspend_state_t state)
243 return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
246 static int mpc83xx_suspend_begin(suspend_state_t state)
248 switch (state) {
249 case PM_SUSPEND_STANDBY:
250 deep_sleeping = 0;
251 return 0;
253 case PM_SUSPEND_MEM:
254 if (has_deep_sleep)
255 deep_sleeping = 1;
257 return 0;
259 default:
260 return -EINVAL;
264 static int agent_thread_fn(void *data)
266 while (1) {
267 wait_event_interruptible(agent_wq, pci_pm_state >= 2);
268 try_to_freeze();
270 if (signal_pending(current) || pci_pm_state < 2)
271 continue;
273 /* With a preemptible kernel (or SMP), this could race with
274 * a userspace-driven suspend request. It's probably best
275 * to avoid mixing the two with such a configuration (or
276 * else fix it by adding a mutex to state_store that we can
277 * synchronize with).
280 wake_from_pci = 1;
282 pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
283 PM_SUSPEND_STANDBY);
285 wake_from_pci = 0;
288 return 0;
291 static void mpc83xx_set_agent(void)
293 out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
294 out_be32(&pmc_regs->mask, PMCER_PMCI);
296 kthread_run(agent_thread_fn, NULL, "PCI power mgt");
299 static int mpc83xx_is_pci_agent(void)
301 struct mpc83xx_rcw __iomem *rcw_regs;
302 int ret;
304 rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
305 sizeof(struct mpc83xx_rcw));
307 if (!rcw_regs)
308 return -ENOMEM;
310 ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
312 iounmap(rcw_regs);
313 return ret;
316 static const struct platform_suspend_ops mpc83xx_suspend_ops = {
317 .valid = mpc83xx_suspend_valid,
318 .begin = mpc83xx_suspend_begin,
319 .enter = mpc83xx_suspend_enter,
320 .end = mpc83xx_suspend_end,
323 static struct of_device_id pmc_match[];
324 static int pmc_probe(struct platform_device *ofdev)
326 const struct of_device_id *match;
327 struct device_node *np = ofdev->dev.of_node;
328 struct resource res;
329 const struct pmc_type *type;
330 int ret = 0;
332 match = of_match_device(pmc_match, &ofdev->dev);
333 if (!match)
334 return -EINVAL;
336 type = match->data;
338 if (!of_device_is_available(np))
339 return -ENODEV;
341 has_deep_sleep = type->has_deep_sleep;
342 immrbase = get_immrbase();
343 pmc_dev = ofdev;
345 is_pci_agent = mpc83xx_is_pci_agent();
346 if (is_pci_agent < 0)
347 return is_pci_agent;
349 ret = of_address_to_resource(np, 0, &res);
350 if (ret)
351 return -ENODEV;
353 pmc_irq = irq_of_parse_and_map(np, 0);
354 if (pmc_irq != NO_IRQ) {
355 ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
356 "pmc", ofdev);
358 if (ret)
359 return -EBUSY;
362 pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
364 if (!pmc_regs) {
365 ret = -ENOMEM;
366 goto out;
369 ret = of_address_to_resource(np, 1, &res);
370 if (ret) {
371 ret = -ENODEV;
372 goto out_pmc;
375 clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
377 if (!clock_regs) {
378 ret = -ENOMEM;
379 goto out_pmc;
382 if (has_deep_sleep) {
383 syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
384 sizeof(*syscr_regs));
385 if (!syscr_regs) {
386 ret = -ENOMEM;
387 goto out_syscr;
391 if (is_pci_agent)
392 mpc83xx_set_agent();
394 suspend_set_ops(&mpc83xx_suspend_ops);
395 return 0;
397 out_syscr:
398 iounmap(clock_regs);
399 out_pmc:
400 iounmap(pmc_regs);
401 out:
402 if (pmc_irq != NO_IRQ)
403 free_irq(pmc_irq, ofdev);
405 return ret;
408 static int pmc_remove(struct platform_device *ofdev)
410 return -EPERM;
413 static struct pmc_type pmc_types[] = {
415 .has_deep_sleep = 1,
418 .has_deep_sleep = 0,
422 static struct of_device_id pmc_match[] = {
424 .compatible = "fsl,mpc8313-pmc",
425 .data = &pmc_types[0],
428 .compatible = "fsl,mpc8349-pmc",
429 .data = &pmc_types[1],
434 static struct platform_driver pmc_driver = {
435 .driver = {
436 .name = "mpc83xx-pmc",
437 .owner = THIS_MODULE,
438 .of_match_table = pmc_match,
440 .probe = pmc_probe,
441 .remove = pmc_remove
444 static int pmc_init(void)
446 return platform_driver_register(&pmc_driver);
449 module_init(pmc_init);