x86/xen: resume timer irqs early
[linux/fpc-iii.git] / arch / powerpc / platforms / embedded6xx / c2k.c
blobebd3963fdf911bf256d180df98cec93772c3fa44
1 /*
2 * Board setup routines for the GEFanuc C2K board
4 * Author: Remi Machet <rmachet@slac.stanford.edu>
6 * Originated from prpmc2800.c
8 * 2008 (c) Stanford University
9 * 2007 (c) MontaVista, Software, Inc.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License version 2 as published
13 * by the Free Software Foundation.
16 #include <linux/stddef.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
20 #include <linux/seq_file.h>
21 #include <linux/time.h>
22 #include <linux/of.h>
24 #include <asm/machdep.h>
25 #include <asm/prom.h>
26 #include <asm/time.h>
28 #include <mm/mmu_decl.h>
30 #include <sysdev/mv64x60.h>
32 #define MV64x60_MPP_CNTL_0 0x0000
33 #define MV64x60_MPP_CNTL_2 0x0008
35 #define MV64x60_GPP_IO_CNTL 0x0000
36 #define MV64x60_GPP_LEVEL_CNTL 0x0010
37 #define MV64x60_GPP_VALUE_SET 0x0018
39 static void __iomem *mv64x60_mpp_reg_base;
40 static void __iomem *mv64x60_gpp_reg_base;
42 static void __init c2k_setup_arch(void)
44 struct device_node *np;
45 phys_addr_t paddr;
46 const unsigned int *reg;
49 * ioremap mpp and gpp registers in case they are later
50 * needed by c2k_reset_board().
52 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp");
53 reg = of_get_property(np, "reg", NULL);
54 paddr = of_translate_address(np, reg);
55 of_node_put(np);
56 mv64x60_mpp_reg_base = ioremap(paddr, reg[1]);
58 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp");
59 reg = of_get_property(np, "reg", NULL);
60 paddr = of_translate_address(np, reg);
61 of_node_put(np);
62 mv64x60_gpp_reg_base = ioremap(paddr, reg[1]);
64 #ifdef CONFIG_PCI
65 mv64x60_pci_init();
66 #endif
69 static void c2k_reset_board(void)
71 u32 temp;
73 local_irq_disable();
75 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0);
76 temp &= 0xFFFF0FFF;
77 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp);
79 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
80 temp |= 0x00000004;
81 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
83 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
84 temp |= 0x00000004;
85 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
87 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2);
88 temp &= 0xFFFF0FFF;
89 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp);
91 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
92 temp |= 0x00080000;
93 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
95 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
96 temp |= 0x00080000;
97 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
99 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004);
102 static void c2k_restart(char *cmd)
104 c2k_reset_board();
105 msleep(100);
106 panic("restart failed\n");
109 #ifdef CONFIG_NOT_COHERENT_CACHE
110 #define COHERENCY_SETTING "off"
111 #else
112 #define COHERENCY_SETTING "on"
113 #endif
115 void c2k_show_cpuinfo(struct seq_file *m)
117 seq_printf(m, "Vendor\t\t: GEFanuc\n");
118 seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING);
122 * Called very early, device-tree isn't unflattened
124 static int __init c2k_probe(void)
126 unsigned long root = of_get_flat_dt_root();
128 if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K"))
129 return 0;
131 printk(KERN_INFO "Detected a GEFanuc C2K board\n");
133 _set_L2CR(0);
134 _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I);
135 return 1;
138 define_machine(c2k) {
139 .name = "C2K",
140 .probe = c2k_probe,
141 .setup_arch = c2k_setup_arch,
142 .init_early = mv64x60_init_early,
143 .show_cpuinfo = c2k_show_cpuinfo,
144 .init_IRQ = mv64x60_init_irq,
145 .get_irq = mv64x60_get_irq,
146 .restart = c2k_restart,
147 .calibrate_decr = generic_calibrate_decr,