drivers/base/regmap/regcache.c

   1 /*
   2  * Register cache access API
   3  *
   4  * Copyright 2011 Wolfson Microelectronics plc
   5  *
   6  * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/slab.h>
  14 #include <linux/export.h>
  15 #include <linux/device.h>
  16 #include <trace/events/regmap.h>
  17 #include <linux/bsearch.h>
  18 #include <linux/sort.h>
  19
  20 #include "internal.h"
  21
  22 static const struct regcache_ops *cache_types[] = {
  23         &regcache_rbtree_ops,
  24         &regcache_lzo_ops,
  25         &regcache_flat_ops,
  26 };
  27
  28 static int regcache_hw_init(struct regmap *map)
  29 {
  30         int i, j;
  31         int ret;
  32         int count;
  33         unsigned int val;
  34         void *tmp_buf;
  35
  36         if (!map->num_reg_defaults_raw)
  37                 return -EINVAL;
  38
  39         if (!map->reg_defaults_raw) {
  40                 u32 cache_bypass = map->cache_bypass;
  41                 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
  42
  43                 /* Bypass the cache access till data read from HW*/
  44                 map->cache_bypass = 1;
  45                 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
  46                 if (!tmp_buf)
  47                         return -EINVAL;
  48                 ret = regmap_raw_read(map, 0, tmp_buf,
  49                                       map->num_reg_defaults_raw);
  50                 map->cache_bypass = cache_bypass;
  51                 if (ret < 0) {
  52                         kfree(tmp_buf);
  53                         return ret;
  54                 }
  55                 map->reg_defaults_raw = tmp_buf;
  56                 map->cache_free = 1;
  57         }
  58
  59         /* calculate the size of reg_defaults */
  60         for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
  61                 val = regcache_get_val(map, map->reg_defaults_raw, i);
  62                 if (regmap_volatile(map, i * map->reg_stride))
  63                         continue;
  64                 count++;
  65         }
  66
  67         map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
  68                                       GFP_KERNEL);
  69         if (!map->reg_defaults) {
  70                 ret = -ENOMEM;
  71                 goto err_free;
  72         }
  73
  74         /* fill the reg_defaults */
  75         map->num_reg_defaults = count;
  76         for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
  77                 val = regcache_get_val(map, map->reg_defaults_raw, i);
  78                 if (regmap_volatile(map, i * map->reg_stride))
  79                         continue;
  80                 map->reg_defaults[j].reg = i * map->reg_stride;
  81                 map->reg_defaults[j].def = val;
  82                 j++;
  83         }
  84
  85         return 0;
  86
  87 err_free:
  88         if (map->cache_free)
  89                 kfree(map->reg_defaults_raw);
  90
  91         return ret;
  92 }
  93
  94 int regcache_init(struct regmap *map, const struct regmap_config *config)
  95 {
  96         int ret;
  97         int i;
  98         void *tmp_buf;
  99
 100         for (i = 0; i < config->num_reg_defaults; i++)
 101                 if (config->reg_defaults[i].reg % map->reg_stride)
 102                         return -EINVAL;
 103
 104         if (map->cache_type == REGCACHE_NONE) {
 105                 map->cache_bypass = true;
 106                 return 0;
 107         }
 108
 109         for (i = 0; i < ARRAY_SIZE(cache_types); i++)
 110                 if (cache_types[i]->type == map->cache_type)
 111                         break;
 112
 113         if (i == ARRAY_SIZE(cache_types)) {
 114                 dev_err(map->dev, "Could not match compress type: %d\n",
 115                         map->cache_type);
 116                 return -EINVAL;
 117         }
 118
 119         map->num_reg_defaults = config->num_reg_defaults;
 120         map->num_reg_defaults_raw = config->num_reg_defaults_raw;
 121         map->reg_defaults_raw = config->reg_defaults_raw;
 122         map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
 123         map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
 124
 125         map->cache = NULL;
 126         map->cache_ops = cache_types[i];
 127
 128         if (!map->cache_ops->read ||
 129             !map->cache_ops->write ||
 130             !map->cache_ops->name)
 131                 return -EINVAL;
 132
 133         /* We still need to ensure that the reg_defaults
 134          * won't vanish from under us.  We'll need to make
 135          * a copy of it.
 136          */
 137         if (config->reg_defaults) {
 138                 if (!map->num_reg_defaults)
 139                         return -EINVAL;
 140                 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
 141                                   sizeof(struct reg_default), GFP_KERNEL);
 142                 if (!tmp_buf)
 143                         return -ENOMEM;
 144                 map->reg_defaults = tmp_buf;
 145         } else if (map->num_reg_defaults_raw) {
 146                 /* Some devices such as PMICs don't have cache defaults,
 147                  * we cope with this by reading back the HW registers and
 148                  * crafting the cache defaults by hand.
 149                  */
 150                 ret = regcache_hw_init(map);
 151                 if (ret < 0)
 152                         return ret;
 153         }
 154
 155         if (!map->max_register)
 156                 map->max_register = map->num_reg_defaults_raw;
 157
 158         if (map->cache_ops->init) {
 159                 dev_dbg(map->dev, "Initializing %s cache\n",
 160                         map->cache_ops->name);
 161                 ret = map->cache_ops->init(map);
 162                 if (ret)
 163                         goto err_free;
 164         }
 165         return 0;
 166
 167 err_free:
 168         kfree(map->reg_defaults);
 169         if (map->cache_free)
 170                 kfree(map->reg_defaults_raw);
 171
 172         return ret;
 173 }
 174
 175 void regcache_exit(struct regmap *map)
 176 {
 177         if (map->cache_type == REGCACHE_NONE)
 178                 return;
 179
 180         BUG_ON(!map->cache_ops);
 181
 182         kfree(map->reg_defaults);
 183         if (map->cache_free)
 184                 kfree(map->reg_defaults_raw);
 185
 186         if (map->cache_ops->exit) {
 187                 dev_dbg(map->dev, "Destroying %s cache\n",
 188                         map->cache_ops->name);
 189                 map->cache_ops->exit(map);
 190         }
 191 }
 192
 193 /**
 194  * regcache_read: Fetch the value of a given register from the cache.
 195  *
 196  * @map: map to configure.
 197  * @reg: The register index.
 198  * @value: The value to be returned.
 199  *
 200  * Return a negative value on failure, 0 on success.
 201  */
 202 int regcache_read(struct regmap *map,
 203                   unsigned int reg, unsigned int *value)
 204 {
 205         int ret;
 206
 207         if (map->cache_type == REGCACHE_NONE)
 208                 return -ENOSYS;
 209
 210         BUG_ON(!map->cache_ops);
 211
 212         if (!regmap_volatile(map, reg)) {
 213                 ret = map->cache_ops->read(map, reg, value);
 214
 215                 if (ret == 0)
 216                         trace_regmap_reg_read_cache(map->dev, reg, *value);
 217
 218                 return ret;
 219         }
 220
 221         return -EINVAL;
 222 }
 223
 224 /**
 225  * regcache_write: Set the value of a given register in the cache.
 226  *
 227  * @map: map to configure.
 228  * @reg: The register index.
 229  * @value: The new register value.
 230  *
 231  * Return a negative value on failure, 0 on success.
 232  */
 233 int regcache_write(struct regmap *map,
 234                    unsigned int reg, unsigned int value)
 235 {
 236         if (map->cache_type == REGCACHE_NONE)
 237                 return 0;
 238
 239         BUG_ON(!map->cache_ops);
 240
 241         if (!regmap_volatile(map, reg))
 242                 return map->cache_ops->write(map, reg, value);
 243
 244         return 0;
 245 }
 246
 247 static int regcache_default_sync(struct regmap *map, unsigned int min,
 248                                  unsigned int max)
 249 {
 250         unsigned int reg;
 251
 252         for (reg = min; reg <= max; reg++) {
 253                 unsigned int val;
 254                 int ret;
 255
 256                 if (regmap_volatile(map, reg))
 257                         continue;
 258
 259                 ret = regcache_read(map, reg, &val);
 260                 if (ret)
 261                         return ret;
 262
 263                 /* Is this the hardware default?  If so skip. */
 264                 ret = regcache_lookup_reg(map, reg);
 265                 if (ret >= 0 && val == map->reg_defaults[ret].def)
 266                         continue;
 267
 268                 map->cache_bypass = 1;
 269                 ret = _regmap_write(map, reg, val);
 270                 map->cache_bypass = 0;
 271                 if (ret)
 272                         return ret;
 273                 dev_dbg(map->dev, "Synced register %#x, value %#x\n", reg, val);
 274         }
 275
 276         return 0;
 277 }
 278
 279 /**
 280  * regcache_sync: Sync the register cache with the hardware.
 281  *
 282  * @map: map to configure.
 283  *
 284  * Any registers that should not be synced should be marked as
 285  * volatile.  In general drivers can choose not to use the provided
 286  * syncing functionality if they so require.
 287  *
 288  * Return a negative value on failure, 0 on success.
 289  */
 290 int regcache_sync(struct regmap *map)
 291 {
 292         int ret = 0;
 293         unsigned int i;
 294         const char *name;
 295         unsigned int bypass;
 296
 297         BUG_ON(!map->cache_ops);
 298
 299         map->lock(map->lock_arg);
 300         /* Remember the initial bypass state */
 301         bypass = map->cache_bypass;
 302         dev_dbg(map->dev, "Syncing %s cache\n",
 303                 map->cache_ops->name);
 304         name = map->cache_ops->name;
 305         trace_regcache_sync(map->dev, name, "start");
 306
 307         if (!map->cache_dirty)
 308                 goto out;
 309
 310         /* Apply any patch first */
 311         map->cache_bypass = 1;
 312         for (i = 0; i < map->patch_regs; i++) {
 313                 if (map->patch[i].reg % map->reg_stride) {
 314                         ret = -EINVAL;
 315                         goto out;
 316                 }
 317                 ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
 318                 if (ret != 0) {
 319                         dev_err(map->dev, "Failed to write %x = %x: %d\n",
 320                                 map->patch[i].reg, map->patch[i].def, ret);
 321                         goto out;
 322                 }
 323         }
 324         map->cache_bypass = 0;
 325
 326         if (map->cache_ops->sync)
 327                 ret = map->cache_ops->sync(map, 0, map->max_register);
 328         else
 329                 ret = regcache_default_sync(map, 0, map->max_register);
 330
 331         if (ret == 0)
 332                 map->cache_dirty = false;
 333
 334 out:
 335         trace_regcache_sync(map->dev, name, "stop");
 336         /* Restore the bypass state */
 337         map->cache_bypass = bypass;
 338         map->unlock(map->lock_arg);
 339
 340         return ret;
 341 }
 342 EXPORT_SYMBOL_GPL(regcache_sync);
 343
 344 /**
 345  * regcache_sync_region: Sync part  of the register cache with the hardware.
 346  *
 347  * @map: map to sync.
 348  * @min: first register to sync
 349  * @max: last register to sync
 350  *
 351  * Write all non-default register values in the specified region to
 352  * the hardware.
 353  *
 354  * Return a negative value on failure, 0 on success.
 355  */
 356 int regcache_sync_region(struct regmap *map, unsigned int min,
 357                          unsigned int max)
 358 {
 359         int ret = 0;
 360         const char *name;
 361         unsigned int bypass;
 362
 363         BUG_ON(!map->cache_ops);
 364
 365         map->lock(map->lock_arg);
 366
 367         /* Remember the initial bypass state */
 368         bypass = map->cache_bypass;
 369
 370         name = map->cache_ops->name;
 371         dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
 372
 373         trace_regcache_sync(map->dev, name, "start region");
 374
 375         if (!map->cache_dirty)
 376                 goto out;
 377
 378         if (map->cache_ops->sync)
 379                 ret = map->cache_ops->sync(map, min, max);
 380         else
 381                 ret = regcache_default_sync(map, min, max);
 382
 383 out:
 384         trace_regcache_sync(map->dev, name, "stop region");
 385         /* Restore the bypass state */
 386         map->cache_bypass = bypass;
 387         map->unlock(map->lock_arg);
 388
 389         return ret;
 390 }
 391 EXPORT_SYMBOL_GPL(regcache_sync_region);
 392
 393 /**
 394  * regcache_drop_region: Discard part of the register cache
 395  *
 396  * @map: map to operate on
 397  * @min: first register to discard
 398  * @max: last register to discard
 399  *
 400  * Discard part of the register cache.
 401  *
 402  * Return a negative value on failure, 0 on success.
 403  */
 404 int regcache_drop_region(struct regmap *map, unsigned int min,
 405                          unsigned int max)
 406 {
 407         int ret = 0;
 408
 409         if (!map->cache_ops || !map->cache_ops->drop)
 410                 return -EINVAL;
 411
 412         map->lock(map->lock_arg);
 413
 414         trace_regcache_drop_region(map->dev, min, max);
 415
 416         ret = map->cache_ops->drop(map, min, max);
 417
 418         map->unlock(map->lock_arg);
 419
 420         return ret;
 421 }
 422 EXPORT_SYMBOL_GPL(regcache_drop_region);
 423
 424 /**
 425  * regcache_cache_only: Put a register map into cache only mode
 426  *
 427  * @map: map to configure
 428  * @cache_only: flag if changes should be written to the hardware
 429  *
 430  * When a register map is marked as cache only writes to the register
 431  * map API will only update the register cache, they will not cause
 432  * any hardware changes.  This is useful for allowing portions of
 433  * drivers to act as though the device were functioning as normal when
 434  * it is disabled for power saving reasons.
 435  */
 436 void regcache_cache_only(struct regmap *map, bool enable)
 437 {
 438         map->lock(map->lock_arg);
 439         WARN_ON(map->cache_bypass && enable);
 440         map->cache_only = enable;
 441         trace_regmap_cache_only(map->dev, enable);
 442         map->unlock(map->lock_arg);
 443 }
 444 EXPORT_SYMBOL_GPL(regcache_cache_only);
 445
 446 /**
 447  * regcache_mark_dirty: Mark the register cache as dirty
 448  *
 449  * @map: map to mark
 450  *
 451  * Mark the register cache as dirty, for example due to the device
 452  * having been powered down for suspend.  If the cache is not marked
 453  * as dirty then the cache sync will be suppressed.
 454  */
 455 void regcache_mark_dirty(struct regmap *map)
 456 {
 457         map->lock(map->lock_arg);
 458         map->cache_dirty = true;
 459         map->unlock(map->lock_arg);
 460 }
 461 EXPORT_SYMBOL_GPL(regcache_mark_dirty);
 462
 463 /**
 464  * regcache_cache_bypass: Put a register map into cache bypass mode
 465  *
 466  * @map: map to configure
 467  * @cache_bypass: flag if changes should not be written to the hardware
 468  *
 469  * When a register map is marked with the cache bypass option, writes
 470  * to the register map API will only update the hardware and not the
 471  * the cache directly.  This is useful when syncing the cache back to
 472  * the hardware.
 473  */
 474 void regcache_cache_bypass(struct regmap *map, bool enable)
 475 {
 476         map->lock(map->lock_arg);
 477         WARN_ON(map->cache_only && enable);
 478         map->cache_bypass = enable;
 479         trace_regmap_cache_bypass(map->dev, enable);
 480         map->unlock(map->lock_arg);
 481 }
 482 EXPORT_SYMBOL_GPL(regcache_cache_bypass);
 483
 484 bool regcache_set_val(struct regmap *map, void *base, unsigned int idx,
 485                       unsigned int val)
 486 {
 487         if (regcache_get_val(map, base, idx) == val)
 488                 return true;
 489
 490         /* Use device native format if possible */
 491         if (map->format.format_val) {
 492                 map->format.format_val(base + (map->cache_word_size * idx),
 493                                        val, 0);
 494                 return false;
 495         }
 496
 497         switch (map->cache_word_size) {
 498         case 1: {
 499                 u8 *cache = base;
 500                 cache[idx] = val;
 501                 break;
 502         }
 503         case 2: {
 504                 u16 *cache = base;
 505                 cache[idx] = val;
 506                 break;
 507         }
 508         case 4: {
 509                 u32 *cache = base;
 510                 cache[idx] = val;
 511                 break;
 512         }
 513         default:
 514                 BUG();
 515         }
 516         return false;
 517 }
 518
 519 unsigned int regcache_get_val(struct regmap *map, const void *base,
 520                               unsigned int idx)
 521 {
 522         if (!base)
 523                 return -EINVAL;
 524
 525         /* Use device native format if possible */
 526         if (map->format.parse_val)
 527                 return map->format.parse_val(regcache_get_val_addr(map, base,
 528                                                                    idx));
 529
 530         switch (map->cache_word_size) {
 531         case 1: {
 532                 const u8 *cache = base;
 533                 return cache[idx];
 534         }
 535         case 2: {
 536                 const u16 *cache = base;
 537                 return cache[idx];
 538         }
 539         case 4: {
 540                 const u32 *cache = base;
 541                 return cache[idx];
 542         }
 543         default:
 544                 BUG();
 545         }
 546         /* unreachable */
 547         return -1;
 548 }
 549
 550 static int regcache_default_cmp(const void *a, const void *b)
 551 {
 552         const struct reg_default *_a = a;
 553         const struct reg_default *_b = b;
 554
 555         return _a->reg - _b->reg;
 556 }
 557
 558 int regcache_lookup_reg(struct regmap *map, unsigned int reg)
 559 {
 560         struct reg_default key;
 561         struct reg_default *r;
 562
 563         key.reg = reg;
 564         key.def = 0;
 565
 566         r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
 567                     sizeof(struct reg_default), regcache_default_cmp);
 568
 569         if (r)
 570                 return r - map->reg_defaults;
 571         else
 572                 return -ENOENT;
 573 }
 574
 575 static bool regcache_reg_present(unsigned long *cache_present, unsigned int idx)
 576 {
 577         if (!cache_present)
 578                 return true;
 579
 580         return test_bit(idx, cache_present);
 581 }
 582
 583 static int regcache_sync_block_single(struct regmap *map, void *block,
 584                                       unsigned long *cache_present,
 585                                       unsigned int block_base,
 586                                       unsigned int start, unsigned int end)
 587 {
 588         unsigned int i, regtmp, val;
 589         int ret;
 590
 591         for (i = start; i < end; i++) {
 592                 regtmp = block_base + (i * map->reg_stride);
 593
 594                 if (!regcache_reg_present(cache_present, i))
 595                         continue;
 596
 597                 val = regcache_get_val(map, block, i);
 598
 599                 /* Is this the hardware default?  If so skip. */
 600                 ret = regcache_lookup_reg(map, regtmp);
 601                 if (ret >= 0 && val == map->reg_defaults[ret].def)
 602                         continue;
 603
 604                 map->cache_bypass = 1;
 605
 606                 ret = _regmap_write(map, regtmp, val);
 607
 608                 map->cache_bypass = 0;
 609                 if (ret != 0)
 610                         return ret;
 611                 dev_dbg(map->dev, "Synced register %#x, value %#x\n",
 612                         regtmp, val);
 613         }
 614
 615         return 0;
 616 }
 617
 618 static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
 619                                          unsigned int base, unsigned int cur)
 620 {
 621         size_t val_bytes = map->format.val_bytes;
 622         int ret, count;
 623
 624         if (*data == NULL)
 625                 return 0;
 626
 627         count = cur - base;
 628
 629         dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",
 630                 count * val_bytes, count, base, cur - 1);
 631
 632         map->cache_bypass = 1;
 633
 634         ret = _regmap_raw_write(map, base, *data, count * val_bytes,
 635                                 false);
 636
 637         map->cache_bypass = 0;
 638
 639         *data = NULL;
 640
 641         return ret;
 642 }
 643
 644 static int regcache_sync_block_raw(struct regmap *map, void *block,
 645                             unsigned long *cache_present,
 646                             unsigned int block_base, unsigned int start,
 647                             unsigned int end)
 648 {
 649         unsigned int i, val;
 650         unsigned int regtmp = 0;
 651         unsigned int base = 0;
 652         const void *data = NULL;
 653         int ret;
 654
 655         for (i = start; i < end; i++) {
 656                 regtmp = block_base + (i * map->reg_stride);
 657
 658                 if (!regcache_reg_present(cache_present, i)) {
 659                         ret = regcache_sync_block_raw_flush(map, &data,
 660                                                             base, regtmp);
 661                         if (ret != 0)
 662                                 return ret;
 663                         continue;
 664                 }
 665
 666                 val = regcache_get_val(map, block, i);
 667
 668                 /* Is this the hardware default?  If so skip. */
 669                 ret = regcache_lookup_reg(map, regtmp);
 670                 if (ret >= 0 && val == map->reg_defaults[ret].def) {
 671                         ret = regcache_sync_block_raw_flush(map, &data,
 672                                                             base, regtmp);
 673                         if (ret != 0)
 674                                 return ret;
 675                         continue;
 676                 }
 677
 678                 if (!data) {
 679                         data = regcache_get_val_addr(map, block, i);
 680                         base = regtmp;
 681                 }
 682         }
 683
 684         return regcache_sync_block_raw_flush(map, &data, base, regtmp +
 685                         map->reg_stride);
 686 }
 687
 688 int regcache_sync_block(struct regmap *map, void *block,
 689                         unsigned long *cache_present,
 690                         unsigned int block_base, unsigned int start,
 691                         unsigned int end)
 692 {
 693         if (regmap_can_raw_write(map))
 694                 return regcache_sync_block_raw(map, block, cache_present,
 695                                                block_base, start, end);
 696         else
 697                 return regcache_sync_block_single(map, block, cache_present,
 698                                                   block_base, start, end);
 699 }