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x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / block / mtip32xx / mtip32xx.c
blob560227b817fe5d2f7b9aa087fa426c25448b4ab2
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/bio.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/idr.h>
37 #include <linux/kthread.h>
38 #include <../drivers/ata/ahci.h>
39 #include <linux/export.h>
40 #include <linux/debugfs.h>
41 #include "mtip32xx.h"
42
43 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
44 #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16))
45 #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS)
46 #define HW_PORT_PRIV_DMA_SZ \
47 (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ)
48
49 #define HOST_CAP_NZDMA (1 << 19)
50 #define HOST_HSORG 0xFC
51 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
52 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
53 #define HSORG_HWREV 0xFF00
54 #define HSORG_STYLE 0x8
55 #define HSORG_SLOTGROUPS 0x7
56
57 #define PORT_COMMAND_ISSUE 0x38
58 #define PORT_SDBV 0x7C
59
60 #define PORT_OFFSET 0x100
61 #define PORT_MEM_SIZE 0x80
62
63 #define PORT_IRQ_ERR \
64 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
65 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
66 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
67 PORT_IRQ_OVERFLOW)
68 #define PORT_IRQ_LEGACY \
69 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
70 #define PORT_IRQ_HANDLED \
71 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
72 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
73 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
74 #define DEF_PORT_IRQ \
75 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
76
77 /* product numbers */
78 #define MTIP_PRODUCT_UNKNOWN 0x00
79 #define MTIP_PRODUCT_ASICFPGA 0x11
80
81 /* Device instance number, incremented each time a device is probed. */
82 static int instance;
83
84 struct list_head online_list;
85 struct list_head removing_list;
86 spinlock_t dev_lock;
87
88 /*
89 * Global variable used to hold the major block device number
90 * allocated in mtip_init().
91 */
92 static int mtip_major;
93 static struct dentry *dfs_parent;
94 static struct dentry *dfs_device_status;
95
96 static u32 cpu_use[NR_CPUS];
97
98 static DEFINE_SPINLOCK(rssd_index_lock);
99 static DEFINE_IDA(rssd_index_ida);
100
101 static int mtip_block_initialize(struct driver_data *dd);
102
103 #ifdef CONFIG_COMPAT
104 struct mtip_compat_ide_task_request_s {
105 __u8 io_ports[8];
106 __u8 hob_ports[8];
107 ide_reg_valid_t out_flags;
108 ide_reg_valid_t in_flags;
109 int data_phase;
110 int req_cmd;
111 compat_ulong_t out_size;
112 compat_ulong_t in_size;
113 };
114 #endif
115
116 /*
117 * This function check_for_surprise_removal is called
118 * while card is removed from the system and it will
119 * read the vendor id from the configration space
120 *
121 * @pdev Pointer to the pci_dev structure.
122 *
123 * return value
124 * true if device removed, else false
125 */
126 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
127 {
128 u16 vendor_id = 0;
129
130 /* Read the vendorID from the configuration space */
131 pci_read_config_word(pdev, 0x00, &vendor_id);
132 if (vendor_id == 0xFFFF)
133 return true; /* device removed */
134
135 return false; /* device present */
136 }
137
138 /*
139 * This function is called for clean the pending command in the
140 * command slot during the surprise removal of device and return
141 * error to the upper layer.
142 *
143 * @dd Pointer to the DRIVER_DATA structure.
144 *
145 * return value
146 * None
147 */
148 static void mtip_command_cleanup(struct driver_data *dd)
149 {
150 int group = 0, commandslot = 0, commandindex = 0;
151 struct mtip_cmd *command;
152 struct mtip_port *port = dd->port;
153 static int in_progress;
154
155 if (in_progress)
156 return;
157
158 in_progress = 1;
159
160 for (group = 0; group < 4; group++) {
161 for (commandslot = 0; commandslot < 32; commandslot++) {
162 if (!(port->allocated[group] & (1 << commandslot)))
163 continue;
164
165 commandindex = group << 5 | commandslot;
166 command = &port->commands[commandindex];
167
168 if (atomic_read(&command->active)
169 && (command->async_callback)) {
170 command->async_callback(command->async_data,
171 -ENODEV);
172 command->async_callback = NULL;
173 command->async_data = NULL;
174 }
175
176 dma_unmap_sg(&port->dd->pdev->dev,
177 command->sg,
178 command->scatter_ents,
179 command->direction);
180 }
181 }
182
183 up(&port->cmd_slot);
184
185 set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag);
186 in_progress = 0;
187 }
188
189 /*
190 * Obtain an empty command slot.
191 *
192 * This function needs to be reentrant since it could be called
193 * at the same time on multiple CPUs. The allocation of the
194 * command slot must be atomic.
195 *
196 * @port Pointer to the port data structure.
197 *
198 * return value
199 * >= 0 Index of command slot obtained.
200 * -1 No command slots available.
201 */
202 static int get_slot(struct mtip_port *port)
203 {
204 int slot, i;
205 unsigned int num_command_slots = port->dd->slot_groups * 32;
206
207 /*
208 * Try 10 times, because there is a small race here.
209 * that's ok, because it's still cheaper than a lock.
210 *
211 * Race: Since this section is not protected by lock, same bit
212 * could be chosen by different process contexts running in
213 * different processor. So instead of costly lock, we are going
214 * with loop.
215 */
216 for (i = 0; i < 10; i++) {
217 slot = find_next_zero_bit(port->allocated,
218 num_command_slots, 1);
219 if ((slot < num_command_slots) &&
220 (!test_and_set_bit(slot, port->allocated)))
221 return slot;
222 }
223 dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n");
224
225 if (mtip_check_surprise_removal(port->dd->pdev)) {
226 /* Device not present, clean outstanding commands */
227 mtip_command_cleanup(port->dd);
228 }
229 return -1;
230 }
231
232 /*
233 * Release a command slot.
234 *
235 * @port Pointer to the port data structure.
236 * @tag Tag of command to release
237 *
238 * return value
239 * None
240 */
241 static inline void release_slot(struct mtip_port *port, int tag)
242 {
243 smp_mb__before_clear_bit();
244 clear_bit(tag, port->allocated);
245 smp_mb__after_clear_bit();
246 }
247
248 /*
249 * Reset the HBA (without sleeping)
250 *
251 * @dd Pointer to the driver data structure.
252 *
253 * return value
254 * 0 The reset was successful.
255 * -1 The HBA Reset bit did not clear.
256 */
257 static int mtip_hba_reset(struct driver_data *dd)
258 {
259 unsigned long timeout;
260
261 /* Set the reset bit */
262 writel(HOST_RESET, dd->mmio + HOST_CTL);
263
264 /* Flush */
265 readl(dd->mmio + HOST_CTL);
266
267 /* Spin for up to 2 seconds, waiting for reset acknowledgement */
268 timeout = jiffies + msecs_to_jiffies(2000);
269 do {
270 mdelay(10);
271 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
272 return -1;
273
274 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
275 && time_before(jiffies, timeout));
276
277 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
278 return -1;
279
280 return 0;
281 }
282
283 /*
284 * Issue a command to the hardware.
285 *
286 * Set the appropriate bit in the s_active and Command Issue hardware
287 * registers, causing hardware command processing to begin.
288 *
289 * @port Pointer to the port structure.
290 * @tag The tag of the command to be issued.
291 *
292 * return value
293 * None
294 */
295 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
296 {
297 int group = tag >> 5;
298
299 atomic_set(&port->commands[tag].active, 1);
300
301 /* guard SACT and CI registers */
302 spin_lock(&port->cmd_issue_lock[group]);
303 writel((1 << MTIP_TAG_BIT(tag)),
304 port->s_active[MTIP_TAG_INDEX(tag)]);
305 writel((1 << MTIP_TAG_BIT(tag)),
306 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
307 spin_unlock(&port->cmd_issue_lock[group]);
308
309 /* Set the command's timeout value.*/
310 port->commands[tag].comp_time = jiffies + msecs_to_jiffies(
311 MTIP_NCQ_COMMAND_TIMEOUT_MS);
312 }
313
314 /*
315 * Enable/disable the reception of FIS
316 *
317 * @port Pointer to the port data structure
318 * @enable 1 to enable, 0 to disable
319 *
320 * return value
321 * Previous state: 1 enabled, 0 disabled
322 */
323 static int mtip_enable_fis(struct mtip_port *port, int enable)
324 {
325 u32 tmp;
326
327 /* enable FIS reception */
328 tmp = readl(port->mmio + PORT_CMD);
329 if (enable)
330 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
331 else
332 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
333
334 /* Flush */
335 readl(port->mmio + PORT_CMD);
336
337 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
338 }
339
340 /*
341 * Enable/disable the DMA engine
342 *
343 * @port Pointer to the port data structure
344 * @enable 1 to enable, 0 to disable
345 *
346 * return value
347 * Previous state: 1 enabled, 0 disabled.
348 */
349 static int mtip_enable_engine(struct mtip_port *port, int enable)
350 {
351 u32 tmp;
352
353 /* enable FIS reception */
354 tmp = readl(port->mmio + PORT_CMD);
355 if (enable)
356 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
357 else
358 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
359
360 readl(port->mmio + PORT_CMD);
361 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
362 }
363
364 /*
365 * Enables the port DMA engine and FIS reception.
366 *
367 * return value
368 * None
369 */
370 static inline void mtip_start_port(struct mtip_port *port)
371 {
372 /* Enable FIS reception */
373 mtip_enable_fis(port, 1);
374
375 /* Enable the DMA engine */
376 mtip_enable_engine(port, 1);
377 }
378
379 /*
380 * Deinitialize a port by disabling port interrupts, the DMA engine,
381 * and FIS reception.
382 *
383 * @port Pointer to the port structure
384 *
385 * return value
386 * None
387 */
388 static inline void mtip_deinit_port(struct mtip_port *port)
389 {
390 /* Disable interrupts on this port */
391 writel(0, port->mmio + PORT_IRQ_MASK);
392
393 /* Disable the DMA engine */
394 mtip_enable_engine(port, 0);
395
396 /* Disable FIS reception */
397 mtip_enable_fis(port, 0);
398 }
399
400 /*
401 * Initialize a port.
402 *
403 * This function deinitializes the port by calling mtip_deinit_port() and
404 * then initializes it by setting the command header and RX FIS addresses,
405 * clearing the SError register and any pending port interrupts before
406 * re-enabling the default set of port interrupts.
407 *
408 * @port Pointer to the port structure.
409 *
410 * return value
411 * None
412 */
413 static void mtip_init_port(struct mtip_port *port)
414 {
415 int i;
416 mtip_deinit_port(port);
417
418 /* Program the command list base and FIS base addresses */
419 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
420 writel((port->command_list_dma >> 16) >> 16,
421 port->mmio + PORT_LST_ADDR_HI);
422 writel((port->rxfis_dma >> 16) >> 16,
423 port->mmio + PORT_FIS_ADDR_HI);
424 }
425
426 writel(port->command_list_dma & 0xFFFFFFFF,
427 port->mmio + PORT_LST_ADDR);
428 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
429
430 /* Clear SError */
431 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
432
433 /* reset the completed registers.*/
434 for (i = 0; i < port->dd->slot_groups; i++)
435 writel(0xFFFFFFFF, port->completed[i]);
436
437 /* Clear any pending interrupts for this port */
438 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
439
440 /* Clear any pending interrupts on the HBA. */
441 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
442 port->dd->mmio + HOST_IRQ_STAT);
443
444 /* Enable port interrupts */
445 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
446 }
447
448 /*
449 * Restart a port
450 *
451 * @port Pointer to the port data structure.
452 *
453 * return value
454 * None
455 */
456 static void mtip_restart_port(struct mtip_port *port)
457 {
458 unsigned long timeout;
459
460 /* Disable the DMA engine */
461 mtip_enable_engine(port, 0);
462
463 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
464 timeout = jiffies + msecs_to_jiffies(500);
465 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
466 && time_before(jiffies, timeout))
467 ;
468
469 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
470 return;
471
472 /*
473 * Chip quirk: escalate to hba reset if
474 * PxCMD.CR not clear after 500 ms
475 */
476 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
477 dev_warn(&port->dd->pdev->dev,
478 "PxCMD.CR not clear, escalating reset\n");
479
480 if (mtip_hba_reset(port->dd))
481 dev_err(&port->dd->pdev->dev,
482 "HBA reset escalation failed.\n");
483
484 /* 30 ms delay before com reset to quiesce chip */
485 mdelay(30);
486 }
487
488 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
489
490 /* Set PxSCTL.DET */
491 writel(readl(port->mmio + PORT_SCR_CTL) |
492 1, port->mmio + PORT_SCR_CTL);
493 readl(port->mmio + PORT_SCR_CTL);
494
495 /* Wait 1 ms to quiesce chip function */
496 timeout = jiffies + msecs_to_jiffies(1);
497 while (time_before(jiffies, timeout))
498 ;
499
500 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
501 return;
502
503 /* Clear PxSCTL.DET */
504 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
505 port->mmio + PORT_SCR_CTL);
506 readl(port->mmio + PORT_SCR_CTL);
507
508 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
509 timeout = jiffies + msecs_to_jiffies(500);
510 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
511 && time_before(jiffies, timeout))
512 ;
513
514 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
515 return;
516
517 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
518 dev_warn(&port->dd->pdev->dev,
519 "COM reset failed\n");
520
521 mtip_init_port(port);
522 mtip_start_port(port);
523
524 }
525
526 static int mtip_device_reset(struct driver_data *dd)
527 {
528 int rv = 0;
529
530 if (mtip_check_surprise_removal(dd->pdev))
531 return 0;
532
533 if (mtip_hba_reset(dd) < 0)
534 rv = -EFAULT;
535
536 mdelay(1);
537 mtip_init_port(dd->port);
538 mtip_start_port(dd->port);
539
540 /* Enable interrupts on the HBA. */
541 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
542 dd->mmio + HOST_CTL);
543 return rv;
544 }
545
546 /*
547 * Helper function for tag logging
548 */
549 static void print_tags(struct driver_data *dd,
550 char *msg,
551 unsigned long *tagbits,
552 int cnt)
553 {
554 unsigned char tagmap[128];
555 int group, tagmap_len = 0;
556
557 memset(tagmap, 0, sizeof(tagmap));
558 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
559 tagmap_len = sprintf(tagmap + tagmap_len, "%016lX ",
560 tagbits[group-1]);
561 dev_warn(&dd->pdev->dev,
562 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
563 }
564
565 /*
566 * Called periodically to see if any read/write commands are
567 * taking too long to complete.
568 *
569 * @data Pointer to the PORT data structure.
570 *
571 * return value
572 * None
573 */
574 static void mtip_timeout_function(unsigned long int data)
575 {
576 struct mtip_port *port = (struct mtip_port *) data;
577 struct host_to_dev_fis *fis;
578 struct mtip_cmd *command;
579 int tag, cmdto_cnt = 0;
580 unsigned int bit, group;
581 unsigned int num_command_slots;
582 unsigned long to, tagaccum[SLOTBITS_IN_LONGS];
583
584 if (unlikely(!port))
585 return;
586
587 if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) {
588 mod_timer(&port->cmd_timer,
589 jiffies + msecs_to_jiffies(30000));
590 return;
591 }
592 /* clear the tag accumulator */
593 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
594 num_command_slots = port->dd->slot_groups * 32;
595
596 for (tag = 0; tag < num_command_slots; tag++) {
597 /*
598 * Skip internal command slot as it has
599 * its own timeout mechanism
600 */
601 if (tag == MTIP_TAG_INTERNAL)
602 continue;
603
604 if (atomic_read(&port->commands[tag].active) &&
605 (time_after(jiffies, port->commands[tag].comp_time))) {
606 group = tag >> 5;
607 bit = tag & 0x1F;
608
609 command = &port->commands[tag];
610 fis = (struct host_to_dev_fis *) command->command;
611
612 set_bit(tag, tagaccum);
613 cmdto_cnt++;
614 if (cmdto_cnt == 1)
615 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
616
617 /*
618 * Clear the completed bit. This should prevent
619 * any interrupt handlers from trying to retire
620 * the command.
621 */
622 writel(1 << bit, port->completed[group]);
623
624 /* Unmap the DMA scatter list entries */
625 dma_unmap_sg(&port->dd->pdev->dev,
626 command->sg,
627 command->scatter_ents,
628 command->direction);
629
630 /* Call the async completion callback. */
631 if (likely(command->async_callback))
632 command->async_callback(command->async_data,
633 -EIO);
634 command->async_callback = NULL;
635 command->comp_func = NULL;
636
637 /*
638 * Clear the allocated bit and active tag for the
639 * command.
640 */
641 atomic_set(&port->commands[tag].active, 0);
642 release_slot(port, tag);
643
644 up(&port->cmd_slot);
645 }
646 }
647
648 if (cmdto_cnt) {
649 print_tags(port->dd, "timed out", tagaccum, cmdto_cnt);
650 if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
651 mtip_device_reset(port->dd);
652 wake_up_interruptible(&port->svc_wait);
653 }
654 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
655 }
656
657 if (port->ic_pause_timer) {
658 to = port->ic_pause_timer + msecs_to_jiffies(1000);
659 if (time_after(jiffies, to)) {
660 if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
661 port->ic_pause_timer = 0;
662 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
663 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
664 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
665 wake_up_interruptible(&port->svc_wait);
666 }
667
668
669 }
670 }
671
672 /* Restart the timer */
673 mod_timer(&port->cmd_timer,
674 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
675 }
676
677 /*
678 * IO completion function.
679 *
680 * This completion function is called by the driver ISR when a
681 * command that was issued by the kernel completes. It first calls the
682 * asynchronous completion function which normally calls back into the block
683 * layer passing the asynchronous callback data, then unmaps the
684 * scatter list associated with the completed command, and finally
685 * clears the allocated bit associated with the completed command.
686 *
687 * @port Pointer to the port data structure.
688 * @tag Tag of the command.
689 * @data Pointer to driver_data.
690 * @status Completion status.
691 *
692 * return value
693 * None
694 */
695 static void mtip_async_complete(struct mtip_port *port,
696 int tag,
697 void *data,
698 int status)
699 {
700 struct mtip_cmd *command;
701 struct driver_data *dd = data;
702 int cb_status = status ? -EIO : 0;
703
704 if (unlikely(!dd) || unlikely(!port))
705 return;
706
707 command = &port->commands[tag];
708
709 if (unlikely(status == PORT_IRQ_TF_ERR)) {
710 dev_warn(&port->dd->pdev->dev,
711 "Command tag %d failed due to TFE\n", tag);
712 }
713
714 /* Unmap the DMA scatter list entries */
715 dma_unmap_sg(&dd->pdev->dev,
716 command->sg,
717 command->scatter_ents,
718 command->direction);
719
720 /* Upper layer callback */
721 if (likely(command->async_callback))
722 command->async_callback(command->async_data, cb_status);
723
724 command->async_callback = NULL;
725 command->comp_func = NULL;
726
727 /* Clear the allocated and active bits for the command */
728 atomic_set(&port->commands[tag].active, 0);
729 release_slot(port, tag);
730
731 if (unlikely(command->unaligned))
732 up(&port->cmd_slot_unal);
733 else
734 up(&port->cmd_slot);
735 }
736
737 /*
738 * Internal command completion callback function.
739 *
740 * This function is normally called by the driver ISR when an internal
741 * command completed. This function signals the command completion by
742 * calling complete().
743 *
744 * @port Pointer to the port data structure.
745 * @tag Tag of the command that has completed.
746 * @data Pointer to a completion structure.
747 * @status Completion status.
748 *
749 * return value
750 * None
751 */
752 static void mtip_completion(struct mtip_port *port,
753 int tag,
754 void *data,
755 int status)
756 {
757 struct mtip_cmd *command = &port->commands[tag];
758 struct completion *waiting = data;
759 if (unlikely(status == PORT_IRQ_TF_ERR))
760 dev_warn(&port->dd->pdev->dev,
761 "Internal command %d completed with TFE\n", tag);
762
763 command->async_callback = NULL;
764 command->comp_func = NULL;
765
766 complete(waiting);
767 }
768
769 static void mtip_null_completion(struct mtip_port *port,
770 int tag,
771 void *data,
772 int status)
773 {
774 return;
775 }
776
777 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
778 dma_addr_t buffer_dma, unsigned int sectors);
779 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
780 struct smart_attr *attrib);
781 /*
782 * Handle an error.
783 *
784 * @dd Pointer to the DRIVER_DATA structure.
785 *
786 * return value
787 * None
788 */
789 static void mtip_handle_tfe(struct driver_data *dd)
790 {
791 int group, tag, bit, reissue, rv;
792 struct mtip_port *port;
793 struct mtip_cmd *cmd;
794 u32 completed;
795 struct host_to_dev_fis *fis;
796 unsigned long tagaccum[SLOTBITS_IN_LONGS];
797 unsigned int cmd_cnt = 0;
798 unsigned char *buf;
799 char *fail_reason = NULL;
800 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
801
802 dev_warn(&dd->pdev->dev, "Taskfile error\n");
803
804 port = dd->port;
805
806 /* Stop the timer to prevent command timeouts. */
807 del_timer(&port->cmd_timer);
808 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
809
810 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
811 test_bit(MTIP_TAG_INTERNAL, port->allocated)) {
812 cmd = &port->commands[MTIP_TAG_INTERNAL];
813 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
814
815 atomic_inc(&cmd->active); /* active > 1 indicates error */
816 if (cmd->comp_data && cmd->comp_func) {
817 cmd->comp_func(port, MTIP_TAG_INTERNAL,
818 cmd->comp_data, PORT_IRQ_TF_ERR);
819 }
820 goto handle_tfe_exit;
821 }
822
823 /* clear the tag accumulator */
824 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
825
826 /* Loop through all the groups */
827 for (group = 0; group < dd->slot_groups; group++) {
828 completed = readl(port->completed[group]);
829
830 /* clear completed status register in the hardware.*/
831 writel(completed, port->completed[group]);
832
833 /* Process successfully completed commands */
834 for (bit = 0; bit < 32 && completed; bit++) {
835 if (!(completed & (1<<bit)))
836 continue;
837 tag = (group << 5) + bit;
838
839 /* Skip the internal command slot */
840 if (tag == MTIP_TAG_INTERNAL)
841 continue;
842
843 cmd = &port->commands[tag];
844 if (likely(cmd->comp_func)) {
845 set_bit(tag, tagaccum);
846 cmd_cnt++;
847 atomic_set(&cmd->active, 0);
848 cmd->comp_func(port,
849 tag,
850 cmd->comp_data,
851 0);
852 } else {
853 dev_err(&port->dd->pdev->dev,
854 "Missing completion func for tag %d",
855 tag);
856 if (mtip_check_surprise_removal(dd->pdev)) {
857 mtip_command_cleanup(dd);
858 /* don't proceed further */
859 return;
860 }
861 }
862 }
863 }
864
865 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
866
867 /* Restart the port */
868 mdelay(20);
869 mtip_restart_port(port);
870
871 /* Trying to determine the cause of the error */
872 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
873 dd->port->log_buf,
874 dd->port->log_buf_dma, 1);
875 if (rv) {
876 dev_warn(&dd->pdev->dev,
877 "Error in READ LOG EXT (10h) command\n");
878 /* non-critical error, don't fail the load */
879 } else {
880 buf = (unsigned char *)dd->port->log_buf;
881 if (buf[259] & 0x1) {
882 dev_info(&dd->pdev->dev,
883 "Write protect bit is set.\n");
884 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
885 fail_all_ncq_write = 1;
886 fail_reason = "write protect";
887 }
888 if (buf[288] == 0xF7) {
889 dev_info(&dd->pdev->dev,
890 "Exceeded Tmax, drive in thermal shutdown.\n");
891 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
892 fail_all_ncq_cmds = 1;
893 fail_reason = "thermal shutdown";
894 }
895 if (buf[288] == 0xBF) {
896 dev_info(&dd->pdev->dev,
897 "Drive indicates rebuild has failed.\n");
898 fail_all_ncq_cmds = 1;
899 fail_reason = "rebuild failed";
900 }
901 }
902
903 /* clear the tag accumulator */
904 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
905
906 /* Loop through all the groups */
907 for (group = 0; group < dd->slot_groups; group++) {
908 for (bit = 0; bit < 32; bit++) {
909 reissue = 1;
910 tag = (group << 5) + bit;
911 cmd = &port->commands[tag];
912
913 /* If the active bit is set re-issue the command */
914 if (atomic_read(&cmd->active) == 0)
915 continue;
916
917 fis = (struct host_to_dev_fis *)cmd->command;
918
919 /* Should re-issue? */
920 if (tag == MTIP_TAG_INTERNAL ||
921 fis->command == ATA_CMD_SET_FEATURES)
922 reissue = 0;
923 else {
924 if (fail_all_ncq_cmds ||
925 (fail_all_ncq_write &&
926 fis->command == ATA_CMD_FPDMA_WRITE)) {
927 dev_warn(&dd->pdev->dev,
928 " Fail: %s w/tag %d [%s].\n",
929 fis->command == ATA_CMD_FPDMA_WRITE ?
930 "write" : "read",
931 tag,
932 fail_reason != NULL ?
933 fail_reason : "unknown");
934 atomic_set(&cmd->active, 0);
935 if (cmd->comp_func) {
936 cmd->comp_func(port, tag,
937 cmd->comp_data,
938 -ENODATA);
939 }
940 continue;
941 }
942 }
943
944 /*
945 * First check if this command has
946 * exceeded its retries.
947 */
948 if (reissue && (cmd->retries-- > 0)) {
949
950 set_bit(tag, tagaccum);
951
952 /* Re-issue the command. */
953 mtip_issue_ncq_command(port, tag);
954
955 continue;
956 }
957
958 /* Retire a command that will not be reissued */
959 dev_warn(&port->dd->pdev->dev,
960 "retiring tag %d\n", tag);
961 atomic_set(&cmd->active, 0);
962
963 if (cmd->comp_func)
964 cmd->comp_func(
965 port,
966 tag,
967 cmd->comp_data,
968 PORT_IRQ_TF_ERR);
969 else
970 dev_warn(&port->dd->pdev->dev,
971 "Bad completion for tag %d\n",
972 tag);
973 }
974 }
975 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
976
977 handle_tfe_exit:
978 /* clear eh_active */
979 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
980 wake_up_interruptible(&port->svc_wait);
981
982 mod_timer(&port->cmd_timer,
983 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
984 }
985
986 /*
987 * Handle a set device bits interrupt
988 */
989 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
990 u32 completed)
991 {
992 struct driver_data *dd = port->dd;
993 int tag, bit;
994 struct mtip_cmd *command;
995
996 if (!completed) {
997 WARN_ON_ONCE(!completed);
998 return;
999 }
1000 /* clear completed status register in the hardware.*/
1001 writel(completed, port->completed[group]);
1002
1003 /* Process completed commands. */
1004 for (bit = 0; (bit < 32) && completed; bit++) {
1005 if (completed & 0x01) {
1006 tag = (group << 5) | bit;
1007
1008 /* skip internal command slot. */
1009 if (unlikely(tag == MTIP_TAG_INTERNAL))
1010 continue;
1011
1012 command = &port->commands[tag];
1013 /* make internal callback */
1014 if (likely(command->comp_func)) {
1015 command->comp_func(
1016 port,
1017 tag,
1018 command->comp_data,
1019 0);
1020 } else {
1021 dev_warn(&dd->pdev->dev,
1022 "Null completion "
1023 "for tag %d",
1024 tag);
1025
1026 if (mtip_check_surprise_removal(
1027 dd->pdev)) {
1028 mtip_command_cleanup(dd);
1029 return;
1030 }
1031 }
1032 }
1033 completed >>= 1;
1034 }
1035
1036 /* If last, re-enable interrupts */
1037 if (atomic_dec_return(&dd->irq_workers_active) == 0)
1038 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
1039 }
1040
1041 /*
1042 * Process legacy pio and d2h interrupts
1043 */
1044 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
1045 {
1046 struct mtip_port *port = dd->port;
1047 struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL];
1048
1049 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
1050 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1051 & (1 << MTIP_TAG_INTERNAL))) {
1052 if (cmd->comp_func) {
1053 cmd->comp_func(port,
1054 MTIP_TAG_INTERNAL,
1055 cmd->comp_data,
1056 0);
1057 return;
1058 }
1059 }
1060
1061 return;
1062 }
1063
1064 /*
1065 * Demux and handle errors
1066 */
1067 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
1068 {
1069 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR)))
1070 mtip_handle_tfe(dd);
1071
1072 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
1073 dev_warn(&dd->pdev->dev,
1074 "Clearing PxSERR.DIAG.x\n");
1075 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
1076 }
1077
1078 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
1079 dev_warn(&dd->pdev->dev,
1080 "Clearing PxSERR.DIAG.n\n");
1081 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
1082 }
1083
1084 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
1085 dev_warn(&dd->pdev->dev,
1086 "Port stat errors %x unhandled\n",
1087 (port_stat & ~PORT_IRQ_HANDLED));
1088 }
1089 }
1090
1091 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
1092 {
1093 struct driver_data *dd = (struct driver_data *) data;
1094 struct mtip_port *port = dd->port;
1095 u32 hba_stat, port_stat;
1096 int rv = IRQ_NONE;
1097 int do_irq_enable = 1, i, workers;
1098 struct mtip_work *twork;
1099
1100 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1101 if (hba_stat) {
1102 rv = IRQ_HANDLED;
1103
1104 /* Acknowledge the interrupt status on the port.*/
1105 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1106 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1107
1108 /* Demux port status */
1109 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
1110 do_irq_enable = 0;
1111 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
1112
1113 /* Start at 1: group zero is always local? */
1114 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
1115 i++) {
1116 twork = &dd->work[i];
1117 twork->completed = readl(port->completed[i]);
1118 if (twork->completed)
1119 workers++;
1120 }
1121
1122 atomic_set(&dd->irq_workers_active, workers);
1123 if (workers) {
1124 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
1125 twork = &dd->work[i];
1126 if (twork->completed)
1127 queue_work_on(
1128 twork->cpu_binding,
1129 dd->isr_workq,
1130 &twork->work);
1131 }
1132
1133 if (likely(dd->work[0].completed))
1134 mtip_workq_sdbfx(port, 0,
1135 dd->work[0].completed);
1136
1137 } else {
1138 /*
1139 * Chip quirk: SDB interrupt but nothing
1140 * to complete
1141 */
1142 do_irq_enable = 1;
1143 }
1144 }
1145
1146 if (unlikely(port_stat & PORT_IRQ_ERR)) {
1147 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
1148 mtip_command_cleanup(dd);
1149 /* don't proceed further */
1150 return IRQ_HANDLED;
1151 }
1152 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1153 &dd->dd_flag))
1154 return rv;
1155
1156 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
1157 }
1158
1159 if (unlikely(port_stat & PORT_IRQ_LEGACY))
1160 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
1161 }
1162
1163 /* acknowledge interrupt */
1164 if (unlikely(do_irq_enable))
1165 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
1166
1167 return rv;
1168 }
1169
1170 /*
1171 * HBA interrupt subroutine.
1172 *
1173 * @irq IRQ number.
1174 * @instance Pointer to the driver data structure.
1175 *
1176 * return value
1177 * IRQ_HANDLED A HBA interrupt was pending and handled.
1178 * IRQ_NONE This interrupt was not for the HBA.
1179 */
1180 static irqreturn_t mtip_irq_handler(int irq, void *instance)
1181 {
1182 struct driver_data *dd = instance;
1183
1184 return mtip_handle_irq(dd);
1185 }
1186
1187 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
1188 {
1189 atomic_set(&port->commands[tag].active, 1);
1190 writel(1 << MTIP_TAG_BIT(tag),
1191 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
1192 }
1193
1194 static bool mtip_pause_ncq(struct mtip_port *port,
1195 struct host_to_dev_fis *fis)
1196 {
1197 struct host_to_dev_fis *reply;
1198 unsigned long task_file_data;
1199
1200 reply = port->rxfis + RX_FIS_D2H_REG;
1201 task_file_data = readl(port->mmio+PORT_TFDATA);
1202
1203 if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
1204 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1205
1206 if ((task_file_data & 1))
1207 return false;
1208
1209 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
1210 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1211 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1212 port->ic_pause_timer = jiffies;
1213 return true;
1214 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1215 (fis->features == 0x03)) {
1216 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1217 port->ic_pause_timer = jiffies;
1218 return true;
1219 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1220 ((fis->command == 0xFC) &&
1221 (fis->features == 0x27 || fis->features == 0x72 ||
1222 fis->features == 0x62 || fis->features == 0x26))) {
1223 /* Com reset after secure erase or lowlevel format */
1224 mtip_restart_port(port);
1225 return false;
1226 }
1227
1228 return false;
1229 }
1230
1231 /*
1232 * Wait for port to quiesce
1233 *
1234 * @port Pointer to port data structure
1235 * @timeout Max duration to wait (ms)
1236 *
1237 * return value
1238 * 0 Success
1239 * -EBUSY Commands still active
1240 */
1241 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1242 {
1243 unsigned long to;
1244 unsigned int n;
1245 unsigned int active = 1;
1246
1247 to = jiffies + msecs_to_jiffies(timeout);
1248 do {
1249 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1250 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1251 msleep(20);
1252 continue; /* svc thd is actively issuing commands */
1253 }
1254 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1255 return -EFAULT;
1256 /*
1257 * Ignore s_active bit 0 of array element 0.
1258 * This bit will always be set
1259 */
1260 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1261 for (n = 1; n < port->dd->slot_groups; n++)
1262 active |= readl(port->s_active[n]);
1263
1264 if (!active)
1265 break;
1266
1267 msleep(20);
1268 } while (time_before(jiffies, to));
1269
1270 return active ? -EBUSY : 0;
1271 }
1272
1273 /*
1274 * Execute an internal command and wait for the completion.
1275 *
1276 * @port Pointer to the port data structure.
1277 * @fis Pointer to the FIS that describes the command.
1278 * @fis_len Length in WORDS of the FIS.
1279 * @buffer DMA accessible for command data.
1280 * @buf_len Length, in bytes, of the data buffer.
1281 * @opts Command header options, excluding the FIS length
1282 * and the number of PRD entries.
1283 * @timeout Time in ms to wait for the command to complete.
1284 *
1285 * return value
1286 * 0 Command completed successfully.
1287 * -EFAULT The buffer address is not correctly aligned.
1288 * -EBUSY Internal command or other IO in progress.
1289 * -EAGAIN Time out waiting for command to complete.
1290 */
1291 static int mtip_exec_internal_command(struct mtip_port *port,
1292 struct host_to_dev_fis *fis,
1293 int fis_len,
1294 dma_addr_t buffer,
1295 int buf_len,
1296 u32 opts,
1297 gfp_t atomic,
1298 unsigned long timeout)
1299 {
1300 struct mtip_cmd_sg *command_sg;
1301 DECLARE_COMPLETION_ONSTACK(wait);
1302 int rv = 0, ready2go = 1;
1303 struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL];
1304 unsigned long to;
1305 struct driver_data *dd = port->dd;
1306
1307 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1308 if (buffer & 0x00000007) {
1309 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1310 return -EFAULT;
1311 }
1312
1313 to = jiffies + msecs_to_jiffies(timeout);
1314 do {
1315 ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL,
1316 port->allocated);
1317 if (ready2go)
1318 break;
1319 mdelay(100);
1320 } while (time_before(jiffies, to));
1321 if (!ready2go) {
1322 dev_warn(&dd->pdev->dev,
1323 "Internal cmd active. new cmd [%02X]\n", fis->command);
1324 return -EBUSY;
1325 }
1326 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1327 port->ic_pause_timer = 0;
1328
1329 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1330 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1331
1332 if (atomic == GFP_KERNEL) {
1333 if (fis->command != ATA_CMD_STANDBYNOW1) {
1334 /* wait for io to complete if non atomic */
1335 if (mtip_quiesce_io(port, 5000) < 0) {
1336 dev_warn(&dd->pdev->dev,
1337 "Failed to quiesce IO\n");
1338 release_slot(port, MTIP_TAG_INTERNAL);
1339 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1340 wake_up_interruptible(&port->svc_wait);
1341 return -EBUSY;
1342 }
1343 }
1344
1345 /* Set the completion function and data for the command. */
1346 int_cmd->comp_data = &wait;
1347 int_cmd->comp_func = mtip_completion;
1348
1349 } else {
1350 /* Clear completion - we're going to poll */
1351 int_cmd->comp_data = NULL;
1352 int_cmd->comp_func = mtip_null_completion;
1353 }
1354
1355 /* Copy the command to the command table */
1356 memcpy(int_cmd->command, fis, fis_len*4);
1357
1358 /* Populate the SG list */
1359 int_cmd->command_header->opts =
1360 __force_bit2int cpu_to_le32(opts | fis_len);
1361 if (buf_len) {
1362 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1363
1364 command_sg->info =
1365 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1366 command_sg->dba =
1367 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1368 command_sg->dba_upper =
1369 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1370
1371 int_cmd->command_header->opts |=
1372 __force_bit2int cpu_to_le32((1 << 16));
1373 }
1374
1375 /* Populate the command header */
1376 int_cmd->command_header->byte_count = 0;
1377
1378 /* Issue the command to the hardware */
1379 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1380
1381 if (atomic == GFP_KERNEL) {
1382 /* Wait for the command to complete or timeout. */
1383 if (wait_for_completion_interruptible_timeout(
1384 &wait,
1385 msecs_to_jiffies(timeout)) <= 0) {
1386 if (rv == -ERESTARTSYS) { /* interrupted */
1387 dev_err(&dd->pdev->dev,
1388 "Internal command [%02X] was interrupted after %lu ms\n",
1389 fis->command, timeout);
1390 rv = -EINTR;
1391 goto exec_ic_exit;
1392 } else if (rv == 0) /* timeout */
1393 dev_err(&dd->pdev->dev,
1394 "Internal command did not complete [%02X] within timeout of %lu ms\n",
1395 fis->command, timeout);
1396 else
1397 dev_err(&dd->pdev->dev,
1398 "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
1399 fis->command, rv, timeout);
1400
1401 if (mtip_check_surprise_removal(dd->pdev) ||
1402 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1403 &dd->dd_flag)) {
1404 dev_err(&dd->pdev->dev,
1405 "Internal command [%02X] wait returned due to SR\n",
1406 fis->command);
1407 rv = -ENXIO;
1408 goto exec_ic_exit;
1409 }
1410 mtip_device_reset(dd); /* recover from timeout issue */
1411 rv = -EAGAIN;
1412 goto exec_ic_exit;
1413 }
1414 } else {
1415 u32 hba_stat, port_stat;
1416
1417 /* Spin for <timeout> checking if command still outstanding */
1418 timeout = jiffies + msecs_to_jiffies(timeout);
1419 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1420 & (1 << MTIP_TAG_INTERNAL))
1421 && time_before(jiffies, timeout)) {
1422 if (mtip_check_surprise_removal(dd->pdev)) {
1423 rv = -ENXIO;
1424 goto exec_ic_exit;
1425 }
1426 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1427 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1428 &dd->dd_flag)) {
1429 rv = -ENXIO;
1430 goto exec_ic_exit;
1431 }
1432 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1433 if (!port_stat)
1434 continue;
1435
1436 if (port_stat & PORT_IRQ_ERR) {
1437 dev_err(&dd->pdev->dev,
1438 "Internal command [%02X] failed\n",
1439 fis->command);
1440 mtip_device_reset(dd);
1441 rv = -EIO;
1442 goto exec_ic_exit;
1443 } else {
1444 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1445 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1446 if (hba_stat)
1447 writel(hba_stat,
1448 dd->mmio + HOST_IRQ_STAT);
1449 }
1450 break;
1451 }
1452 }
1453
1454 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1455 & (1 << MTIP_TAG_INTERNAL)) {
1456 rv = -ENXIO;
1457 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1458 mtip_device_reset(dd);
1459 rv = -EAGAIN;
1460 }
1461 }
1462 exec_ic_exit:
1463 /* Clear the allocated and active bits for the internal command. */
1464 atomic_set(&int_cmd->active, 0);
1465 release_slot(port, MTIP_TAG_INTERNAL);
1466 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1467 /* NCQ paused */
1468 return rv;
1469 }
1470 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1471 wake_up_interruptible(&port->svc_wait);
1472
1473 return rv;
1474 }
1475
1476 /*
1477 * Byte-swap ATA ID strings.
1478 *
1479 * ATA identify data contains strings in byte-swapped 16-bit words.
1480 * They must be swapped (on all architectures) to be usable as C strings.
1481 * This function swaps bytes in-place.
1482 *
1483 * @buf The buffer location of the string
1484 * @len The number of bytes to swap
1485 *
1486 * return value
1487 * None
1488 */
1489 static inline void ata_swap_string(u16 *buf, unsigned int len)
1490 {
1491 int i;
1492 for (i = 0; i < (len/2); i++)
1493 be16_to_cpus(&buf[i]);
1494 }
1495
1496 static void mtip_set_timeout(struct driver_data *dd,
1497 struct host_to_dev_fis *fis,
1498 unsigned int *timeout, u8 erasemode)
1499 {
1500 switch (fis->command) {
1501 case ATA_CMD_DOWNLOAD_MICRO:
1502 *timeout = 120000; /* 2 minutes */
1503 break;
1504 case ATA_CMD_SEC_ERASE_UNIT:
1505 case 0xFC:
1506 if (erasemode)
1507 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1508 else
1509 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1510 break;
1511 case ATA_CMD_STANDBYNOW1:
1512 *timeout = 120000; /* 2 minutes */
1513 break;
1514 case 0xF7:
1515 case 0xFA:
1516 *timeout = 60000; /* 60 seconds */
1517 break;
1518 case ATA_CMD_SMART:
1519 *timeout = 15000; /* 15 seconds */
1520 break;
1521 default:
1522 *timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;
1523 break;
1524 }
1525 }
1526
1527 /*
1528 * Request the device identity information.
1529 *
1530 * If a user space buffer is not specified, i.e. is NULL, the
1531 * identify information is still read from the drive and placed
1532 * into the identify data buffer (@e port->identify) in the
1533 * port data structure.
1534 * When the identify buffer contains valid identify information @e
1535 * port->identify_valid is non-zero.
1536 *
1537 * @port Pointer to the port structure.
1538 * @user_buffer A user space buffer where the identify data should be
1539 * copied.
1540 *
1541 * return value
1542 * 0 Command completed successfully.
1543 * -EFAULT An error occurred while coping data to the user buffer.
1544 * -1 Command failed.
1545 */
1546 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1547 {
1548 int rv = 0;
1549 struct host_to_dev_fis fis;
1550
1551 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1552 return -EFAULT;
1553
1554 /* Build the FIS. */
1555 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1556 fis.type = 0x27;
1557 fis.opts = 1 << 7;
1558 fis.command = ATA_CMD_ID_ATA;
1559
1560 /* Set the identify information as invalid. */
1561 port->identify_valid = 0;
1562
1563 /* Clear the identify information. */
1564 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1565
1566 /* Execute the command. */
1567 if (mtip_exec_internal_command(port,
1568 &fis,
1569 5,
1570 port->identify_dma,
1571 sizeof(u16) * ATA_ID_WORDS,
1572 0,
1573 GFP_KERNEL,
1574 MTIP_INTERNAL_COMMAND_TIMEOUT_MS)
1575 < 0) {
1576 rv = -1;
1577 goto out;
1578 }
1579
1580 /*
1581 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1582 * perform field-sensitive swapping on the string fields.
1583 * See the kernel use of ata_id_string() for proof of this.
1584 */
1585 #ifdef __LITTLE_ENDIAN
1586 ata_swap_string(port->identify + 27, 40); /* model string*/
1587 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1588 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1589 #else
1590 {
1591 int i;
1592 for (i = 0; i < ATA_ID_WORDS; i++)
1593 port->identify[i] = le16_to_cpu(port->identify[i]);
1594 }
1595 #endif
1596
1597 #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
1598 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1599 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1600 port->dd->trim_supp = true;
1601 else
1602 #endif
1603 port->dd->trim_supp = false;
1604
1605 /* Set the identify buffer as valid. */
1606 port->identify_valid = 1;
1607
1608 if (user_buffer) {
1609 if (copy_to_user(
1610 user_buffer,
1611 port->identify,
1612 ATA_ID_WORDS * sizeof(u16))) {
1613 rv = -EFAULT;
1614 goto out;
1615 }
1616 }
1617
1618 out:
1619 return rv;
1620 }
1621
1622 /*
1623 * Issue a standby immediate command to the device.
1624 *
1625 * @port Pointer to the port structure.
1626 *
1627 * return value
1628 * 0 Command was executed successfully.
1629 * -1 An error occurred while executing the command.
1630 */
1631 static int mtip_standby_immediate(struct mtip_port *port)
1632 {
1633 int rv;
1634 struct host_to_dev_fis fis;
1635 unsigned long start;
1636 unsigned int timeout;
1637
1638 /* Build the FIS. */
1639 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1640 fis.type = 0x27;
1641 fis.opts = 1 << 7;
1642 fis.command = ATA_CMD_STANDBYNOW1;
1643
1644 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1645
1646 start = jiffies;
1647 rv = mtip_exec_internal_command(port,
1648 &fis,
1649 5,
1650 0,
1651 0,
1652 0,
1653 GFP_ATOMIC,
1654 timeout);
1655 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1656 jiffies_to_msecs(jiffies - start));
1657 if (rv)
1658 dev_warn(&port->dd->pdev->dev,
1659 "STANDBY IMMEDIATE command failed.\n");
1660
1661 return rv;
1662 }
1663
1664 /*
1665 * Issue a READ LOG EXT command to the device.
1666 *
1667 * @port pointer to the port structure.
1668 * @page page number to fetch
1669 * @buffer pointer to buffer
1670 * @buffer_dma dma address corresponding to @buffer
1671 * @sectors page length to fetch, in sectors
1672 *
1673 * return value
1674 * @rv return value from mtip_exec_internal_command()
1675 */
1676 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1677 dma_addr_t buffer_dma, unsigned int sectors)
1678 {
1679 struct host_to_dev_fis fis;
1680
1681 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1682 fis.type = 0x27;
1683 fis.opts = 1 << 7;
1684 fis.command = ATA_CMD_READ_LOG_EXT;
1685 fis.sect_count = sectors & 0xFF;
1686 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1687 fis.lba_low = page;
1688 fis.lba_mid = 0;
1689 fis.device = ATA_DEVICE_OBS;
1690
1691 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1692
1693 return mtip_exec_internal_command(port,
1694 &fis,
1695 5,
1696 buffer_dma,
1697 sectors * ATA_SECT_SIZE,
1698 0,
1699 GFP_ATOMIC,
1700 MTIP_INTERNAL_COMMAND_TIMEOUT_MS);
1701 }
1702
1703 /*
1704 * Issue a SMART READ DATA command to the device.
1705 *
1706 * @port pointer to the port structure.
1707 * @buffer pointer to buffer
1708 * @buffer_dma dma address corresponding to @buffer
1709 *
1710 * return value
1711 * @rv return value from mtip_exec_internal_command()
1712 */
1713 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1714 dma_addr_t buffer_dma)
1715 {
1716 struct host_to_dev_fis fis;
1717
1718 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1719 fis.type = 0x27;
1720 fis.opts = 1 << 7;
1721 fis.command = ATA_CMD_SMART;
1722 fis.features = 0xD0;
1723 fis.sect_count = 1;
1724 fis.lba_mid = 0x4F;
1725 fis.lba_hi = 0xC2;
1726 fis.device = ATA_DEVICE_OBS;
1727
1728 return mtip_exec_internal_command(port,
1729 &fis,
1730 5,
1731 buffer_dma,
1732 ATA_SECT_SIZE,
1733 0,
1734 GFP_ATOMIC,
1735 15000);
1736 }
1737
1738 /*
1739 * Get the value of a smart attribute
1740 *
1741 * @port pointer to the port structure
1742 * @id attribute number
1743 * @attrib pointer to return attrib information corresponding to @id
1744 *
1745 * return value
1746 * -EINVAL NULL buffer passed or unsupported attribute @id.
1747 * -EPERM Identify data not valid, SMART not supported or not enabled
1748 */
1749 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1750 struct smart_attr *attrib)
1751 {
1752 int rv, i;
1753 struct smart_attr *pattr;
1754
1755 if (!attrib)
1756 return -EINVAL;
1757
1758 if (!port->identify_valid) {
1759 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1760 return -EPERM;
1761 }
1762 if (!(port->identify[82] & 0x1)) {
1763 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1764 return -EPERM;
1765 }
1766 if (!(port->identify[85] & 0x1)) {
1767 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1768 return -EPERM;
1769 }
1770
1771 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1772 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1773 if (rv) {
1774 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1775 return rv;
1776 }
1777
1778 pattr = (struct smart_attr *)(port->smart_buf + 2);
1779 for (i = 0; i < 29; i++, pattr++)
1780 if (pattr->attr_id == id) {
1781 memcpy(attrib, pattr, sizeof(struct smart_attr));
1782 break;
1783 }
1784
1785 if (i == 29) {
1786 dev_warn(&port->dd->pdev->dev,
1787 "Query for invalid SMART attribute ID\n");
1788 rv = -EINVAL;
1789 }
1790
1791 return rv;
1792 }
1793
1794 /*
1795 * Trim unused sectors
1796 *
1797 * @dd pointer to driver_data structure
1798 * @lba starting lba
1799 * @len # of 512b sectors to trim
1800 *
1801 * return value
1802 * -ENOMEM Out of dma memory
1803 * -EINVAL Invalid parameters passed in, trim not supported
1804 * -EIO Error submitting trim request to hw
1805 */
1806 static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1807 unsigned int len)
1808 {
1809 int i, rv = 0;
1810 u64 tlba, tlen, sect_left;
1811 struct mtip_trim_entry *buf;
1812 dma_addr_t dma_addr;
1813 struct host_to_dev_fis fis;
1814
1815 if (!len || dd->trim_supp == false)
1816 return -EINVAL;
1817
1818 /* Trim request too big */
1819 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1820
1821 /* Trim request not aligned on 4k boundary */
1822 WARN_ON(len % 8 != 0);
1823
1824 /* Warn if vu_trim structure is too big */
1825 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1826
1827 /* Allocate a DMA buffer for the trim structure */
1828 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1829 GFP_KERNEL);
1830 if (!buf)
1831 return -ENOMEM;
1832 memset(buf, 0, ATA_SECT_SIZE);
1833
1834 for (i = 0, sect_left = len, tlba = lba;
1835 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1836 i++) {
1837 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1838 MTIP_MAX_TRIM_ENTRY_LEN :
1839 sect_left);
1840 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1841 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1842 tlba += tlen;
1843 sect_left -= tlen;
1844 }
1845 WARN_ON(sect_left != 0);
1846
1847 /* Build the fis */
1848 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1849 fis.type = 0x27;
1850 fis.opts = 1 << 7;
1851 fis.command = 0xfb;
1852 fis.features = 0x60;
1853 fis.sect_count = 1;
1854 fis.device = ATA_DEVICE_OBS;
1855
1856 if (mtip_exec_internal_command(dd->port,
1857 &fis,
1858 5,
1859 dma_addr,
1860 ATA_SECT_SIZE,
1861 0,
1862 GFP_KERNEL,
1863 MTIP_TRIM_TIMEOUT_MS) < 0)
1864 rv = -EIO;
1865
1866 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1867 return rv;
1868 }
1869
1870 /*
1871 * Get the drive capacity.
1872 *
1873 * @dd Pointer to the device data structure.
1874 * @sectors Pointer to the variable that will receive the sector count.
1875 *
1876 * return value
1877 * 1 Capacity was returned successfully.
1878 * 0 The identify information is invalid.
1879 */
1880 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1881 {
1882 struct mtip_port *port = dd->port;
1883 u64 total, raw0, raw1, raw2, raw3;
1884 raw0 = port->identify[100];
1885 raw1 = port->identify[101];
1886 raw2 = port->identify[102];
1887 raw3 = port->identify[103];
1888 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1889 *sectors = total;
1890 return (bool) !!port->identify_valid;
1891 }
1892
1893 /*
1894 * Display the identify command data.
1895 *
1896 * @port Pointer to the port data structure.
1897 *
1898 * return value
1899 * None
1900 */
1901 static void mtip_dump_identify(struct mtip_port *port)
1902 {
1903 sector_t sectors;
1904 unsigned short revid;
1905 char cbuf[42];
1906
1907 if (!port->identify_valid)
1908 return;
1909
1910 strlcpy(cbuf, (char *)(port->identify+10), 21);
1911 dev_info(&port->dd->pdev->dev,
1912 "Serial No.: %s\n", cbuf);
1913
1914 strlcpy(cbuf, (char *)(port->identify+23), 9);
1915 dev_info(&port->dd->pdev->dev,
1916 "Firmware Ver.: %s\n", cbuf);
1917
1918 strlcpy(cbuf, (char *)(port->identify+27), 41);
1919 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1920
1921 if (mtip_hw_get_capacity(port->dd, &sectors))
1922 dev_info(&port->dd->pdev->dev,
1923 "Capacity: %llu sectors (%llu MB)\n",
1924 (u64)sectors,
1925 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1926
1927 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1928 switch (revid & 0xFF) {
1929 case 0x1:
1930 strlcpy(cbuf, "A0", 3);
1931 break;
1932 case 0x3:
1933 strlcpy(cbuf, "A2", 3);
1934 break;
1935 default:
1936 strlcpy(cbuf, "?", 2);
1937 break;
1938 }
1939 dev_info(&port->dd->pdev->dev,
1940 "Card Type: %s\n", cbuf);
1941 }
1942
1943 /*
1944 * Map the commands scatter list into the command table.
1945 *
1946 * @command Pointer to the command.
1947 * @nents Number of scatter list entries.
1948 *
1949 * return value
1950 * None
1951 */
1952 static inline void fill_command_sg(struct driver_data *dd,
1953 struct mtip_cmd *command,
1954 int nents)
1955 {
1956 int n;
1957 unsigned int dma_len;
1958 struct mtip_cmd_sg *command_sg;
1959 struct scatterlist *sg = command->sg;
1960
1961 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1962
1963 for (n = 0; n < nents; n++) {
1964 dma_len = sg_dma_len(sg);
1965 if (dma_len > 0x400000)
1966 dev_err(&dd->pdev->dev,
1967 "DMA segment length truncated\n");
1968 command_sg->info = __force_bit2int
1969 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1970 command_sg->dba = __force_bit2int
1971 cpu_to_le32(sg_dma_address(sg));
1972 command_sg->dba_upper = __force_bit2int
1973 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1974 command_sg++;
1975 sg++;
1976 }
1977 }
1978
1979 /*
1980 * @brief Execute a drive command.
1981 *
1982 * return value 0 The command completed successfully.
1983 * return value -1 An error occurred while executing the command.
1984 */
1985 static int exec_drive_task(struct mtip_port *port, u8 *command)
1986 {
1987 struct host_to_dev_fis fis;
1988 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1989
1990 /* Build the FIS. */
1991 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1992 fis.type = 0x27;
1993 fis.opts = 1 << 7;
1994 fis.command = command[0];
1995 fis.features = command[1];
1996 fis.sect_count = command[2];
1997 fis.sector = command[3];
1998 fis.cyl_low = command[4];
1999 fis.cyl_hi = command[5];
2000 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
2001
2002 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
2003 __func__,
2004 command[0],
2005 command[1],
2006 command[2],
2007 command[3],
2008 command[4],
2009 command[5],
2010 command[6]);
2011
2012 /* Execute the command. */
2013 if (mtip_exec_internal_command(port,
2014 &fis,
2015 5,
2016 0,
2017 0,
2018 0,
2019 GFP_KERNEL,
2020 MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) {
2021 return -1;
2022 }
2023
2024 command[0] = reply->command; /* Status*/
2025 command[1] = reply->features; /* Error*/
2026 command[4] = reply->cyl_low;
2027 command[5] = reply->cyl_hi;
2028
2029 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
2030 __func__,
2031 command[0],
2032 command[1],
2033 command[4],
2034 command[5]);
2035
2036 return 0;
2037 }
2038
2039 /*
2040 * @brief Execute a drive command.
2041 *
2042 * @param port Pointer to the port data structure.
2043 * @param command Pointer to the user specified command parameters.
2044 * @param user_buffer Pointer to the user space buffer where read sector
2045 * data should be copied.
2046 *
2047 * return value 0 The command completed successfully.
2048 * return value -EFAULT An error occurred while copying the completion
2049 * data to the user space buffer.
2050 * return value -1 An error occurred while executing the command.
2051 */
2052 static int exec_drive_command(struct mtip_port *port, u8 *command,
2053 void __user *user_buffer)
2054 {
2055 struct host_to_dev_fis fis;
2056 struct host_to_dev_fis *reply;
2057 u8 *buf = NULL;
2058 dma_addr_t dma_addr = 0;
2059 int rv = 0, xfer_sz = command[3];
2060
2061 if (xfer_sz) {
2062 if (!user_buffer)
2063 return -EFAULT;
2064
2065 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
2066 ATA_SECT_SIZE * xfer_sz,
2067 &dma_addr,
2068 GFP_KERNEL);
2069 if (!buf) {
2070 dev_err(&port->dd->pdev->dev,
2071 "Memory allocation failed (%d bytes)\n",
2072 ATA_SECT_SIZE * xfer_sz);
2073 return -ENOMEM;
2074 }
2075 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
2076 }
2077
2078 /* Build the FIS. */
2079 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2080 fis.type = 0x27;
2081 fis.opts = 1 << 7;
2082 fis.command = command[0];
2083 fis.features = command[2];
2084 fis.sect_count = command[3];
2085 if (fis.command == ATA_CMD_SMART) {
2086 fis.sector = command[1];
2087 fis.cyl_low = 0x4F;
2088 fis.cyl_hi = 0xC2;
2089 }
2090
2091 if (xfer_sz)
2092 reply = (port->rxfis + RX_FIS_PIO_SETUP);
2093 else
2094 reply = (port->rxfis + RX_FIS_D2H_REG);
2095
2096 dbg_printk(MTIP_DRV_NAME
2097 " %s: User Command: cmd %x, sect %x, "
2098 "feat %x, sectcnt %x\n",
2099 __func__,
2100 command[0],
2101 command[1],
2102 command[2],
2103 command[3]);
2104
2105 /* Execute the command. */
2106 if (mtip_exec_internal_command(port,
2107 &fis,
2108 5,
2109 (xfer_sz ? dma_addr : 0),
2110 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
2111 0,
2112 GFP_KERNEL,
2113 MTIP_IOCTL_COMMAND_TIMEOUT_MS)
2114 < 0) {
2115 rv = -EFAULT;
2116 goto exit_drive_command;
2117 }
2118
2119 /* Collect the completion status. */
2120 command[0] = reply->command; /* Status*/
2121 command[1] = reply->features; /* Error*/
2122 command[2] = reply->sect_count;
2123
2124 dbg_printk(MTIP_DRV_NAME
2125 " %s: Completion Status: stat %x, "
2126 "err %x, nsect %x\n",
2127 __func__,
2128 command[0],
2129 command[1],
2130 command[2]);
2131
2132 if (xfer_sz) {
2133 if (copy_to_user(user_buffer,
2134 buf,
2135 ATA_SECT_SIZE * command[3])) {
2136 rv = -EFAULT;
2137 goto exit_drive_command;
2138 }
2139 }
2140 exit_drive_command:
2141 if (buf)
2142 dmam_free_coherent(&port->dd->pdev->dev,
2143 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
2144 return rv;
2145 }
2146
2147 /*
2148 * Indicates whether a command has a single sector payload.
2149 *
2150 * @command passed to the device to perform the certain event.
2151 * @features passed to the device to perform the certain event.
2152 *
2153 * return value
2154 * 1 command is one that always has a single sector payload,
2155 * regardless of the value in the Sector Count field.
2156 * 0 otherwise
2157 *
2158 */
2159 static unsigned int implicit_sector(unsigned char command,
2160 unsigned char features)
2161 {
2162 unsigned int rv = 0;
2163
2164 /* list of commands that have an implicit sector count of 1 */
2165 switch (command) {
2166 case ATA_CMD_SEC_SET_PASS:
2167 case ATA_CMD_SEC_UNLOCK:
2168 case ATA_CMD_SEC_ERASE_PREP:
2169 case ATA_CMD_SEC_ERASE_UNIT:
2170 case ATA_CMD_SEC_FREEZE_LOCK:
2171 case ATA_CMD_SEC_DISABLE_PASS:
2172 case ATA_CMD_PMP_READ:
2173 case ATA_CMD_PMP_WRITE:
2174 rv = 1;
2175 break;
2176 case ATA_CMD_SET_MAX:
2177 if (features == ATA_SET_MAX_UNLOCK)
2178 rv = 1;
2179 break;
2180 case ATA_CMD_SMART:
2181 if ((features == ATA_SMART_READ_VALUES) ||
2182 (features == ATA_SMART_READ_THRESHOLDS))
2183 rv = 1;
2184 break;
2185 case ATA_CMD_CONF_OVERLAY:
2186 if ((features == ATA_DCO_IDENTIFY) ||
2187 (features == ATA_DCO_SET))
2188 rv = 1;
2189 break;
2190 }
2191 return rv;
2192 }
2193
2194 /*
2195 * Executes a taskfile
2196 * See ide_taskfile_ioctl() for derivation
2197 */
2198 static int exec_drive_taskfile(struct driver_data *dd,
2199 void __user *buf,
2200 ide_task_request_t *req_task,
2201 int outtotal)
2202 {
2203 struct host_to_dev_fis fis;
2204 struct host_to_dev_fis *reply;
2205 u8 *outbuf = NULL;
2206 u8 *inbuf = NULL;
2207 dma_addr_t outbuf_dma = 0;
2208 dma_addr_t inbuf_dma = 0;
2209 dma_addr_t dma_buffer = 0;
2210 int err = 0;
2211 unsigned int taskin = 0;
2212 unsigned int taskout = 0;
2213 u8 nsect = 0;
2214 unsigned int timeout;
2215 unsigned int force_single_sector;
2216 unsigned int transfer_size;
2217 unsigned long task_file_data;
2218 int intotal = outtotal + req_task->out_size;
2219 int erasemode = 0;
2220
2221 taskout = req_task->out_size;
2222 taskin = req_task->in_size;
2223 /* 130560 = 512 * 0xFF*/
2224 if (taskin > 130560 || taskout > 130560) {
2225 err = -EINVAL;
2226 goto abort;
2227 }
2228
2229 if (taskout) {
2230 outbuf = kzalloc(taskout, GFP_KERNEL);
2231 if (outbuf == NULL) {
2232 err = -ENOMEM;
2233 goto abort;
2234 }
2235 if (copy_from_user(outbuf, buf + outtotal, taskout)) {
2236 err = -EFAULT;
2237 goto abort;
2238 }
2239 outbuf_dma = pci_map_single(dd->pdev,
2240 outbuf,
2241 taskout,
2242 DMA_TO_DEVICE);
2243 if (outbuf_dma == 0) {
2244 err = -ENOMEM;
2245 goto abort;
2246 }
2247 dma_buffer = outbuf_dma;
2248 }
2249
2250 if (taskin) {
2251 inbuf = kzalloc(taskin, GFP_KERNEL);
2252 if (inbuf == NULL) {
2253 err = -ENOMEM;
2254 goto abort;
2255 }
2256
2257 if (copy_from_user(inbuf, buf + intotal, taskin)) {
2258 err = -EFAULT;
2259 goto abort;
2260 }
2261 inbuf_dma = pci_map_single(dd->pdev,
2262 inbuf,
2263 taskin, DMA_FROM_DEVICE);
2264 if (inbuf_dma == 0) {
2265 err = -ENOMEM;
2266 goto abort;
2267 }
2268 dma_buffer = inbuf_dma;
2269 }
2270
2271 /* only supports PIO and non-data commands from this ioctl. */
2272 switch (req_task->data_phase) {
2273 case TASKFILE_OUT:
2274 nsect = taskout / ATA_SECT_SIZE;
2275 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2276 break;
2277 case TASKFILE_IN:
2278 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2279 break;
2280 case TASKFILE_NO_DATA:
2281 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2282 break;
2283 default:
2284 err = -EINVAL;
2285 goto abort;
2286 }
2287
2288 /* Build the FIS. */
2289 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2290
2291 fis.type = 0x27;
2292 fis.opts = 1 << 7;
2293 fis.command = req_task->io_ports[7];
2294 fis.features = req_task->io_ports[1];
2295 fis.sect_count = req_task->io_ports[2];
2296 fis.lba_low = req_task->io_ports[3];
2297 fis.lba_mid = req_task->io_ports[4];
2298 fis.lba_hi = req_task->io_ports[5];
2299 /* Clear the dev bit*/
2300 fis.device = req_task->io_ports[6] & ~0x10;
2301
2302 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2303 req_task->in_flags.all =
2304 IDE_TASKFILE_STD_IN_FLAGS |
2305 (IDE_HOB_STD_IN_FLAGS << 8);
2306 fis.lba_low_ex = req_task->hob_ports[3];
2307 fis.lba_mid_ex = req_task->hob_ports[4];
2308 fis.lba_hi_ex = req_task->hob_ports[5];
2309 fis.features_ex = req_task->hob_ports[1];
2310 fis.sect_cnt_ex = req_task->hob_ports[2];
2311
2312 } else {
2313 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2314 }
2315
2316 force_single_sector = implicit_sector(fis.command, fis.features);
2317
2318 if ((taskin || taskout) && (!fis.sect_count)) {
2319 if (nsect)
2320 fis.sect_count = nsect;
2321 else {
2322 if (!force_single_sector) {
2323 dev_warn(&dd->pdev->dev,
2324 "data movement but "
2325 "sect_count is 0\n");
2326 err = -EINVAL;
2327 goto abort;
2328 }
2329 }
2330 }
2331
2332 dbg_printk(MTIP_DRV_NAME
2333 " %s: cmd %x, feat %x, nsect %x,"
2334 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2335 " head/dev %x\n",
2336 __func__,
2337 fis.command,
2338 fis.features,
2339 fis.sect_count,
2340 fis.lba_low,
2341 fis.lba_mid,
2342 fis.lba_hi,
2343 fis.device);
2344
2345 /* check for erase mode support during secure erase.*/
2346 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
2347 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
2348 erasemode = 1;
2349 }
2350
2351 mtip_set_timeout(dd, &fis, &timeout, erasemode);
2352
2353 /* Determine the correct transfer size.*/
2354 if (force_single_sector)
2355 transfer_size = ATA_SECT_SIZE;
2356 else
2357 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2358
2359 /* Execute the command.*/
2360 if (mtip_exec_internal_command(dd->port,
2361 &fis,
2362 5,
2363 dma_buffer,
2364 transfer_size,
2365 0,
2366 GFP_KERNEL,
2367 timeout) < 0) {
2368 err = -EIO;
2369 goto abort;
2370 }
2371
2372 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2373
2374 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2375 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2376 req_task->io_ports[7] = reply->control;
2377 } else {
2378 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2379 req_task->io_ports[7] = reply->command;
2380 }
2381
2382 /* reclaim the DMA buffers.*/
2383 if (inbuf_dma)
2384 pci_unmap_single(dd->pdev, inbuf_dma,
2385 taskin, DMA_FROM_DEVICE);
2386 if (outbuf_dma)
2387 pci_unmap_single(dd->pdev, outbuf_dma,
2388 taskout, DMA_TO_DEVICE);
2389 inbuf_dma = 0;
2390 outbuf_dma = 0;
2391
2392 /* return the ATA registers to the caller.*/
2393 req_task->io_ports[1] = reply->features;
2394 req_task->io_ports[2] = reply->sect_count;
2395 req_task->io_ports[3] = reply->lba_low;
2396 req_task->io_ports[4] = reply->lba_mid;
2397 req_task->io_ports[5] = reply->lba_hi;
2398 req_task->io_ports[6] = reply->device;
2399
2400 if (req_task->out_flags.all & 1) {
2401
2402 req_task->hob_ports[3] = reply->lba_low_ex;
2403 req_task->hob_ports[4] = reply->lba_mid_ex;
2404 req_task->hob_ports[5] = reply->lba_hi_ex;
2405 req_task->hob_ports[1] = reply->features_ex;
2406 req_task->hob_ports[2] = reply->sect_cnt_ex;
2407 }
2408 dbg_printk(MTIP_DRV_NAME
2409 " %s: Completion: stat %x,"
2410 "err %x, sect_cnt %x, lbalo %x,"
2411 "lbamid %x, lbahi %x, dev %x\n",
2412 __func__,
2413 req_task->io_ports[7],
2414 req_task->io_ports[1],
2415 req_task->io_ports[2],
2416 req_task->io_ports[3],
2417 req_task->io_ports[4],
2418 req_task->io_ports[5],
2419 req_task->io_ports[6]);
2420
2421 if (taskout) {
2422 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2423 err = -EFAULT;
2424 goto abort;
2425 }
2426 }
2427 if (taskin) {
2428 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2429 err = -EFAULT;
2430 goto abort;
2431 }
2432 }
2433 abort:
2434 if (inbuf_dma)
2435 pci_unmap_single(dd->pdev, inbuf_dma,
2436 taskin, DMA_FROM_DEVICE);
2437 if (outbuf_dma)
2438 pci_unmap_single(dd->pdev, outbuf_dma,
2439 taskout, DMA_TO_DEVICE);
2440 kfree(outbuf);
2441 kfree(inbuf);
2442
2443 return err;
2444 }
2445
2446 /*
2447 * Handle IOCTL calls from the Block Layer.
2448 *
2449 * This function is called by the Block Layer when it receives an IOCTL
2450 * command that it does not understand. If the IOCTL command is not supported
2451 * this function returns -ENOTTY.
2452 *
2453 * @dd Pointer to the driver data structure.
2454 * @cmd IOCTL command passed from the Block Layer.
2455 * @arg IOCTL argument passed from the Block Layer.
2456 *
2457 * return value
2458 * 0 The IOCTL completed successfully.
2459 * -ENOTTY The specified command is not supported.
2460 * -EFAULT An error occurred copying data to a user space buffer.
2461 * -EIO An error occurred while executing the command.
2462 */
2463 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2464 unsigned long arg)
2465 {
2466 switch (cmd) {
2467 case HDIO_GET_IDENTITY:
2468 {
2469 if (copy_to_user((void __user *)arg, dd->port->identify,
2470 sizeof(u16) * ATA_ID_WORDS))
2471 return -EFAULT;
2472 break;
2473 }
2474 case HDIO_DRIVE_CMD:
2475 {
2476 u8 drive_command[4];
2477
2478 /* Copy the user command info to our buffer. */
2479 if (copy_from_user(drive_command,
2480 (void __user *) arg,
2481 sizeof(drive_command)))
2482 return -EFAULT;
2483
2484 /* Execute the drive command. */
2485 if (exec_drive_command(dd->port,
2486 drive_command,
2487 (void __user *) (arg+4)))
2488 return -EIO;
2489
2490 /* Copy the status back to the users buffer. */
2491 if (copy_to_user((void __user *) arg,
2492 drive_command,
2493 sizeof(drive_command)))
2494 return -EFAULT;
2495
2496 break;
2497 }
2498 case HDIO_DRIVE_TASK:
2499 {
2500 u8 drive_command[7];
2501
2502 /* Copy the user command info to our buffer. */
2503 if (copy_from_user(drive_command,
2504 (void __user *) arg,
2505 sizeof(drive_command)))
2506 return -EFAULT;
2507
2508 /* Execute the drive command. */
2509 if (exec_drive_task(dd->port, drive_command))
2510 return -EIO;
2511
2512 /* Copy the status back to the users buffer. */
2513 if (copy_to_user((void __user *) arg,
2514 drive_command,
2515 sizeof(drive_command)))
2516 return -EFAULT;
2517
2518 break;
2519 }
2520 case HDIO_DRIVE_TASKFILE: {
2521 ide_task_request_t req_task;
2522 int ret, outtotal;
2523
2524 if (copy_from_user(&req_task, (void __user *) arg,
2525 sizeof(req_task)))
2526 return -EFAULT;
2527
2528 outtotal = sizeof(req_task);
2529
2530 ret = exec_drive_taskfile(dd, (void __user *) arg,
2531 &req_task, outtotal);
2532
2533 if (copy_to_user((void __user *) arg, &req_task,
2534 sizeof(req_task)))
2535 return -EFAULT;
2536
2537 return ret;
2538 }
2539
2540 default:
2541 return -EINVAL;
2542 }
2543 return 0;
2544 }
2545
2546 /*
2547 * Submit an IO to the hw
2548 *
2549 * This function is called by the block layer to issue an io
2550 * to the device. Upon completion, the callback function will
2551 * be called with the data parameter passed as the callback data.
2552 *
2553 * @dd Pointer to the driver data structure.
2554 * @start First sector to read.
2555 * @nsect Number of sectors to read.
2556 * @nents Number of entries in scatter list for the read command.
2557 * @tag The tag of this read command.
2558 * @callback Pointer to the function that should be called
2559 * when the read completes.
2560 * @data Callback data passed to the callback function
2561 * when the read completes.
2562 * @dir Direction (read or write)
2563 *
2564 * return value
2565 * None
2566 */
2567 static void mtip_hw_submit_io(struct driver_data *dd, sector_t sector,
2568 int nsect, int nents, int tag, void *callback,
2569 void *data, int dir, int unaligned)
2570 {
2571 struct host_to_dev_fis *fis;
2572 struct mtip_port *port = dd->port;
2573 struct mtip_cmd *command = &port->commands[tag];
2574 int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2575 u64 start = sector;
2576
2577 /* Map the scatter list for DMA access */
2578 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2579
2580 command->scatter_ents = nents;
2581
2582 command->unaligned = unaligned;
2583 /*
2584 * The number of retries for this command before it is
2585 * reported as a failure to the upper layers.
2586 */
2587 command->retries = MTIP_MAX_RETRIES;
2588
2589 /* Fill out fis */
2590 fis = command->command;
2591 fis->type = 0x27;
2592 fis->opts = 1 << 7;
2593 fis->command =
2594 (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE);
2595 fis->lba_low = start & 0xFF;
2596 fis->lba_mid = (start >> 8) & 0xFF;
2597 fis->lba_hi = (start >> 16) & 0xFF;
2598 fis->lba_low_ex = (start >> 24) & 0xFF;
2599 fis->lba_mid_ex = (start >> 32) & 0xFF;
2600 fis->lba_hi_ex = (start >> 40) & 0xFF;
2601 fis->device = 1 << 6;
2602 fis->features = nsect & 0xFF;
2603 fis->features_ex = (nsect >> 8) & 0xFF;
2604 fis->sect_count = ((tag << 3) | (tag >> 5));
2605 fis->sect_cnt_ex = 0;
2606 fis->control = 0;
2607 fis->res2 = 0;
2608 fis->res3 = 0;
2609 fill_command_sg(dd, command, nents);
2610
2611 if (unaligned)
2612 fis->device |= 1 << 7;
2613
2614 /* Populate the command header */
2615 command->command_header->opts =
2616 __force_bit2int cpu_to_le32(
2617 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2618 command->command_header->byte_count = 0;
2619
2620 /*
2621 * Set the completion function and data for the command
2622 * within this layer.
2623 */
2624 command->comp_data = dd;
2625 command->comp_func = mtip_async_complete;
2626 command->direction = dma_dir;
2627
2628 /*
2629 * Set the completion function and data for the command passed
2630 * from the upper layer.
2631 */
2632 command->async_data = data;
2633 command->async_callback = callback;
2634
2635 /*
2636 * To prevent this command from being issued
2637 * if an internal command is in progress or error handling is active.
2638 */
2639 if (port->flags & MTIP_PF_PAUSE_IO) {
2640 set_bit(tag, port->cmds_to_issue);
2641 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2642 return;
2643 }
2644
2645 /* Issue the command to the hardware */
2646 mtip_issue_ncq_command(port, tag);
2647
2648 return;
2649 }
2650
2651 /*
2652 * Release a command slot.
2653 *
2654 * @dd Pointer to the driver data structure.
2655 * @tag Slot tag
2656 *
2657 * return value
2658 * None
2659 */
2660 static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag,
2661 int unaligned)
2662 {
2663 struct semaphore *sem = unaligned ? &dd->port->cmd_slot_unal :
2664 &dd->port->cmd_slot;
2665 release_slot(dd->port, tag);
2666 up(sem);
2667 }
2668
2669 /*
2670 * Obtain a command slot and return its associated scatter list.
2671 *
2672 * @dd Pointer to the driver data structure.
2673 * @tag Pointer to an int that will receive the allocated command
2674 * slot tag.
2675 *
2676 * return value
2677 * Pointer to the scatter list for the allocated command slot
2678 * or NULL if no command slots are available.
2679 */
2680 static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
2681 int *tag, int unaligned)
2682 {
2683 struct semaphore *sem = unaligned ? &dd->port->cmd_slot_unal :
2684 &dd->port->cmd_slot;
2685
2686 /*
2687 * It is possible that, even with this semaphore, a thread
2688 * may think that no command slots are available. Therefore, we
2689 * need to make an attempt to get_slot().
2690 */
2691 down(sem);
2692 *tag = get_slot(dd->port);
2693
2694 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2695 up(sem);
2696 return NULL;
2697 }
2698 if (unlikely(*tag < 0)) {
2699 up(sem);
2700 return NULL;
2701 }
2702
2703 return dd->port->commands[*tag].sg;
2704 }
2705
2706 /*
2707 * Sysfs status dump.
2708 *
2709 * @dev Pointer to the device structure, passed by the kernrel.
2710 * @attr Pointer to the device_attribute structure passed by the kernel.
2711 * @buf Pointer to the char buffer that will receive the stats info.
2712 *
2713 * return value
2714 * The size, in bytes, of the data copied into buf.
2715 */
2716 static ssize_t mtip_hw_show_status(struct device *dev,
2717 struct device_attribute *attr,
2718 char *buf)
2719 {
2720 struct driver_data *dd = dev_to_disk(dev)->private_data;
2721 int size = 0;
2722
2723 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2724 size += sprintf(buf, "%s", "thermal_shutdown\n");
2725 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2726 size += sprintf(buf, "%s", "write_protect\n");
2727 else
2728 size += sprintf(buf, "%s", "online\n");
2729
2730 return size;
2731 }
2732
2733 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2734
2735 /* debugsfs entries */
2736
2737 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2738 {
2739 int size = 0;
2740 struct driver_data *dd, *tmp;
2741 unsigned long flags;
2742 char id_buf[42];
2743 u16 status = 0;
2744
2745 spin_lock_irqsave(&dev_lock, flags);
2746 size += sprintf(&buf[size], "Devices Present:\n");
2747 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2748 if (dd->pdev) {
2749 if (dd->port &&
2750 dd->port->identify &&
2751 dd->port->identify_valid) {
2752 strlcpy(id_buf,
2753 (char *) (dd->port->identify + 10), 21);
2754 status = *(dd->port->identify + 141);
2755 } else {
2756 memset(id_buf, 0, 42);
2757 status = 0;
2758 }
2759
2760 if (dd->port &&
2761 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2762 size += sprintf(&buf[size],
2763 " device %s %s (ftl rebuild %d %%)\n",
2764 dev_name(&dd->pdev->dev),
2765 id_buf,
2766 status);
2767 } else {
2768 size += sprintf(&buf[size],
2769 " device %s %s\n",
2770 dev_name(&dd->pdev->dev),
2771 id_buf);
2772 }
2773 }
2774 }
2775
2776 size += sprintf(&buf[size], "Devices Being Removed:\n");
2777 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2778 if (dd->pdev) {
2779 if (dd->port &&
2780 dd->port->identify &&
2781 dd->port->identify_valid) {
2782 strlcpy(id_buf,
2783 (char *) (dd->port->identify+10), 21);
2784 status = *(dd->port->identify + 141);
2785 } else {
2786 memset(id_buf, 0, 42);
2787 status = 0;
2788 }
2789
2790 if (dd->port &&
2791 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2792 size += sprintf(&buf[size],
2793 " device %s %s (ftl rebuild %d %%)\n",
2794 dev_name(&dd->pdev->dev),
2795 id_buf,
2796 status);
2797 } else {
2798 size += sprintf(&buf[size],
2799 " device %s %s\n",
2800 dev_name(&dd->pdev->dev),
2801 id_buf);
2802 }
2803 }
2804 }
2805 spin_unlock_irqrestore(&dev_lock, flags);
2806
2807 return size;
2808 }
2809
2810 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2811 size_t len, loff_t *offset)
2812 {
2813 int size = *offset;
2814 char buf[MTIP_DFS_MAX_BUF_SIZE];
2815
2816 if (!len || *offset)
2817 return 0;
2818
2819 size += show_device_status(NULL, buf);
2820
2821 *offset = size <= len ? size : len;
2822 size = copy_to_user(ubuf, buf, *offset);
2823 if (size)
2824 return -EFAULT;
2825
2826 return *offset;
2827 }
2828
2829 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2830 size_t len, loff_t *offset)
2831 {
2832 struct driver_data *dd = (struct driver_data *)f->private_data;
2833 char buf[MTIP_DFS_MAX_BUF_SIZE];
2834 u32 group_allocated;
2835 int size = *offset;
2836 int n;
2837
2838 if (!len || size)
2839 return 0;
2840
2841 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2842
2843 for (n = dd->slot_groups-1; n >= 0; n--)
2844 size += sprintf(&buf[size], "%08X ",
2845 readl(dd->port->s_active[n]));
2846
2847 size += sprintf(&buf[size], "]\n");
2848 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2849
2850 for (n = dd->slot_groups-1; n >= 0; n--)
2851 size += sprintf(&buf[size], "%08X ",
2852 readl(dd->port->cmd_issue[n]));
2853
2854 size += sprintf(&buf[size], "]\n");
2855 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2856
2857 for (n = dd->slot_groups-1; n >= 0; n--)
2858 size += sprintf(&buf[size], "%08X ",
2859 readl(dd->port->completed[n]));
2860
2861 size += sprintf(&buf[size], "]\n");
2862 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2863 readl(dd->port->mmio + PORT_IRQ_STAT));
2864 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2865 readl(dd->mmio + HOST_IRQ_STAT));
2866 size += sprintf(&buf[size], "\n");
2867
2868 size += sprintf(&buf[size], "L/ Allocated : [ 0x");
2869
2870 for (n = dd->slot_groups-1; n >= 0; n--) {
2871 if (sizeof(long) > sizeof(u32))
2872 group_allocated =
2873 dd->port->allocated[n/2] >> (32*(n&1));
2874 else
2875 group_allocated = dd->port->allocated[n];
2876 size += sprintf(&buf[size], "%08X ", group_allocated);
2877 }
2878 size += sprintf(&buf[size], "]\n");
2879
2880 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2881
2882 for (n = dd->slot_groups-1; n >= 0; n--) {
2883 if (sizeof(long) > sizeof(u32))
2884 group_allocated =
2885 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2886 else
2887 group_allocated = dd->port->cmds_to_issue[n];
2888 size += sprintf(&buf[size], "%08X ", group_allocated);
2889 }
2890 size += sprintf(&buf[size], "]\n");
2891
2892 *offset = size <= len ? size : len;
2893 size = copy_to_user(ubuf, buf, *offset);
2894 if (size)
2895 return -EFAULT;
2896
2897 return *offset;
2898 }
2899
2900 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2901 size_t len, loff_t *offset)
2902 {
2903 struct driver_data *dd = (struct driver_data *)f->private_data;
2904 char buf[MTIP_DFS_MAX_BUF_SIZE];
2905 int size = *offset;
2906
2907 if (!len || size)
2908 return 0;
2909
2910 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2911 dd->port->flags);
2912 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2913 dd->dd_flag);
2914
2915 *offset = size <= len ? size : len;
2916 size = copy_to_user(ubuf, buf, *offset);
2917 if (size)
2918 return -EFAULT;
2919
2920 return *offset;
2921 }
2922
2923 static const struct file_operations mtip_device_status_fops = {
2924 .owner = THIS_MODULE,
2925 .open = simple_open,
2926 .read = mtip_hw_read_device_status,
2927 .llseek = no_llseek,
2928 };
2929
2930 static const struct file_operations mtip_regs_fops = {
2931 .owner = THIS_MODULE,
2932 .open = simple_open,
2933 .read = mtip_hw_read_registers,
2934 .llseek = no_llseek,
2935 };
2936
2937 static const struct file_operations mtip_flags_fops = {
2938 .owner = THIS_MODULE,
2939 .open = simple_open,
2940 .read = mtip_hw_read_flags,
2941 .llseek = no_llseek,
2942 };
2943
2944 /*
2945 * Create the sysfs related attributes.
2946 *
2947 * @dd Pointer to the driver data structure.
2948 * @kobj Pointer to the kobj for the block device.
2949 *
2950 * return value
2951 * 0 Operation completed successfully.
2952 * -EINVAL Invalid parameter.
2953 */
2954 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2955 {
2956 if (!kobj || !dd)
2957 return -EINVAL;
2958
2959 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2960 dev_warn(&dd->pdev->dev,
2961 "Error creating 'status' sysfs entry\n");
2962 return 0;
2963 }
2964
2965 /*
2966 * Remove the sysfs related attributes.
2967 *
2968 * @dd Pointer to the driver data structure.
2969 * @kobj Pointer to the kobj for the block device.
2970 *
2971 * return value
2972 * 0 Operation completed successfully.
2973 * -EINVAL Invalid parameter.
2974 */
2975 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2976 {
2977 if (!kobj || !dd)
2978 return -EINVAL;
2979
2980 sysfs_remove_file(kobj, &dev_attr_status.attr);
2981
2982 return 0;
2983 }
2984
2985 static int mtip_hw_debugfs_init(struct driver_data *dd)
2986 {
2987 if (!dfs_parent)
2988 return -1;
2989
2990 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2991 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2992 dev_warn(&dd->pdev->dev,
2993 "Error creating node %s under debugfs\n",
2994 dd->disk->disk_name);
2995 dd->dfs_node = NULL;
2996 return -1;
2997 }
2998
2999 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
3000 &mtip_flags_fops);
3001 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
3002 &mtip_regs_fops);
3003
3004 return 0;
3005 }
3006
3007 static void mtip_hw_debugfs_exit(struct driver_data *dd)
3008 {
3009 if (dd->dfs_node)
3010 debugfs_remove_recursive(dd->dfs_node);
3011 }
3012
3013
3014 /*
3015 * Perform any init/resume time hardware setup
3016 *
3017 * @dd Pointer to the driver data structure.
3018 *
3019 * return value
3020 * None
3021 */
3022 static inline void hba_setup(struct driver_data *dd)
3023 {
3024 u32 hwdata;
3025 hwdata = readl(dd->mmio + HOST_HSORG);
3026
3027 /* interrupt bug workaround: use only 1 IS bit.*/
3028 writel(hwdata |
3029 HSORG_DISABLE_SLOTGRP_INTR |
3030 HSORG_DISABLE_SLOTGRP_PXIS,
3031 dd->mmio + HOST_HSORG);
3032 }
3033
3034 static int mtip_device_unaligned_constrained(struct driver_data *dd)
3035 {
3036 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
3037 }
3038
3039 /*
3040 * Detect the details of the product, and store anything needed
3041 * into the driver data structure. This includes product type and
3042 * version and number of slot groups.
3043 *
3044 * @dd Pointer to the driver data structure.
3045 *
3046 * return value
3047 * None
3048 */
3049 static void mtip_detect_product(struct driver_data *dd)
3050 {
3051 u32 hwdata;
3052 unsigned int rev, slotgroups;
3053
3054 /*
3055 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
3056 * info register:
3057 * [15:8] hardware/software interface rev#
3058 * [ 3] asic-style interface
3059 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
3060 */
3061 hwdata = readl(dd->mmio + HOST_HSORG);
3062
3063 dd->product_type = MTIP_PRODUCT_UNKNOWN;
3064 dd->slot_groups = 1;
3065
3066 if (hwdata & 0x8) {
3067 dd->product_type = MTIP_PRODUCT_ASICFPGA;
3068 rev = (hwdata & HSORG_HWREV) >> 8;
3069 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
3070 dev_info(&dd->pdev->dev,
3071 "ASIC-FPGA design, HS rev 0x%x, "
3072 "%i slot groups [%i slots]\n",
3073 rev,
3074 slotgroups,
3075 slotgroups * 32);
3076
3077 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
3078 dev_warn(&dd->pdev->dev,
3079 "Warning: driver only supports "
3080 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
3081 slotgroups = MTIP_MAX_SLOT_GROUPS;
3082 }
3083 dd->slot_groups = slotgroups;
3084 return;
3085 }
3086
3087 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
3088 }
3089
3090 /*
3091 * Blocking wait for FTL rebuild to complete
3092 *
3093 * @dd Pointer to the DRIVER_DATA structure.
3094 *
3095 * return value
3096 * 0 FTL rebuild completed successfully
3097 * -EFAULT FTL rebuild error/timeout/interruption
3098 */
3099 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
3100 {
3101 unsigned long timeout, cnt = 0, start;
3102
3103 dev_warn(&dd->pdev->dev,
3104 "FTL rebuild in progress. Polling for completion.\n");
3105
3106 start = jiffies;
3107 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
3108
3109 do {
3110 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3111 &dd->dd_flag)))
3112 return -EFAULT;
3113 if (mtip_check_surprise_removal(dd->pdev))
3114 return -EFAULT;
3115
3116 if (mtip_get_identify(dd->port, NULL) < 0)
3117 return -EFAULT;
3118
3119 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3120 MTIP_FTL_REBUILD_MAGIC) {
3121 ssleep(1);
3122 /* Print message every 3 minutes */
3123 if (cnt++ >= 180) {
3124 dev_warn(&dd->pdev->dev,
3125 "FTL rebuild in progress (%d secs).\n",
3126 jiffies_to_msecs(jiffies - start) / 1000);
3127 cnt = 0;
3128 }
3129 } else {
3130 dev_warn(&dd->pdev->dev,
3131 "FTL rebuild complete (%d secs).\n",
3132 jiffies_to_msecs(jiffies - start) / 1000);
3133 mtip_block_initialize(dd);
3134 return 0;
3135 }
3136 ssleep(10);
3137 } while (time_before(jiffies, timeout));
3138
3139 /* Check for timeout */
3140 dev_err(&dd->pdev->dev,
3141 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
3142 jiffies_to_msecs(jiffies - start) / 1000);
3143 return -EFAULT;
3144 }
3145
3146 /*
3147 * service thread to issue queued commands
3148 *
3149 * @data Pointer to the driver data structure.
3150 *
3151 * return value
3152 * 0
3153 */
3154
3155 static int mtip_service_thread(void *data)
3156 {
3157 struct driver_data *dd = (struct driver_data *)data;
3158 unsigned long slot, slot_start, slot_wrap;
3159 unsigned int num_cmd_slots = dd->slot_groups * 32;
3160 struct mtip_port *port = dd->port;
3161
3162 while (1) {
3163 /*
3164 * the condition is to check neither an internal command is
3165 * is in progress nor error handling is active
3166 */
3167 wait_event_interruptible(port->svc_wait, (port->flags) &&
3168 !(port->flags & MTIP_PF_PAUSE_IO));
3169
3170 if (kthread_should_stop())
3171 break;
3172
3173 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3174 &dd->dd_flag)))
3175 break;
3176
3177 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
3178 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
3179 slot = 1;
3180 /* used to restrict the loop to one iteration */
3181 slot_start = num_cmd_slots;
3182 slot_wrap = 0;
3183 while (1) {
3184 slot = find_next_bit(port->cmds_to_issue,
3185 num_cmd_slots, slot);
3186 if (slot_wrap == 1) {
3187 if ((slot_start >= slot) ||
3188 (slot >= num_cmd_slots))
3189 break;
3190 }
3191 if (unlikely(slot_start == num_cmd_slots))
3192 slot_start = slot;
3193
3194 if (unlikely(slot == num_cmd_slots)) {
3195 slot = 1;
3196 slot_wrap = 1;
3197 continue;
3198 }
3199
3200 /* Issue the command to the hardware */
3201 mtip_issue_ncq_command(port, slot);
3202
3203 clear_bit(slot, port->cmds_to_issue);
3204 }
3205
3206 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
3207 } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
3208 if (!mtip_ftl_rebuild_poll(dd))
3209 set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
3210 &dd->dd_flag);
3211 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
3212 }
3213 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
3214
3215 if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
3216 break;
3217 }
3218 return 0;
3219 }
3220
3221 /*
3222 * Called once for each card.
3223 *
3224 * @dd Pointer to the driver data structure.
3225 *
3226 * return value
3227 * 0 on success, else an error code.
3228 */
3229 static int mtip_hw_init(struct driver_data *dd)
3230 {
3231 int i;
3232 int rv;
3233 unsigned int num_command_slots;
3234 unsigned long timeout, timetaken;
3235 unsigned char *buf;
3236 struct smart_attr attr242;
3237
3238 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3239
3240 mtip_detect_product(dd);
3241 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3242 rv = -EIO;
3243 goto out1;
3244 }
3245 num_command_slots = dd->slot_groups * 32;
3246
3247 hba_setup(dd);
3248
3249 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3250 dd->numa_node);
3251 if (!dd->port) {
3252 dev_err(&dd->pdev->dev,
3253 "Memory allocation: port structure\n");
3254 return -ENOMEM;
3255 }
3256
3257 /* Continue workqueue setup */
3258 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3259 dd->work[i].port = dd->port;
3260
3261 /* Enable unaligned IO constraints for some devices */
3262 if (mtip_device_unaligned_constrained(dd))
3263 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3264 else
3265 dd->unal_qdepth = 0;
3266
3267 /* Counting semaphore to track command slot usage */
3268 sema_init(&dd->port->cmd_slot, num_command_slots - 1 - dd->unal_qdepth);
3269 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
3270
3271 /* Spinlock to prevent concurrent issue */
3272 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3273 spin_lock_init(&dd->port->cmd_issue_lock[i]);
3274
3275 /* Set the port mmio base address. */
3276 dd->port->mmio = dd->mmio + PORT_OFFSET;
3277 dd->port->dd = dd;
3278
3279 /* Allocate memory for the command list. */
3280 dd->port->command_list =
3281 dmam_alloc_coherent(&dd->pdev->dev,
3282 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3283 &dd->port->command_list_dma,
3284 GFP_KERNEL);
3285 if (!dd->port->command_list) {
3286 dev_err(&dd->pdev->dev,
3287 "Memory allocation: command list\n");
3288 rv = -ENOMEM;
3289 goto out1;
3290 }
3291
3292 /* Clear the memory we have allocated. */
3293 memset(dd->port->command_list,
3294 0,
3295 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4));
3296
3297 /* Setup the addresse of the RX FIS. */
3298 dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ;
3299 dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ;
3300
3301 /* Setup the address of the command tables. */
3302 dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ;
3303 dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ;
3304
3305 /* Setup the address of the identify data. */
3306 dd->port->identify = dd->port->command_table +
3307 HW_CMD_TBL_AR_SZ;
3308 dd->port->identify_dma = dd->port->command_tbl_dma +
3309 HW_CMD_TBL_AR_SZ;
3310
3311 /* Setup the address of the sector buffer - for some non-ncq cmds */
3312 dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE;
3313 dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE;
3314
3315 /* Setup the address of the log buf - for read log command */
3316 dd->port->log_buf = (void *)dd->port->sector_buffer + ATA_SECT_SIZE;
3317 dd->port->log_buf_dma = dd->port->sector_buffer_dma + ATA_SECT_SIZE;
3318
3319 /* Setup the address of the smart buf - for smart read data command */
3320 dd->port->smart_buf = (void *)dd->port->log_buf + ATA_SECT_SIZE;
3321 dd->port->smart_buf_dma = dd->port->log_buf_dma + ATA_SECT_SIZE;
3322
3323
3324 /* Point the command headers at the command tables. */
3325 for (i = 0; i < num_command_slots; i++) {
3326 dd->port->commands[i].command_header =
3327 dd->port->command_list +
3328 (sizeof(struct mtip_cmd_hdr) * i);
3329 dd->port->commands[i].command_header_dma =
3330 dd->port->command_list_dma +
3331 (sizeof(struct mtip_cmd_hdr) * i);
3332
3333 dd->port->commands[i].command =
3334 dd->port->command_table + (HW_CMD_TBL_SZ * i);
3335 dd->port->commands[i].command_dma =
3336 dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i);
3337
3338 if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64)
3339 dd->port->commands[i].command_header->ctbau =
3340 __force_bit2int cpu_to_le32(
3341 (dd->port->commands[i].command_dma >> 16) >> 16);
3342 dd->port->commands[i].command_header->ctba =
3343 __force_bit2int cpu_to_le32(
3344 dd->port->commands[i].command_dma & 0xFFFFFFFF);
3345
3346 /*
3347 * If this is not done, a bug is reported by the stock
3348 * FC11 i386. Due to the fact that it has lots of kernel
3349 * debugging enabled.
3350 */
3351 sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG);
3352
3353 /* Mark all commands as currently inactive.*/
3354 atomic_set(&dd->port->commands[i].active, 0);
3355 }
3356
3357 /* Setup the pointers to the extended s_active and CI registers. */
3358 for (i = 0; i < dd->slot_groups; i++) {
3359 dd->port->s_active[i] =
3360 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3361 dd->port->cmd_issue[i] =
3362 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3363 dd->port->completed[i] =
3364 dd->port->mmio + i*0x80 + PORT_SDBV;
3365 }
3366
3367 timetaken = jiffies;
3368 timeout = jiffies + msecs_to_jiffies(30000);
3369 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3370 time_before(jiffies, timeout)) {
3371 mdelay(100);
3372 }
3373 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3374 timetaken = jiffies - timetaken;
3375 dev_warn(&dd->pdev->dev,
3376 "Surprise removal detected at %u ms\n",
3377 jiffies_to_msecs(timetaken));
3378 rv = -ENODEV;
3379 goto out2 ;
3380 }
3381 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3382 timetaken = jiffies - timetaken;
3383 dev_warn(&dd->pdev->dev,
3384 "Removal detected at %u ms\n",
3385 jiffies_to_msecs(timetaken));
3386 rv = -EFAULT;
3387 goto out2;
3388 }
3389
3390 /* Conditionally reset the HBA. */
3391 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3392 if (mtip_hba_reset(dd) < 0) {
3393 dev_err(&dd->pdev->dev,
3394 "Card did not reset within timeout\n");
3395 rv = -EIO;
3396 goto out2;
3397 }
3398 } else {
3399 /* Clear any pending interrupts on the HBA */
3400 writel(readl(dd->mmio + HOST_IRQ_STAT),
3401 dd->mmio + HOST_IRQ_STAT);
3402 }
3403
3404 mtip_init_port(dd->port);
3405 mtip_start_port(dd->port);
3406
3407 /* Setup the ISR and enable interrupts. */
3408 rv = devm_request_irq(&dd->pdev->dev,
3409 dd->pdev->irq,
3410 mtip_irq_handler,
3411 IRQF_SHARED,
3412 dev_driver_string(&dd->pdev->dev),
3413 dd);
3414
3415 if (rv) {
3416 dev_err(&dd->pdev->dev,
3417 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3418 goto out2;
3419 }
3420 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
3421
3422 /* Enable interrupts on the HBA. */
3423 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3424 dd->mmio + HOST_CTL);
3425
3426 init_timer(&dd->port->cmd_timer);
3427 init_waitqueue_head(&dd->port->svc_wait);
3428
3429 dd->port->cmd_timer.data = (unsigned long int) dd->port;
3430 dd->port->cmd_timer.function = mtip_timeout_function;
3431 mod_timer(&dd->port->cmd_timer,
3432 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
3433
3434
3435 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3436 rv = -EFAULT;
3437 goto out3;
3438 }
3439
3440 if (mtip_get_identify(dd->port, NULL) < 0) {
3441 rv = -EFAULT;
3442 goto out3;
3443 }
3444
3445 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3446 MTIP_FTL_REBUILD_MAGIC) {
3447 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3448 return MTIP_FTL_REBUILD_MAGIC;
3449 }
3450 mtip_dump_identify(dd->port);
3451
3452 /* check write protect, over temp and rebuild statuses */
3453 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3454 dd->port->log_buf,
3455 dd->port->log_buf_dma, 1);
3456 if (rv) {
3457 dev_warn(&dd->pdev->dev,
3458 "Error in READ LOG EXT (10h) command\n");
3459 /* non-critical error, don't fail the load */
3460 } else {
3461 buf = (unsigned char *)dd->port->log_buf;
3462 if (buf[259] & 0x1) {
3463 dev_info(&dd->pdev->dev,
3464 "Write protect bit is set.\n");
3465 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3466 }
3467 if (buf[288] == 0xF7) {
3468 dev_info(&dd->pdev->dev,
3469 "Exceeded Tmax, drive in thermal shutdown.\n");
3470 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3471 }
3472 if (buf[288] == 0xBF) {
3473 dev_info(&dd->pdev->dev,
3474 "Drive indicates rebuild has failed.\n");
3475 /* TODO */
3476 }
3477 }
3478
3479 /* get write protect progess */
3480 memset(&attr242, 0, sizeof(struct smart_attr));
3481 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3482 dev_warn(&dd->pdev->dev,
3483 "Unable to check write protect progress\n");
3484 else
3485 dev_info(&dd->pdev->dev,
3486 "Write protect progress: %u%% (%u blocks)\n",
3487 attr242.cur, le32_to_cpu(attr242.data));
3488 return rv;
3489
3490 out3:
3491 del_timer_sync(&dd->port->cmd_timer);
3492
3493 /* Disable interrupts on the HBA. */
3494 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3495 dd->mmio + HOST_CTL);
3496
3497 /* Release the IRQ. */
3498 irq_set_affinity_hint(dd->pdev->irq, NULL);
3499 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3500
3501 out2:
3502 mtip_deinit_port(dd->port);
3503
3504 /* Free the command/command header memory. */
3505 dmam_free_coherent(&dd->pdev->dev,
3506 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3507 dd->port->command_list,
3508 dd->port->command_list_dma);
3509 out1:
3510 /* Free the memory allocated for the for structure. */
3511 kfree(dd->port);
3512
3513 return rv;
3514 }
3515
3516 /*
3517 * Called to deinitialize an interface.
3518 *
3519 * @dd Pointer to the driver data structure.
3520 *
3521 * return value
3522 * 0
3523 */
3524 static int mtip_hw_exit(struct driver_data *dd)
3525 {
3526 /*
3527 * Send standby immediate (E0h) to the drive so that it
3528 * saves its state.
3529 */
3530 if (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
3531
3532 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags))
3533 if (mtip_standby_immediate(dd->port))
3534 dev_warn(&dd->pdev->dev,
3535 "STANDBY IMMEDIATE failed\n");
3536
3537 /* de-initialize the port. */
3538 mtip_deinit_port(dd->port);
3539
3540 /* Disable interrupts on the HBA. */
3541 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3542 dd->mmio + HOST_CTL);
3543 }
3544
3545 del_timer_sync(&dd->port->cmd_timer);
3546
3547 /* Release the IRQ. */
3548 irq_set_affinity_hint(dd->pdev->irq, NULL);
3549 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3550
3551 /* Free the command/command header memory. */
3552 dmam_free_coherent(&dd->pdev->dev,
3553 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3554 dd->port->command_list,
3555 dd->port->command_list_dma);
3556 /* Free the memory allocated for the for structure. */
3557 kfree(dd->port);
3558
3559 return 0;
3560 }
3561
3562 /*
3563 * Issue a Standby Immediate command to the device.
3564 *
3565 * This function is called by the Block Layer just before the
3566 * system powers off during a shutdown.
3567 *
3568 * @dd Pointer to the driver data structure.
3569 *
3570 * return value
3571 * 0
3572 */
3573 static int mtip_hw_shutdown(struct driver_data *dd)
3574 {
3575 /*
3576 * Send standby immediate (E0h) to the drive so that it
3577 * saves its state.
3578 */
3579 mtip_standby_immediate(dd->port);
3580
3581 return 0;
3582 }
3583
3584 /*
3585 * Suspend function
3586 *
3587 * This function is called by the Block Layer just before the
3588 * system hibernates.
3589 *
3590 * @dd Pointer to the driver data structure.
3591 *
3592 * return value
3593 * 0 Suspend was successful
3594 * -EFAULT Suspend was not successful
3595 */
3596 static int mtip_hw_suspend(struct driver_data *dd)
3597 {
3598 /*
3599 * Send standby immediate (E0h) to the drive
3600 * so that it saves its state.
3601 */
3602 if (mtip_standby_immediate(dd->port) != 0) {
3603 dev_err(&dd->pdev->dev,
3604 "Failed standby-immediate command\n");
3605 return -EFAULT;
3606 }
3607
3608 /* Disable interrupts on the HBA.*/
3609 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3610 dd->mmio + HOST_CTL);
3611 mtip_deinit_port(dd->port);
3612
3613 return 0;
3614 }
3615
3616 /*
3617 * Resume function
3618 *
3619 * This function is called by the Block Layer as the
3620 * system resumes.
3621 *
3622 * @dd Pointer to the driver data structure.
3623 *
3624 * return value
3625 * 0 Resume was successful
3626 * -EFAULT Resume was not successful
3627 */
3628 static int mtip_hw_resume(struct driver_data *dd)
3629 {
3630 /* Perform any needed hardware setup steps */
3631 hba_setup(dd);
3632
3633 /* Reset the HBA */
3634 if (mtip_hba_reset(dd) != 0) {
3635 dev_err(&dd->pdev->dev,
3636 "Unable to reset the HBA\n");
3637 return -EFAULT;
3638 }
3639
3640 /*
3641 * Enable the port, DMA engine, and FIS reception specific
3642 * h/w in controller.
3643 */
3644 mtip_init_port(dd->port);
3645 mtip_start_port(dd->port);
3646
3647 /* Enable interrupts on the HBA.*/
3648 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3649 dd->mmio + HOST_CTL);
3650
3651 return 0;
3652 }
3653
3654 /*
3655 * Helper function for reusing disk name
3656 * upon hot insertion.
3657 */
3658 static int rssd_disk_name_format(char *prefix,
3659 int index,
3660 char *buf,
3661 int buflen)
3662 {
3663 const int base = 'z' - 'a' + 1;
3664 char *begin = buf + strlen(prefix);
3665 char *end = buf + buflen;
3666 char *p;
3667 int unit;
3668
3669 p = end - 1;
3670 *p = '\0';
3671 unit = base;
3672 do {
3673 if (p == begin)
3674 return -EINVAL;
3675 *--p = 'a' + (index % unit);
3676 index = (index / unit) - 1;
3677 } while (index >= 0);
3678
3679 memmove(begin, p, end - p);
3680 memcpy(buf, prefix, strlen(prefix));
3681
3682 return 0;
3683 }
3684
3685 /*
3686 * Block layer IOCTL handler.
3687 *
3688 * @dev Pointer to the block_device structure.
3689 * @mode ignored
3690 * @cmd IOCTL command passed from the user application.
3691 * @arg Argument passed from the user application.
3692 *
3693 * return value
3694 * 0 IOCTL completed successfully.
3695 * -ENOTTY IOCTL not supported or invalid driver data
3696 * structure pointer.
3697 */
3698 static int mtip_block_ioctl(struct block_device *dev,
3699 fmode_t mode,
3700 unsigned cmd,
3701 unsigned long arg)
3702 {
3703 struct driver_data *dd = dev->bd_disk->private_data;
3704
3705 if (!capable(CAP_SYS_ADMIN))
3706 return -EACCES;
3707
3708 if (!dd)
3709 return -ENOTTY;
3710
3711 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3712 return -ENOTTY;
3713
3714 switch (cmd) {
3715 case BLKFLSBUF:
3716 return -ENOTTY;
3717 default:
3718 return mtip_hw_ioctl(dd, cmd, arg);
3719 }
3720 }
3721
3722 #ifdef CONFIG_COMPAT
3723 /*
3724 * Block layer compat IOCTL handler.
3725 *
3726 * @dev Pointer to the block_device structure.
3727 * @mode ignored
3728 * @cmd IOCTL command passed from the user application.
3729 * @arg Argument passed from the user application.
3730 *
3731 * return value
3732 * 0 IOCTL completed successfully.
3733 * -ENOTTY IOCTL not supported or invalid driver data
3734 * structure pointer.
3735 */
3736 static int mtip_block_compat_ioctl(struct block_device *dev,
3737 fmode_t mode,
3738 unsigned cmd,
3739 unsigned long arg)
3740 {
3741 struct driver_data *dd = dev->bd_disk->private_data;
3742
3743 if (!capable(CAP_SYS_ADMIN))
3744 return -EACCES;
3745
3746 if (!dd)
3747 return -ENOTTY;
3748
3749 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3750 return -ENOTTY;
3751
3752 switch (cmd) {
3753 case BLKFLSBUF:
3754 return -ENOTTY;
3755 case HDIO_DRIVE_TASKFILE: {
3756 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3757 ide_task_request_t req_task;
3758 int compat_tasksize, outtotal, ret;
3759
3760 compat_tasksize =
3761 sizeof(struct mtip_compat_ide_task_request_s);
3762
3763 compat_req_task =
3764 (struct mtip_compat_ide_task_request_s __user *) arg;
3765
3766 if (copy_from_user(&req_task, (void __user *) arg,
3767 compat_tasksize - (2 * sizeof(compat_long_t))))
3768 return -EFAULT;
3769
3770 if (get_user(req_task.out_size, &compat_req_task->out_size))
3771 return -EFAULT;
3772
3773 if (get_user(req_task.in_size, &compat_req_task->in_size))
3774 return -EFAULT;
3775
3776 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3777
3778 ret = exec_drive_taskfile(dd, (void __user *) arg,
3779 &req_task, outtotal);
3780
3781 if (copy_to_user((void __user *) arg, &req_task,
3782 compat_tasksize -
3783 (2 * sizeof(compat_long_t))))
3784 return -EFAULT;
3785
3786 if (put_user(req_task.out_size, &compat_req_task->out_size))
3787 return -EFAULT;
3788
3789 if (put_user(req_task.in_size, &compat_req_task->in_size))
3790 return -EFAULT;
3791
3792 return ret;
3793 }
3794 default:
3795 return mtip_hw_ioctl(dd, cmd, arg);
3796 }
3797 }
3798 #endif
3799
3800 /*
3801 * Obtain the geometry of the device.
3802 *
3803 * You may think that this function is obsolete, but some applications,
3804 * fdisk for example still used CHS values. This function describes the
3805 * device as having 224 heads and 56 sectors per cylinder. These values are
3806 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3807 * partition is described in terms of a start and end cylinder this means
3808 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3809 * affects performance.
3810 *
3811 * @dev Pointer to the block_device strucutre.
3812 * @geo Pointer to a hd_geometry structure.
3813 *
3814 * return value
3815 * 0 Operation completed successfully.
3816 * -ENOTTY An error occurred while reading the drive capacity.
3817 */
3818 static int mtip_block_getgeo(struct block_device *dev,
3819 struct hd_geometry *geo)
3820 {
3821 struct driver_data *dd = dev->bd_disk->private_data;
3822 sector_t capacity;
3823
3824 if (!dd)
3825 return -ENOTTY;
3826
3827 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3828 dev_warn(&dd->pdev->dev,
3829 "Could not get drive capacity.\n");
3830 return -ENOTTY;
3831 }
3832
3833 geo->heads = 224;
3834 geo->sectors = 56;
3835 sector_div(capacity, (geo->heads * geo->sectors));
3836 geo->cylinders = capacity;
3837 return 0;
3838 }
3839
3840 /*
3841 * Block device operation function.
3842 *
3843 * This structure contains pointers to the functions required by the block
3844 * layer.
3845 */
3846 static const struct block_device_operations mtip_block_ops = {
3847 .ioctl = mtip_block_ioctl,
3848 #ifdef CONFIG_COMPAT
3849 .compat_ioctl = mtip_block_compat_ioctl,
3850 #endif
3851 .getgeo = mtip_block_getgeo,
3852 .owner = THIS_MODULE
3853 };
3854
3855 /*
3856 * Block layer make request function.
3857 *
3858 * This function is called by the kernel to process a BIO for
3859 * the P320 device.
3860 *
3861 * @queue Pointer to the request queue. Unused other than to obtain
3862 * the driver data structure.
3863 * @bio Pointer to the BIO.
3864 *
3865 */
3866 static void mtip_make_request(struct request_queue *queue, struct bio *bio)
3867 {
3868 struct driver_data *dd = queue->queuedata;
3869 struct scatterlist *sg;
3870 struct bio_vec *bvec;
3871 int i, nents = 0;
3872 int tag = 0, unaligned = 0;
3873
3874 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3875 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3876 &dd->dd_flag))) {
3877 bio_endio(bio, -ENXIO);
3878 return;
3879 }
3880 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3881 bio_endio(bio, -ENODATA);
3882 return;
3883 }
3884 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3885 &dd->dd_flag) &&
3886 bio_data_dir(bio))) {
3887 bio_endio(bio, -ENODATA);
3888 return;
3889 }
3890 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))) {
3891 bio_endio(bio, -ENODATA);
3892 return;
3893 }
3894 }
3895
3896 if (unlikely(bio->bi_rw & REQ_DISCARD)) {
3897 bio_endio(bio, mtip_send_trim(dd, bio->bi_sector,
3898 bio_sectors(bio)));
3899 return;
3900 }
3901
3902 if (unlikely(!bio_has_data(bio))) {
3903 blk_queue_flush(queue, 0);
3904 bio_endio(bio, 0);
3905 return;
3906 }
3907
3908 if (bio_data_dir(bio) == WRITE && bio_sectors(bio) <= 64 &&
3909 dd->unal_qdepth) {
3910 if (bio->bi_sector % 8 != 0) /* Unaligned on 4k boundaries */
3911 unaligned = 1;
3912 else if (bio_sectors(bio) % 8 != 0) /* Aligned but not 4k/8k */
3913 unaligned = 1;
3914 }
3915
3916 sg = mtip_hw_get_scatterlist(dd, &tag, unaligned);
3917 if (likely(sg != NULL)) {
3918 blk_queue_bounce(queue, &bio);
3919
3920 if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) {
3921 dev_warn(&dd->pdev->dev,
3922 "Maximum number of SGL entries exceeded\n");
3923 bio_io_error(bio);
3924 mtip_hw_release_scatterlist(dd, tag, unaligned);
3925 return;
3926 }
3927
3928 /* Create the scatter list for this bio. */
3929 bio_for_each_segment(bvec, bio, i) {
3930 sg_set_page(&sg[nents],
3931 bvec->bv_page,
3932 bvec->bv_len,
3933 bvec->bv_offset);
3934 nents++;
3935 }
3936
3937 /* Issue the read/write. */
3938 mtip_hw_submit_io(dd,
3939 bio->bi_sector,
3940 bio_sectors(bio),
3941 nents,
3942 tag,
3943 bio_endio,
3944 bio,
3945 bio_data_dir(bio),
3946 unaligned);
3947 } else
3948 bio_io_error(bio);
3949 }
3950
3951 /*
3952 * Block layer initialization function.
3953 *
3954 * This function is called once by the PCI layer for each P320
3955 * device that is connected to the system.
3956 *
3957 * @dd Pointer to the driver data structure.
3958 *
3959 * return value
3960 * 0 on success else an error code.
3961 */
3962 static int mtip_block_initialize(struct driver_data *dd)
3963 {
3964 int rv = 0, wait_for_rebuild = 0;
3965 sector_t capacity;
3966 unsigned int index = 0;
3967 struct kobject *kobj;
3968 unsigned char thd_name[16];
3969
3970 if (dd->disk)
3971 goto skip_create_disk; /* hw init done, before rebuild */
3972
3973 /* Initialize the protocol layer. */
3974 wait_for_rebuild = mtip_hw_init(dd);
3975 if (wait_for_rebuild < 0) {
3976 dev_err(&dd->pdev->dev,
3977 "Protocol layer initialization failed\n");
3978 rv = -EINVAL;
3979 goto protocol_init_error;
3980 }
3981
3982 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3983 if (dd->disk == NULL) {
3984 dev_err(&dd->pdev->dev,
3985 "Unable to allocate gendisk structure\n");
3986 rv = -EINVAL;
3987 goto alloc_disk_error;
3988 }
3989
3990 /* Generate the disk name, implemented same as in sd.c */
3991 do {
3992 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3993 goto ida_get_error;
3994
3995 spin_lock(&rssd_index_lock);
3996 rv = ida_get_new(&rssd_index_ida, &index);
3997 spin_unlock(&rssd_index_lock);
3998 } while (rv == -EAGAIN);
3999
4000 if (rv)
4001 goto ida_get_error;
4002
4003 rv = rssd_disk_name_format("rssd",
4004 index,
4005 dd->disk->disk_name,
4006 DISK_NAME_LEN);
4007 if (rv)
4008 goto disk_index_error;
4009
4010 dd->disk->driverfs_dev = &dd->pdev->dev;
4011 dd->disk->major = dd->major;
4012 dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS;
4013 dd->disk->fops = &mtip_block_ops;
4014 dd->disk->private_data = dd;
4015 dd->index = index;
4016
4017 /*
4018 * if rebuild pending, start the service thread, and delay the block
4019 * queue creation and add_disk()
4020 */
4021 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4022 goto start_service_thread;
4023
4024 skip_create_disk:
4025 /* Allocate the request queue. */
4026 dd->queue = blk_alloc_queue_node(GFP_KERNEL, dd->numa_node);
4027 if (dd->queue == NULL) {
4028 dev_err(&dd->pdev->dev,
4029 "Unable to allocate request queue\n");
4030 rv = -ENOMEM;
4031 goto block_queue_alloc_init_error;
4032 }
4033
4034 /* Attach our request function to the request queue. */
4035 blk_queue_make_request(dd->queue, mtip_make_request);
4036
4037 dd->disk->queue = dd->queue;
4038 dd->queue->queuedata = dd;
4039
4040 /* Set device limits. */
4041 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
4042 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
4043 blk_queue_physical_block_size(dd->queue, 4096);
4044 blk_queue_max_hw_sectors(dd->queue, 0xffff);
4045 blk_queue_max_segment_size(dd->queue, 0x400000);
4046 blk_queue_io_min(dd->queue, 4096);
4047 blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask);
4048
4049 /*
4050 * write back cache is not supported in the device. FUA depends on
4051 * write back cache support, hence setting flush support to zero.
4052 */
4053 blk_queue_flush(dd->queue, 0);
4054
4055 /* Signal trim support */
4056 if (dd->trim_supp == true) {
4057 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
4058 dd->queue->limits.discard_granularity = 4096;
4059 blk_queue_max_discard_sectors(dd->queue,
4060 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
4061 dd->queue->limits.discard_zeroes_data = 0;
4062 }
4063
4064 /* Set the capacity of the device in 512 byte sectors. */
4065 if (!(mtip_hw_get_capacity(dd, &capacity))) {
4066 dev_warn(&dd->pdev->dev,
4067 "Could not read drive capacity\n");
4068 rv = -EIO;
4069 goto read_capacity_error;
4070 }
4071 set_capacity(dd->disk, capacity);
4072
4073 /* Enable the block device and add it to /dev */
4074 add_disk(dd->disk);
4075
4076 /*
4077 * Now that the disk is active, initialize any sysfs attributes
4078 * managed by the protocol layer.
4079 */
4080 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4081 if (kobj) {
4082 mtip_hw_sysfs_init(dd, kobj);
4083 kobject_put(kobj);
4084 }
4085 mtip_hw_debugfs_init(dd);
4086
4087 if (dd->mtip_svc_handler) {
4088 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4089 return rv; /* service thread created for handling rebuild */
4090 }
4091
4092 start_service_thread:
4093 sprintf(thd_name, "mtip_svc_thd_%02d", index);
4094 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
4095 dd, dd->numa_node, "%s",
4096 thd_name);
4097
4098 if (IS_ERR(dd->mtip_svc_handler)) {
4099 dev_err(&dd->pdev->dev, "service thread failed to start\n");
4100 dd->mtip_svc_handler = NULL;
4101 rv = -EFAULT;
4102 goto kthread_run_error;
4103 }
4104 wake_up_process(dd->mtip_svc_handler);
4105 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4106 rv = wait_for_rebuild;
4107
4108 return rv;
4109
4110 kthread_run_error:
4111 mtip_hw_debugfs_exit(dd);
4112
4113 /* Delete our gendisk. This also removes the device from /dev */
4114 del_gendisk(dd->disk);
4115
4116 read_capacity_error:
4117 blk_cleanup_queue(dd->queue);
4118
4119 block_queue_alloc_init_error:
4120 disk_index_error:
4121 spin_lock(&rssd_index_lock);
4122 ida_remove(&rssd_index_ida, index);
4123 spin_unlock(&rssd_index_lock);
4124
4125 ida_get_error:
4126 put_disk(dd->disk);
4127
4128 alloc_disk_error:
4129 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
4130
4131 protocol_init_error:
4132 return rv;
4133 }
4134
4135 /*
4136 * Block layer deinitialization function.
4137 *
4138 * Called by the PCI layer as each P320 device is removed.
4139 *
4140 * @dd Pointer to the driver data structure.
4141 *
4142 * return value
4143 * 0
4144 */
4145 static int mtip_block_remove(struct driver_data *dd)
4146 {
4147 struct kobject *kobj;
4148
4149 if (dd->mtip_svc_handler) {
4150 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4151 wake_up_interruptible(&dd->port->svc_wait);
4152 kthread_stop(dd->mtip_svc_handler);
4153 }
4154
4155 /* Clean up the sysfs attributes, if created */
4156 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
4157 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4158 if (kobj) {
4159 mtip_hw_sysfs_exit(dd, kobj);
4160 kobject_put(kobj);
4161 }
4162 }
4163 mtip_hw_debugfs_exit(dd);
4164
4165 /*
4166 * Delete our gendisk structure. This also removes the device
4167 * from /dev
4168 */
4169 if (dd->disk) {
4170 if (dd->disk->queue)
4171 del_gendisk(dd->disk);
4172 else
4173 put_disk(dd->disk);
4174 }
4175
4176 spin_lock(&rssd_index_lock);
4177 ida_remove(&rssd_index_ida, dd->index);
4178 spin_unlock(&rssd_index_lock);
4179
4180 blk_cleanup_queue(dd->queue);
4181 dd->disk = NULL;
4182 dd->queue = NULL;
4183
4184 /* De-initialize the protocol layer. */
4185 mtip_hw_exit(dd);
4186
4187 return 0;
4188 }
4189
4190 /*
4191 * Function called by the PCI layer when just before the
4192 * machine shuts down.
4193 *
4194 * If a protocol layer shutdown function is present it will be called
4195 * by this function.
4196 *
4197 * @dd Pointer to the driver data structure.
4198 *
4199 * return value
4200 * 0
4201 */
4202 static int mtip_block_shutdown(struct driver_data *dd)
4203 {
4204 /* Delete our gendisk structure, and cleanup the blk queue. */
4205 if (dd->disk) {
4206 dev_info(&dd->pdev->dev,
4207 "Shutting down %s ...\n", dd->disk->disk_name);
4208
4209 if (dd->disk->queue) {
4210 del_gendisk(dd->disk);
4211 blk_cleanup_queue(dd->queue);
4212 } else
4213 put_disk(dd->disk);
4214 dd->disk = NULL;
4215 dd->queue = NULL;
4216 }
4217
4218 spin_lock(&rssd_index_lock);
4219 ida_remove(&rssd_index_ida, dd->index);
4220 spin_unlock(&rssd_index_lock);
4221
4222 mtip_hw_shutdown(dd);
4223 return 0;
4224 }
4225
4226 static int mtip_block_suspend(struct driver_data *dd)
4227 {
4228 dev_info(&dd->pdev->dev,
4229 "Suspending %s ...\n", dd->disk->disk_name);
4230 mtip_hw_suspend(dd);
4231 return 0;
4232 }
4233
4234 static int mtip_block_resume(struct driver_data *dd)
4235 {
4236 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4237 dd->disk->disk_name);
4238 mtip_hw_resume(dd);
4239 return 0;
4240 }
4241
4242 static void drop_cpu(int cpu)
4243 {
4244 cpu_use[cpu]--;
4245 }
4246
4247 static int get_least_used_cpu_on_node(int node)
4248 {
4249 int cpu, least_used_cpu, least_cnt;
4250 const struct cpumask *node_mask;
4251
4252 node_mask = cpumask_of_node(node);
4253 least_used_cpu = cpumask_first(node_mask);
4254 least_cnt = cpu_use[least_used_cpu];
4255 cpu = least_used_cpu;
4256
4257 for_each_cpu(cpu, node_mask) {
4258 if (cpu_use[cpu] < least_cnt) {
4259 least_used_cpu = cpu;
4260 least_cnt = cpu_use[cpu];
4261 }
4262 }
4263 cpu_use[least_used_cpu]++;
4264 return least_used_cpu;
4265 }
4266
4267 /* Helper for selecting a node in round robin mode */
4268 static inline int mtip_get_next_rr_node(void)
4269 {
4270 static int next_node = -1;
4271
4272 if (next_node == -1) {
4273 next_node = first_online_node;
4274 return next_node;
4275 }
4276
4277 next_node = next_online_node(next_node);
4278 if (next_node == MAX_NUMNODES)
4279 next_node = first_online_node;
4280 return next_node;
4281 }
4282
4283 static DEFINE_HANDLER(0);
4284 static DEFINE_HANDLER(1);
4285 static DEFINE_HANDLER(2);
4286 static DEFINE_HANDLER(3);
4287 static DEFINE_HANDLER(4);
4288 static DEFINE_HANDLER(5);
4289 static DEFINE_HANDLER(6);
4290 static DEFINE_HANDLER(7);
4291
4292 static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4293 {
4294 int pos;
4295 unsigned short pcie_dev_ctrl;
4296
4297 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4298 if (pos) {
4299 pci_read_config_word(pdev,
4300 pos + PCI_EXP_DEVCTL,
4301 &pcie_dev_ctrl);
4302 if (pcie_dev_ctrl & (1 << 11) ||
4303 pcie_dev_ctrl & (1 << 4)) {
4304 dev_info(&dd->pdev->dev,
4305 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4306 pdev->vendor, pdev->device);
4307 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4308 PCI_EXP_DEVCTL_RELAX_EN);
4309 pci_write_config_word(pdev,
4310 pos + PCI_EXP_DEVCTL,
4311 pcie_dev_ctrl);
4312 }
4313 }
4314 }
4315
4316 static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4317 {
4318 /*
4319 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4320 * device with device id 0x5aXX
4321 */
4322 if (pdev->bus && pdev->bus->self) {
4323 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4324 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4325 mtip_disable_link_opts(dd, pdev->bus->self);
4326 } else {
4327 /* Check further up the topology */
4328 struct pci_dev *parent_dev = pdev->bus->self;
4329 if (parent_dev->bus &&
4330 parent_dev->bus->parent &&
4331 parent_dev->bus->parent->self &&
4332 parent_dev->bus->parent->self->vendor ==
4333 PCI_VENDOR_ID_ATI &&
4334 (parent_dev->bus->parent->self->device &
4335 0xff00) == 0x5a00) {
4336 mtip_disable_link_opts(dd,
4337 parent_dev->bus->parent->self);
4338 }
4339 }
4340 }
4341 }
4342
4343 /*
4344 * Called for each supported PCI device detected.
4345 *
4346 * This function allocates the private data structure, enables the
4347 * PCI device and then calls the block layer initialization function.
4348 *
4349 * return value
4350 * 0 on success else an error code.
4351 */
4352 static int mtip_pci_probe(struct pci_dev *pdev,
4353 const struct pci_device_id *ent)
4354 {
4355 int rv = 0;
4356 struct driver_data *dd = NULL;
4357 char cpu_list[256];
4358 const struct cpumask *node_mask;
4359 int cpu, i = 0, j = 0;
4360 int my_node = NUMA_NO_NODE;
4361 unsigned long flags;
4362
4363 /* Allocate memory for this devices private data. */
4364 my_node = pcibus_to_node(pdev->bus);
4365 if (my_node != NUMA_NO_NODE) {
4366 if (!node_online(my_node))
4367 my_node = mtip_get_next_rr_node();
4368 } else {
4369 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4370 my_node = mtip_get_next_rr_node();
4371 }
4372 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4373 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4374 cpu_to_node(smp_processor_id()), smp_processor_id());
4375
4376 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4377 if (dd == NULL) {
4378 dev_err(&pdev->dev,
4379 "Unable to allocate memory for driver data\n");
4380 return -ENOMEM;
4381 }
4382
4383 /* Attach the private data to this PCI device. */
4384 pci_set_drvdata(pdev, dd);
4385
4386 rv = pcim_enable_device(pdev);
4387 if (rv < 0) {
4388 dev_err(&pdev->dev, "Unable to enable device\n");
4389 goto iomap_err;
4390 }
4391
4392 /* Map BAR5 to memory. */
4393 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4394 if (rv < 0) {
4395 dev_err(&pdev->dev, "Unable to map regions\n");
4396 goto iomap_err;
4397 }
4398
4399 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4400 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4401
4402 if (rv) {
4403 rv = pci_set_consistent_dma_mask(pdev,
4404 DMA_BIT_MASK(32));
4405 if (rv) {
4406 dev_warn(&pdev->dev,
4407 "64-bit DMA enable failed\n");
4408 goto setmask_err;
4409 }
4410 }
4411 }
4412
4413 /* Copy the info we may need later into the private data structure. */
4414 dd->major = mtip_major;
4415 dd->instance = instance;
4416 dd->pdev = pdev;
4417 dd->numa_node = my_node;
4418
4419 INIT_LIST_HEAD(&dd->online_list);
4420 INIT_LIST_HEAD(&dd->remove_list);
4421
4422 memset(dd->workq_name, 0, 32);
4423 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4424
4425 dd->isr_workq = create_workqueue(dd->workq_name);
4426 if (!dd->isr_workq) {
4427 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4428 rv = -ENOMEM;
4429 goto block_initialize_err;
4430 }
4431
4432 memset(cpu_list, 0, sizeof(cpu_list));
4433
4434 node_mask = cpumask_of_node(dd->numa_node);
4435 if (!cpumask_empty(node_mask)) {
4436 for_each_cpu(cpu, node_mask)
4437 {
4438 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4439 j = strlen(cpu_list);
4440 }
4441
4442 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4443 dd->numa_node,
4444 topology_physical_package_id(cpumask_first(node_mask)),
4445 nr_cpus_node(dd->numa_node),
4446 cpu_list);
4447 } else
4448 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4449
4450 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4451 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4452 cpu_to_node(dd->isr_binding), dd->isr_binding);
4453
4454 /* first worker context always runs in ISR */
4455 dd->work[0].cpu_binding = dd->isr_binding;
4456 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4457 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4458 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4459 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4460 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4461 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4462 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4463
4464 /* Log the bindings */
4465 for_each_present_cpu(cpu) {
4466 memset(cpu_list, 0, sizeof(cpu_list));
4467 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4468 if (dd->work[i].cpu_binding == cpu) {
4469 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4470 j = strlen(cpu_list);
4471 }
4472 }
4473 if (j)
4474 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4475 }
4476
4477 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4478 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4479 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4480 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4481 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4482 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4483 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4484 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4485
4486 pci_set_master(pdev);
4487 rv = pci_enable_msi(pdev);
4488 if (rv) {
4489 dev_warn(&pdev->dev,
4490 "Unable to enable MSI interrupt.\n");
4491 goto block_initialize_err;
4492 }
4493
4494 mtip_fix_ero_nosnoop(dd, pdev);
4495
4496 /* Initialize the block layer. */
4497 rv = mtip_block_initialize(dd);
4498 if (rv < 0) {
4499 dev_err(&pdev->dev,
4500 "Unable to initialize block layer\n");
4501 goto block_initialize_err;
4502 }
4503
4504 /*
4505 * Increment the instance count so that each device has a unique
4506 * instance number.
4507 */
4508 instance++;
4509 if (rv != MTIP_FTL_REBUILD_MAGIC)
4510 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4511 else
4512 rv = 0; /* device in rebuild state, return 0 from probe */
4513
4514 /* Add to online list even if in ftl rebuild */
4515 spin_lock_irqsave(&dev_lock, flags);
4516 list_add(&dd->online_list, &online_list);
4517 spin_unlock_irqrestore(&dev_lock, flags);
4518
4519 goto done;
4520
4521 block_initialize_err:
4522 pci_disable_msi(pdev);
4523 if (dd->isr_workq) {
4524 flush_workqueue(dd->isr_workq);
4525 destroy_workqueue(dd->isr_workq);
4526 drop_cpu(dd->work[0].cpu_binding);
4527 drop_cpu(dd->work[1].cpu_binding);
4528 drop_cpu(dd->work[2].cpu_binding);
4529 }
4530 setmask_err:
4531 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4532
4533 iomap_err:
4534 kfree(dd);
4535 pci_set_drvdata(pdev, NULL);
4536 return rv;
4537 done:
4538 return rv;
4539 }
4540
4541 /*
4542 * Called for each probed device when the device is removed or the
4543 * driver is unloaded.
4544 *
4545 * return value
4546 * None
4547 */
4548 static void mtip_pci_remove(struct pci_dev *pdev)
4549 {
4550 struct driver_data *dd = pci_get_drvdata(pdev);
4551 int counter = 0;
4552 unsigned long flags;
4553
4554 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4555
4556 spin_lock_irqsave(&dev_lock, flags);
4557 list_del_init(&dd->online_list);
4558 list_add(&dd->remove_list, &removing_list);
4559 spin_unlock_irqrestore(&dev_lock, flags);
4560
4561 if (mtip_check_surprise_removal(pdev)) {
4562 while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
4563 counter++;
4564 msleep(20);
4565 if (counter == 10) {
4566 /* Cleanup the outstanding commands */
4567 mtip_command_cleanup(dd);
4568 break;
4569 }
4570 }
4571 }
4572
4573 /* Clean up the block layer. */
4574 mtip_block_remove(dd);
4575
4576 if (dd->isr_workq) {
4577 flush_workqueue(dd->isr_workq);
4578 destroy_workqueue(dd->isr_workq);
4579 drop_cpu(dd->work[0].cpu_binding);
4580 drop_cpu(dd->work[1].cpu_binding);
4581 drop_cpu(dd->work[2].cpu_binding);
4582 }
4583
4584 pci_disable_msi(pdev);
4585
4586 spin_lock_irqsave(&dev_lock, flags);
4587 list_del_init(&dd->remove_list);
4588 spin_unlock_irqrestore(&dev_lock, flags);
4589
4590 kfree(dd);
4591 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4592 }
4593
4594 /*
4595 * Called for each probed device when the device is suspended.
4596 *
4597 * return value
4598 * 0 Success
4599 * <0 Error
4600 */
4601 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4602 {
4603 int rv = 0;
4604 struct driver_data *dd = pci_get_drvdata(pdev);
4605
4606 if (!dd) {
4607 dev_err(&pdev->dev,
4608 "Driver private datastructure is NULL\n");
4609 return -EFAULT;
4610 }
4611
4612 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4613
4614 /* Disable ports & interrupts then send standby immediate */
4615 rv = mtip_block_suspend(dd);
4616 if (rv < 0) {
4617 dev_err(&pdev->dev,
4618 "Failed to suspend controller\n");
4619 return rv;
4620 }
4621
4622 /*
4623 * Save the pci config space to pdev structure &
4624 * disable the device
4625 */
4626 pci_save_state(pdev);
4627 pci_disable_device(pdev);
4628
4629 /* Move to Low power state*/
4630 pci_set_power_state(pdev, PCI_D3hot);
4631
4632 return rv;
4633 }
4634
4635 /*
4636 * Called for each probed device when the device is resumed.
4637 *
4638 * return value
4639 * 0 Success
4640 * <0 Error
4641 */
4642 static int mtip_pci_resume(struct pci_dev *pdev)
4643 {
4644 int rv = 0;
4645 struct driver_data *dd;
4646
4647 dd = pci_get_drvdata(pdev);
4648 if (!dd) {
4649 dev_err(&pdev->dev,
4650 "Driver private datastructure is NULL\n");
4651 return -EFAULT;
4652 }
4653
4654 /* Move the device to active State */
4655 pci_set_power_state(pdev, PCI_D0);
4656
4657 /* Restore PCI configuration space */
4658 pci_restore_state(pdev);
4659
4660 /* Enable the PCI device*/
4661 rv = pcim_enable_device(pdev);
4662 if (rv < 0) {
4663 dev_err(&pdev->dev,
4664 "Failed to enable card during resume\n");
4665 goto err;
4666 }
4667 pci_set_master(pdev);
4668
4669 /*
4670 * Calls hbaReset, initPort, & startPort function
4671 * then enables interrupts
4672 */
4673 rv = mtip_block_resume(dd);
4674 if (rv < 0)
4675 dev_err(&pdev->dev, "Unable to resume\n");
4676
4677 err:
4678 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4679
4680 return rv;
4681 }
4682
4683 /*
4684 * Shutdown routine
4685 *
4686 * return value
4687 * None
4688 */
4689 static void mtip_pci_shutdown(struct pci_dev *pdev)
4690 {
4691 struct driver_data *dd = pci_get_drvdata(pdev);
4692 if (dd)
4693 mtip_block_shutdown(dd);
4694 }
4695
4696 /* Table of device ids supported by this driver. */
4697 static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = {
4698 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4699 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4700 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4701 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4702 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4703 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4704 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4705 { 0 }
4706 };
4707
4708 /* Structure that describes the PCI driver functions. */
4709 static struct pci_driver mtip_pci_driver = {
4710 .name = MTIP_DRV_NAME,
4711 .id_table = mtip_pci_tbl,
4712 .probe = mtip_pci_probe,
4713 .remove = mtip_pci_remove,
4714 .suspend = mtip_pci_suspend,
4715 .resume = mtip_pci_resume,
4716 .shutdown = mtip_pci_shutdown,
4717 };
4718
4719 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4720
4721 /*
4722 * Module initialization function.
4723 *
4724 * Called once when the module is loaded. This function allocates a major
4725 * block device number to the Cyclone devices and registers the PCI layer
4726 * of the driver.
4727 *
4728 * Return value
4729 * 0 on success else error code.
4730 */
4731 static int __init mtip_init(void)
4732 {
4733 int error;
4734
4735 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4736
4737 spin_lock_init(&dev_lock);
4738
4739 INIT_LIST_HEAD(&online_list);
4740 INIT_LIST_HEAD(&removing_list);
4741
4742 /* Allocate a major block device number to use with this driver. */
4743 error = register_blkdev(0, MTIP_DRV_NAME);
4744 if (error <= 0) {
4745 pr_err("Unable to register block device (%d)\n",
4746 error);
4747 return -EBUSY;
4748 }
4749 mtip_major = error;
4750
4751 dfs_parent = debugfs_create_dir("rssd", NULL);
4752 if (IS_ERR_OR_NULL(dfs_parent)) {
4753 pr_warn("Error creating debugfs parent\n");
4754 dfs_parent = NULL;
4755 }
4756 if (dfs_parent) {
4757 dfs_device_status = debugfs_create_file("device_status",
4758 S_IRUGO, dfs_parent, NULL,
4759 &mtip_device_status_fops);
4760 if (IS_ERR_OR_NULL(dfs_device_status)) {
4761 pr_err("Error creating device_status node\n");
4762 dfs_device_status = NULL;
4763 }
4764 }
4765
4766 /* Register our PCI operations. */
4767 error = pci_register_driver(&mtip_pci_driver);
4768 if (error) {
4769 debugfs_remove(dfs_parent);
4770 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4771 }
4772
4773 return error;
4774 }
4775
4776 /*
4777 * Module de-initialization function.
4778 *
4779 * Called once when the module is unloaded. This function deallocates
4780 * the major block device number allocated by mtip_init() and
4781 * unregisters the PCI layer of the driver.
4782 *
4783 * Return value
4784 * none
4785 */
4786 static void __exit mtip_exit(void)
4787 {
4788 /* Release the allocated major block device number. */
4789 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4790
4791 /* Unregister the PCI driver. */
4792 pci_unregister_driver(&mtip_pci_driver);
4793
4794 debugfs_remove_recursive(dfs_parent);
4795 }
4796
4797 MODULE_AUTHOR("Micron Technology, Inc");
4798 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4799 MODULE_LICENSE("GPL");
4800 MODULE_VERSION(MTIP_DRV_VERSION);
4801
4802 module_init(mtip_init);
4803 module_exit(mtip_exit);
Linux with added FPC-III support