2 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #include <linux/clk.h>
18 #include <linux/clk-provider.h>
19 #include <linux/err.h>
20 #include <linux/slab.h>
22 #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
24 static u8
clk_composite_get_parent(struct clk_hw
*hw
)
26 struct clk_composite
*composite
= to_clk_composite(hw
);
27 const struct clk_ops
*mux_ops
= composite
->mux_ops
;
28 struct clk_hw
*mux_hw
= composite
->mux_hw
;
30 mux_hw
->clk
= hw
->clk
;
32 return mux_ops
->get_parent(mux_hw
);
35 static int clk_composite_set_parent(struct clk_hw
*hw
, u8 index
)
37 struct clk_composite
*composite
= to_clk_composite(hw
);
38 const struct clk_ops
*mux_ops
= composite
->mux_ops
;
39 struct clk_hw
*mux_hw
= composite
->mux_hw
;
41 mux_hw
->clk
= hw
->clk
;
43 return mux_ops
->set_parent(mux_hw
, index
);
46 static unsigned long clk_composite_recalc_rate(struct clk_hw
*hw
,
47 unsigned long parent_rate
)
49 struct clk_composite
*composite
= to_clk_composite(hw
);
50 const struct clk_ops
*rate_ops
= composite
->rate_ops
;
51 struct clk_hw
*rate_hw
= composite
->rate_hw
;
53 rate_hw
->clk
= hw
->clk
;
55 return rate_ops
->recalc_rate(rate_hw
, parent_rate
);
58 static long clk_composite_round_rate(struct clk_hw
*hw
, unsigned long rate
,
61 struct clk_composite
*composite
= to_clk_composite(hw
);
62 const struct clk_ops
*rate_ops
= composite
->rate_ops
;
63 struct clk_hw
*rate_hw
= composite
->rate_hw
;
65 rate_hw
->clk
= hw
->clk
;
67 return rate_ops
->round_rate(rate_hw
, rate
, prate
);
70 static int clk_composite_set_rate(struct clk_hw
*hw
, unsigned long rate
,
71 unsigned long parent_rate
)
73 struct clk_composite
*composite
= to_clk_composite(hw
);
74 const struct clk_ops
*rate_ops
= composite
->rate_ops
;
75 struct clk_hw
*rate_hw
= composite
->rate_hw
;
77 rate_hw
->clk
= hw
->clk
;
79 return rate_ops
->set_rate(rate_hw
, rate
, parent_rate
);
82 static int clk_composite_is_enabled(struct clk_hw
*hw
)
84 struct clk_composite
*composite
= to_clk_composite(hw
);
85 const struct clk_ops
*gate_ops
= composite
->gate_ops
;
86 struct clk_hw
*gate_hw
= composite
->gate_hw
;
88 gate_hw
->clk
= hw
->clk
;
90 return gate_ops
->is_enabled(gate_hw
);
93 static int clk_composite_enable(struct clk_hw
*hw
)
95 struct clk_composite
*composite
= to_clk_composite(hw
);
96 const struct clk_ops
*gate_ops
= composite
->gate_ops
;
97 struct clk_hw
*gate_hw
= composite
->gate_hw
;
99 gate_hw
->clk
= hw
->clk
;
101 return gate_ops
->enable(gate_hw
);
104 static void clk_composite_disable(struct clk_hw
*hw
)
106 struct clk_composite
*composite
= to_clk_composite(hw
);
107 const struct clk_ops
*gate_ops
= composite
->gate_ops
;
108 struct clk_hw
*gate_hw
= composite
->gate_hw
;
110 gate_hw
->clk
= hw
->clk
;
112 gate_ops
->disable(gate_hw
);
115 struct clk
*clk_register_composite(struct device
*dev
, const char *name
,
116 const char **parent_names
, int num_parents
,
117 struct clk_hw
*mux_hw
, const struct clk_ops
*mux_ops
,
118 struct clk_hw
*rate_hw
, const struct clk_ops
*rate_ops
,
119 struct clk_hw
*gate_hw
, const struct clk_ops
*gate_ops
,
123 struct clk_init_data init
;
124 struct clk_composite
*composite
;
125 struct clk_ops
*clk_composite_ops
;
127 composite
= kzalloc(sizeof(*composite
), GFP_KERNEL
);
129 pr_err("%s: could not allocate composite clk\n", __func__
);
130 return ERR_PTR(-ENOMEM
);
134 init
.flags
= flags
| CLK_IS_BASIC
;
135 init
.parent_names
= parent_names
;
136 init
.num_parents
= num_parents
;
138 clk_composite_ops
= &composite
->ops
;
140 if (mux_hw
&& mux_ops
) {
141 if (!mux_ops
->get_parent
|| !mux_ops
->set_parent
) {
142 clk
= ERR_PTR(-EINVAL
);
146 composite
->mux_hw
= mux_hw
;
147 composite
->mux_ops
= mux_ops
;
148 clk_composite_ops
->get_parent
= clk_composite_get_parent
;
149 clk_composite_ops
->set_parent
= clk_composite_set_parent
;
152 if (rate_hw
&& rate_ops
) {
153 if (!rate_ops
->recalc_rate
) {
154 clk
= ERR_PTR(-EINVAL
);
158 /* .round_rate is a prerequisite for .set_rate */
159 if (rate_ops
->round_rate
) {
160 clk_composite_ops
->round_rate
= clk_composite_round_rate
;
161 if (rate_ops
->set_rate
) {
162 clk_composite_ops
->set_rate
= clk_composite_set_rate
;
165 WARN(rate_ops
->set_rate
,
166 "%s: missing round_rate op is required\n",
170 composite
->rate_hw
= rate_hw
;
171 composite
->rate_ops
= rate_ops
;
172 clk_composite_ops
->recalc_rate
= clk_composite_recalc_rate
;
175 if (gate_hw
&& gate_ops
) {
176 if (!gate_ops
->is_enabled
|| !gate_ops
->enable
||
177 !gate_ops
->disable
) {
178 clk
= ERR_PTR(-EINVAL
);
182 composite
->gate_hw
= gate_hw
;
183 composite
->gate_ops
= gate_ops
;
184 clk_composite_ops
->is_enabled
= clk_composite_is_enabled
;
185 clk_composite_ops
->enable
= clk_composite_enable
;
186 clk_composite_ops
->disable
= clk_composite_disable
;
189 init
.ops
= clk_composite_ops
;
190 composite
->hw
.init
= &init
;
192 clk
= clk_register(dev
, &composite
->hw
);
196 if (composite
->mux_hw
)
197 composite
->mux_hw
->clk
= clk
;
199 if (composite
->rate_hw
)
200 composite
->rate_hw
->clk
= clk
;
202 if (composite
->gate_hw
)
203 composite
->gate_hw
->clk
= clk
;