x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / gpio / gpio-pcf857x.c
blob9e61bb0719d0cac80f176b941adf51aa52cd9b01
1 /*
2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
4 * Copyright (C) 2007 David Brownell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/gpio.h>
22 #include <linux/i2c.h>
23 #include <linux/i2c/pcf857x.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/irqdomain.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/workqueue.h>
34 static const struct i2c_device_id pcf857x_id[] = {
35 { "pcf8574", 8 },
36 { "pcf8574a", 8 },
37 { "pca8574", 8 },
38 { "pca9670", 8 },
39 { "pca9672", 8 },
40 { "pca9674", 8 },
41 { "pcf8575", 16 },
42 { "pca8575", 16 },
43 { "pca9671", 16 },
44 { "pca9673", 16 },
45 { "pca9675", 16 },
46 { "max7328", 8 },
47 { "max7329", 8 },
48 { "tca9554", 8 },
49 { }
51 MODULE_DEVICE_TABLE(i2c, pcf857x_id);
54 * The pcf857x, pca857x, and pca967x chips only expose one read and one
55 * write register. Writing a "one" bit (to match the reset state) lets
56 * that pin be used as an input; it's not an open-drain model, but acts
57 * a bit like one. This is described as "quasi-bidirectional"; read the
58 * chip documentation for details.
60 * Many other I2C GPIO expander chips (like the pca953x models) have
61 * more complex register models and more conventional circuitry using
62 * push/pull drivers. They often use the same 0x20..0x27 addresses as
63 * pcf857x parts, making the "legacy" I2C driver model problematic.
65 struct pcf857x {
66 struct gpio_chip chip;
67 struct i2c_client *client;
68 struct mutex lock; /* protect 'out' */
69 struct work_struct work; /* irq demux work */
70 struct irq_domain *irq_domain; /* for irq demux */
71 spinlock_t slock; /* protect irq demux */
72 unsigned out; /* software latch */
73 unsigned status; /* current status */
74 int irq; /* real irq number */
76 int (*write)(struct i2c_client *client, unsigned data);
77 int (*read)(struct i2c_client *client);
80 /*-------------------------------------------------------------------------*/
82 /* Talk to 8-bit I/O expander */
84 static int i2c_write_le8(struct i2c_client *client, unsigned data)
86 return i2c_smbus_write_byte(client, data);
89 static int i2c_read_le8(struct i2c_client *client)
91 return (int)i2c_smbus_read_byte(client);
94 /* Talk to 16-bit I/O expander */
96 static int i2c_write_le16(struct i2c_client *client, unsigned word)
98 u8 buf[2] = { word & 0xff, word >> 8, };
99 int status;
101 status = i2c_master_send(client, buf, 2);
102 return (status < 0) ? status : 0;
105 static int i2c_read_le16(struct i2c_client *client)
107 u8 buf[2];
108 int status;
110 status = i2c_master_recv(client, buf, 2);
111 if (status < 0)
112 return status;
113 return (buf[1] << 8) | buf[0];
116 /*-------------------------------------------------------------------------*/
118 static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
120 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
121 int status;
123 mutex_lock(&gpio->lock);
124 gpio->out |= (1 << offset);
125 status = gpio->write(gpio->client, gpio->out);
126 mutex_unlock(&gpio->lock);
128 return status;
131 static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
133 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
134 int value;
136 value = gpio->read(gpio->client);
137 return (value < 0) ? 0 : (value & (1 << offset));
140 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
142 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
143 unsigned bit = 1 << offset;
144 int status;
146 mutex_lock(&gpio->lock);
147 if (value)
148 gpio->out |= bit;
149 else
150 gpio->out &= ~bit;
151 status = gpio->write(gpio->client, gpio->out);
152 mutex_unlock(&gpio->lock);
154 return status;
157 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
159 pcf857x_output(chip, offset, value);
162 /*-------------------------------------------------------------------------*/
164 static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
166 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
168 return irq_create_mapping(gpio->irq_domain, offset);
171 static void pcf857x_irq_demux_work(struct work_struct *work)
173 struct pcf857x *gpio = container_of(work,
174 struct pcf857x,
175 work);
176 unsigned long change, i, status, flags;
178 status = gpio->read(gpio->client);
180 spin_lock_irqsave(&gpio->slock, flags);
182 change = gpio->status ^ status;
183 for_each_set_bit(i, &change, gpio->chip.ngpio)
184 generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
185 gpio->status = status;
187 spin_unlock_irqrestore(&gpio->slock, flags);
190 static irqreturn_t pcf857x_irq_demux(int irq, void *data)
192 struct pcf857x *gpio = data;
195 * pcf857x can't read/write data here,
196 * since i2c data access might go to sleep.
198 schedule_work(&gpio->work);
200 return IRQ_HANDLED;
203 static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int virq,
204 irq_hw_number_t hw)
206 irq_set_chip_and_handler(virq,
207 &dummy_irq_chip,
208 handle_level_irq);
209 return 0;
212 static struct irq_domain_ops pcf857x_irq_domain_ops = {
213 .map = pcf857x_irq_domain_map,
216 static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
218 if (gpio->irq_domain)
219 irq_domain_remove(gpio->irq_domain);
221 if (gpio->irq)
222 free_irq(gpio->irq, gpio);
225 static int pcf857x_irq_domain_init(struct pcf857x *gpio,
226 struct i2c_client *client)
228 int status;
230 gpio->irq_domain = irq_domain_add_linear(client->dev.of_node,
231 gpio->chip.ngpio,
232 &pcf857x_irq_domain_ops,
233 NULL);
234 if (!gpio->irq_domain)
235 goto fail;
237 /* enable real irq */
238 status = request_irq(client->irq, pcf857x_irq_demux, 0,
239 dev_name(&client->dev), gpio);
240 if (status)
241 goto fail;
243 /* enable gpio_to_irq() */
244 INIT_WORK(&gpio->work, pcf857x_irq_demux_work);
245 gpio->chip.to_irq = pcf857x_to_irq;
246 gpio->irq = client->irq;
248 return 0;
250 fail:
251 pcf857x_irq_domain_cleanup(gpio);
252 return -EINVAL;
255 /*-------------------------------------------------------------------------*/
257 static int pcf857x_probe(struct i2c_client *client,
258 const struct i2c_device_id *id)
260 struct pcf857x_platform_data *pdata;
261 struct pcf857x *gpio;
262 int status;
264 pdata = dev_get_platdata(&client->dev);
265 if (!pdata) {
266 dev_dbg(&client->dev, "no platform data\n");
269 /* Allocate, initialize, and register this gpio_chip. */
270 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
271 if (!gpio)
272 return -ENOMEM;
274 mutex_init(&gpio->lock);
275 spin_lock_init(&gpio->slock);
277 gpio->chip.base = pdata ? pdata->gpio_base : -1;
278 gpio->chip.can_sleep = 1;
279 gpio->chip.dev = &client->dev;
280 gpio->chip.owner = THIS_MODULE;
281 gpio->chip.get = pcf857x_get;
282 gpio->chip.set = pcf857x_set;
283 gpio->chip.direction_input = pcf857x_input;
284 gpio->chip.direction_output = pcf857x_output;
285 gpio->chip.ngpio = id->driver_data;
287 /* enable gpio_to_irq() if platform has settings */
288 if (client->irq) {
289 status = pcf857x_irq_domain_init(gpio, client);
290 if (status < 0) {
291 dev_err(&client->dev, "irq_domain init failed\n");
292 goto fail;
296 /* NOTE: the OnSemi jlc1562b is also largely compatible with
297 * these parts, notably for output. It has a low-resolution
298 * DAC instead of pin change IRQs; and its inputs can be the
299 * result of comparators.
302 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
303 * 9670, 9672, 9764, and 9764a use quite a variety.
305 * NOTE: we don't distinguish here between *4 and *4a parts.
307 if (gpio->chip.ngpio == 8) {
308 gpio->write = i2c_write_le8;
309 gpio->read = i2c_read_le8;
311 if (!i2c_check_functionality(client->adapter,
312 I2C_FUNC_SMBUS_BYTE))
313 status = -EIO;
315 /* fail if there's no chip present */
316 else
317 status = i2c_smbus_read_byte(client);
319 /* '75/'75c addresses are 0x20..0x27, just like the '74;
320 * the '75c doesn't have a current source pulling high.
321 * 9671, 9673, and 9765 use quite a variety of addresses.
323 * NOTE: we don't distinguish here between '75 and '75c parts.
325 } else if (gpio->chip.ngpio == 16) {
326 gpio->write = i2c_write_le16;
327 gpio->read = i2c_read_le16;
329 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
330 status = -EIO;
332 /* fail if there's no chip present */
333 else
334 status = i2c_read_le16(client);
336 } else {
337 dev_dbg(&client->dev, "unsupported number of gpios\n");
338 status = -EINVAL;
341 if (status < 0)
342 goto fail;
344 gpio->chip.label = client->name;
346 gpio->client = client;
347 i2c_set_clientdata(client, gpio);
349 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
350 * We can't actually know whether a pin is configured (a) as output
351 * and driving the signal low, or (b) as input and reporting a low
352 * value ... without knowing the last value written since the chip
353 * came out of reset (if any). We can't read the latched output.
355 * In short, the only reliable solution for setting up pin direction
356 * is to do it explicitly. The setup() method can do that, but it
357 * may cause transient glitching since it can't know the last value
358 * written (some pins may need to be driven low).
360 * Using pdata->n_latch avoids that trouble. When left initialized
361 * to zero, our software copy of the "latch" then matches the chip's
362 * all-ones reset state. Otherwise it flags pins to be driven low.
364 gpio->out = pdata ? ~pdata->n_latch : ~0;
365 gpio->status = gpio->out;
367 status = gpiochip_add(&gpio->chip);
368 if (status < 0)
369 goto fail;
371 /* Let platform code set up the GPIOs and their users.
372 * Now is the first time anyone could use them.
374 if (pdata && pdata->setup) {
375 status = pdata->setup(client,
376 gpio->chip.base, gpio->chip.ngpio,
377 pdata->context);
378 if (status < 0)
379 dev_warn(&client->dev, "setup --> %d\n", status);
382 dev_info(&client->dev, "probed\n");
384 return 0;
386 fail:
387 dev_dbg(&client->dev, "probe error %d for '%s'\n",
388 status, client->name);
390 if (client->irq)
391 pcf857x_irq_domain_cleanup(gpio);
393 return status;
396 static int pcf857x_remove(struct i2c_client *client)
398 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
399 struct pcf857x *gpio = i2c_get_clientdata(client);
400 int status = 0;
402 if (pdata && pdata->teardown) {
403 status = pdata->teardown(client,
404 gpio->chip.base, gpio->chip.ngpio,
405 pdata->context);
406 if (status < 0) {
407 dev_err(&client->dev, "%s --> %d\n",
408 "teardown", status);
409 return status;
413 if (client->irq)
414 pcf857x_irq_domain_cleanup(gpio);
416 status = gpiochip_remove(&gpio->chip);
417 if (status)
418 dev_err(&client->dev, "%s --> %d\n", "remove", status);
419 return status;
422 static struct i2c_driver pcf857x_driver = {
423 .driver = {
424 .name = "pcf857x",
425 .owner = THIS_MODULE,
427 .probe = pcf857x_probe,
428 .remove = pcf857x_remove,
429 .id_table = pcf857x_id,
432 static int __init pcf857x_init(void)
434 return i2c_add_driver(&pcf857x_driver);
436 /* register after i2c postcore initcall and before
437 * subsys initcalls that may rely on these GPIOs
439 subsys_initcall(pcf857x_init);
441 static void __exit pcf857x_exit(void)
443 i2c_del_driver(&pcf857x_driver);
445 module_exit(pcf857x_exit);
447 MODULE_LICENSE("GPL");
448 MODULE_AUTHOR("David Brownell");