drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  56 {
  57         return container_of(encoder, struct intel_crt, base);
  58 }
  59
  60 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  61 {
  62         return intel_encoder_to_crt(intel_attached_encoder(connector));
  63 }
  64
  65 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  66                                    enum pipe *pipe)
  67 {
  68         struct drm_device *dev = encoder->base.dev;
  69         struct drm_i915_private *dev_priv = dev->dev_private;
  70         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  71         u32 tmp;
  72
  73         tmp = I915_READ(crt->adpa_reg);
  74
  75         if (!(tmp & ADPA_DAC_ENABLE))
  76                 return false;
  77
  78         if (HAS_PCH_CPT(dev))
  79                 *pipe = PORT_TO_PIPE_CPT(tmp);
  80         else
  81                 *pipe = PORT_TO_PIPE(tmp);
  82
  83         return true;
  84 }
  85
  86 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
  87 {
  88         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  89         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  90         u32 tmp, flags = 0;
  91
  92         tmp = I915_READ(crt->adpa_reg);
  93
  94         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
  95                 flags |= DRM_MODE_FLAG_PHSYNC;
  96         else
  97                 flags |= DRM_MODE_FLAG_NHSYNC;
  98
  99         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 100                 flags |= DRM_MODE_FLAG_PVSYNC;
 101         else
 102                 flags |= DRM_MODE_FLAG_NVSYNC;
 103
 104         return flags;
 105 }
 106
 107 static void intel_crt_get_config(struct intel_encoder *encoder,
 108                                  struct intel_crtc_config *pipe_config)
 109 {
 110         pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
 111 }
 112
 113 static void hsw_crt_get_config(struct intel_encoder *encoder,
 114                                struct intel_crtc_config *pipe_config)
 115 {
 116         intel_ddi_get_config(encoder, pipe_config);
 117
 118         pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
 119                                               DRM_MODE_FLAG_NHSYNC |
 120                                               DRM_MODE_FLAG_PVSYNC |
 121                                               DRM_MODE_FLAG_NVSYNC);
 122         pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
 123 }
 124
 125 /* Note: The caller is required to filter out dpms modes not supported by the
 126  * platform. */
 127 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 128 {
 129         struct drm_device *dev = encoder->base.dev;
 130         struct drm_i915_private *dev_priv = dev->dev_private;
 131         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 132         u32 temp;
 133
 134         temp = I915_READ(crt->adpa_reg);
 135         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 136         temp &= ~ADPA_DAC_ENABLE;
 137
 138         switch (mode) {
 139         case DRM_MODE_DPMS_ON:
 140                 temp |= ADPA_DAC_ENABLE;
 141                 break;
 142         case DRM_MODE_DPMS_STANDBY:
 143                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 144                 break;
 145         case DRM_MODE_DPMS_SUSPEND:
 146                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 147                 break;
 148         case DRM_MODE_DPMS_OFF:
 149                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 150                 break;
 151         }
 152
 153         I915_WRITE(crt->adpa_reg, temp);
 154 }
 155
 156 static void intel_disable_crt(struct intel_encoder *encoder)
 157 {
 158         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 159 }
 160
 161 static void intel_enable_crt(struct intel_encoder *encoder)
 162 {
 163         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 164
 165         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 166 }
 167
 168 /* Special dpms function to support cloning between dvo/sdvo/crt. */
 169 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 170 {
 171         struct drm_device *dev = connector->dev;
 172         struct intel_encoder *encoder = intel_attached_encoder(connector);
 173         struct drm_crtc *crtc;
 174         int old_dpms;
 175
 176         /* PCH platforms and VLV only support on/off. */
 177         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 178                 mode = DRM_MODE_DPMS_OFF;
 179
 180         if (mode == connector->dpms)
 181                 return;
 182
 183         old_dpms = connector->dpms;
 184         connector->dpms = mode;
 185
 186         /* Only need to change hw state when actually enabled */
 187         crtc = encoder->base.crtc;
 188         if (!crtc) {
 189                 encoder->connectors_active = false;
 190                 return;
 191         }
 192
 193         /* We need the pipe to run for anything but OFF. */
 194         if (mode == DRM_MODE_DPMS_OFF)
 195                 encoder->connectors_active = false;
 196         else
 197                 encoder->connectors_active = true;
 198
 199         /* We call connector dpms manually below in case pipe dpms doesn't
 200          * change due to cloning. */
 201         if (mode < old_dpms) {
 202                 /* From off to on, enable the pipe first. */
 203                 intel_crtc_update_dpms(crtc);
 204
 205                 intel_crt_set_dpms(encoder, mode);
 206         } else {
 207                 intel_crt_set_dpms(encoder, mode);
 208
 209                 intel_crtc_update_dpms(crtc);
 210         }
 211
 212         intel_modeset_check_state(connector->dev);
 213 }
 214
 215 static int intel_crt_mode_valid(struct drm_connector *connector,
 216                                 struct drm_display_mode *mode)
 217 {
 218         struct drm_device *dev = connector->dev;
 219
 220         int max_clock = 0;
 221         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 222                 return MODE_NO_DBLESCAN;
 223
 224         if (mode->clock < 25000)
 225                 return MODE_CLOCK_LOW;
 226
 227         if (IS_GEN2(dev))
 228                 max_clock = 350000;
 229         else
 230                 max_clock = 400000;
 231         if (mode->clock > max_clock)
 232                 return MODE_CLOCK_HIGH;
 233
 234         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 235         if (HAS_PCH_LPT(dev) &&
 236             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 237                 return MODE_CLOCK_HIGH;
 238
 239         return MODE_OK;
 240 }
 241
 242 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 243                                      struct intel_crtc_config *pipe_config)
 244 {
 245         struct drm_device *dev = encoder->base.dev;
 246
 247         if (HAS_PCH_SPLIT(dev))
 248                 pipe_config->has_pch_encoder = true;
 249
 250         /* LPT FDI RX only supports 8bpc. */
 251         if (HAS_PCH_LPT(dev))
 252                 pipe_config->pipe_bpp = 24;
 253
 254         return true;
 255 }
 256
 257 static void intel_crt_mode_set(struct intel_encoder *encoder)
 258 {
 259
 260         struct drm_device *dev = encoder->base.dev;
 261         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 262         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 263         struct drm_i915_private *dev_priv = dev->dev_private;
 264         struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
 265         u32 adpa;
 266
 267         if (HAS_PCH_SPLIT(dev))
 268                 adpa = ADPA_HOTPLUG_BITS;
 269         else
 270                 adpa = 0;
 271
 272         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 273                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 274         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 275                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 276
 277         /* For CPT allow 3 pipe config, for others just use A or B */
 278         if (HAS_PCH_LPT(dev))
 279                 ; /* Those bits don't exist here */
 280         else if (HAS_PCH_CPT(dev))
 281                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 282         else if (crtc->pipe == 0)
 283                 adpa |= ADPA_PIPE_A_SELECT;
 284         else
 285                 adpa |= ADPA_PIPE_B_SELECT;
 286
 287         if (!HAS_PCH_SPLIT(dev))
 288                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 289
 290         I915_WRITE(crt->adpa_reg, adpa);
 291 }
 292
 293 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 294 {
 295         struct drm_device *dev = connector->dev;
 296         struct intel_crt *crt = intel_attached_crt(connector);
 297         struct drm_i915_private *dev_priv = dev->dev_private;
 298         u32 adpa;
 299         bool ret;
 300
 301         /* The first time through, trigger an explicit detection cycle */
 302         if (crt->force_hotplug_required) {
 303                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 304                 u32 save_adpa;
 305
 306                 crt->force_hotplug_required = 0;
 307
 308                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 309                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 310
 311                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 312                 if (turn_off_dac)
 313                         adpa &= ~ADPA_DAC_ENABLE;
 314
 315                 I915_WRITE(crt->adpa_reg, adpa);
 316
 317                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 318                              1000))
 319                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 320
 321                 if (turn_off_dac) {
 322                         I915_WRITE(crt->adpa_reg, save_adpa);
 323                         POSTING_READ(crt->adpa_reg);
 324                 }
 325         }
 326
 327         /* Check the status to see if both blue and green are on now */
 328         adpa = I915_READ(crt->adpa_reg);
 329         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 330                 ret = true;
 331         else
 332                 ret = false;
 333         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 334
 335         return ret;
 336 }
 337
 338 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 339 {
 340         struct drm_device *dev = connector->dev;
 341         struct intel_crt *crt = intel_attached_crt(connector);
 342         struct drm_i915_private *dev_priv = dev->dev_private;
 343         u32 adpa;
 344         bool ret;
 345         u32 save_adpa;
 346
 347         save_adpa = adpa = I915_READ(crt->adpa_reg);
 348         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 349
 350         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 351
 352         I915_WRITE(crt->adpa_reg, adpa);
 353
 354         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 355                      1000)) {
 356                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 357                 I915_WRITE(crt->adpa_reg, save_adpa);
 358         }
 359
 360         /* Check the status to see if both blue and green are on now */
 361         adpa = I915_READ(crt->adpa_reg);
 362         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 363                 ret = true;
 364         else
 365                 ret = false;
 366
 367         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 368
 369         /* FIXME: debug force function and remove */
 370         ret = true;
 371
 372         return ret;
 373 }
 374
 375 /**
 376  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 377  *
 378  * Not for i915G/i915GM
 379  *
 380  * \return true if CRT is connected.
 381  * \return false if CRT is disconnected.
 382  */
 383 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 384 {
 385         struct drm_device *dev = connector->dev;
 386         struct drm_i915_private *dev_priv = dev->dev_private;
 387         u32 hotplug_en, orig, stat;
 388         bool ret = false;
 389         int i, tries = 0;
 390
 391         if (HAS_PCH_SPLIT(dev))
 392                 return intel_ironlake_crt_detect_hotplug(connector);
 393
 394         if (IS_VALLEYVIEW(dev))
 395                 return valleyview_crt_detect_hotplug(connector);
 396
 397         /*
 398          * On 4 series desktop, CRT detect sequence need to be done twice
 399          * to get a reliable result.
 400          */
 401
 402         if (IS_G4X(dev) && !IS_GM45(dev))
 403                 tries = 2;
 404         else
 405                 tries = 1;
 406         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 407         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 408
 409         for (i = 0; i < tries ; i++) {
 410                 /* turn on the FORCE_DETECT */
 411                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 412                 /* wait for FORCE_DETECT to go off */
 413                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 414                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 415                              1000))
 416                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 417         }
 418
 419         stat = I915_READ(PORT_HOTPLUG_STAT);
 420         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 421                 ret = true;
 422
 423         /* clear the interrupt we just generated, if any */
 424         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 425
 426         /* and put the bits back */
 427         I915_WRITE(PORT_HOTPLUG_EN, orig);
 428
 429         return ret;
 430 }
 431
 432 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 433                                 struct i2c_adapter *i2c)
 434 {
 435         struct edid *edid;
 436
 437         edid = drm_get_edid(connector, i2c);
 438
 439         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 440                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 441                 intel_gmbus_force_bit(i2c, true);
 442                 edid = drm_get_edid(connector, i2c);
 443                 intel_gmbus_force_bit(i2c, false);
 444         }
 445
 446         return edid;
 447 }
 448
 449 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 450 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 451                                 struct i2c_adapter *adapter)
 452 {
 453         struct edid *edid;
 454         int ret;
 455
 456         edid = intel_crt_get_edid(connector, adapter);
 457         if (!edid)
 458                 return 0;
 459
 460         ret = intel_connector_update_modes(connector, edid);
 461         kfree(edid);
 462
 463         return ret;
 464 }
 465
 466 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 467 {
 468         struct intel_crt *crt = intel_attached_crt(connector);
 469         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 470         struct edid *edid;
 471         struct i2c_adapter *i2c;
 472
 473         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 474
 475         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 476         edid = intel_crt_get_edid(connector, i2c);
 477
 478         if (edid) {
 479                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 480
 481                 /*
 482                  * This may be a DVI-I connector with a shared DDC
 483                  * link between analog and digital outputs, so we
 484                  * have to check the EDID input spec of the attached device.
 485                  */
 486                 if (!is_digital) {
 487                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 488                         return true;
 489                 }
 490
 491                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 492         } else {
 493                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 494         }
 495
 496         kfree(edid);
 497
 498         return false;
 499 }
 500
 501 static enum drm_connector_status
 502 intel_crt_load_detect(struct intel_crt *crt)
 503 {
 504         struct drm_device *dev = crt->base.base.dev;
 505         struct drm_i915_private *dev_priv = dev->dev_private;
 506         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 507         uint32_t save_bclrpat;
 508         uint32_t save_vtotal;
 509         uint32_t vtotal, vactive;
 510         uint32_t vsample;
 511         uint32_t vblank, vblank_start, vblank_end;
 512         uint32_t dsl;
 513         uint32_t bclrpat_reg;
 514         uint32_t vtotal_reg;
 515         uint32_t vblank_reg;
 516         uint32_t vsync_reg;
 517         uint32_t pipeconf_reg;
 518         uint32_t pipe_dsl_reg;
 519         uint8_t st00;
 520         enum drm_connector_status status;
 521
 522         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 523
 524         bclrpat_reg = BCLRPAT(pipe);
 525         vtotal_reg = VTOTAL(pipe);
 526         vblank_reg = VBLANK(pipe);
 527         vsync_reg = VSYNC(pipe);
 528         pipeconf_reg = PIPECONF(pipe);
 529         pipe_dsl_reg = PIPEDSL(pipe);
 530
 531         save_bclrpat = I915_READ(bclrpat_reg);
 532         save_vtotal = I915_READ(vtotal_reg);
 533         vblank = I915_READ(vblank_reg);
 534
 535         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 536         vactive = (save_vtotal & 0x7ff) + 1;
 537
 538         vblank_start = (vblank & 0xfff) + 1;
 539         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 540
 541         /* Set the border color to purple. */
 542         I915_WRITE(bclrpat_reg, 0x500050);
 543
 544         if (!IS_GEN2(dev)) {
 545                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 546                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 547                 POSTING_READ(pipeconf_reg);
 548                 /* Wait for next Vblank to substitue
 549                  * border color for Color info */
 550                 intel_wait_for_vblank(dev, pipe);
 551                 st00 = I915_READ8(VGA_MSR_WRITE);
 552                 status = ((st00 & (1 << 4)) != 0) ?
 553                         connector_status_connected :
 554                         connector_status_disconnected;
 555
 556                 I915_WRITE(pipeconf_reg, pipeconf);
 557         } else {
 558                 bool restore_vblank = false;
 559                 int count, detect;
 560
 561                 /*
 562                 * If there isn't any border, add some.
 563                 * Yes, this will flicker
 564                 */
 565                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 566                         uint32_t vsync = I915_READ(vsync_reg);
 567                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 568
 569                         vblank_start = vsync_start;
 570                         I915_WRITE(vblank_reg,
 571                                    (vblank_start - 1) |
 572                                    ((vblank_end - 1) << 16));
 573                         restore_vblank = true;
 574                 }
 575                 /* sample in the vertical border, selecting the larger one */
 576                 if (vblank_start - vactive >= vtotal - vblank_end)
 577                         vsample = (vblank_start + vactive) >> 1;
 578                 else
 579                         vsample = (vtotal + vblank_end) >> 1;
 580
 581                 /*
 582                  * Wait for the border to be displayed
 583                  */
 584                 while (I915_READ(pipe_dsl_reg) >= vactive)
 585                         ;
 586                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 587                         ;
 588                 /*
 589                  * Watch ST00 for an entire scanline
 590                  */
 591                 detect = 0;
 592                 count = 0;
 593                 do {
 594                         count++;
 595                         /* Read the ST00 VGA status register */
 596                         st00 = I915_READ8(VGA_MSR_WRITE);
 597                         if (st00 & (1 << 4))
 598                                 detect++;
 599                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 600
 601                 /* restore vblank if necessary */
 602                 if (restore_vblank)
 603                         I915_WRITE(vblank_reg, vblank);
 604                 /*
 605                  * If more than 3/4 of the scanline detected a monitor,
 606                  * then it is assumed to be present. This works even on i830,
 607                  * where there isn't any way to force the border color across
 608                  * the screen
 609                  */
 610                 status = detect * 4 > count * 3 ?
 611                          connector_status_connected :
 612                          connector_status_disconnected;
 613         }
 614
 615         /* Restore previous settings */
 616         I915_WRITE(bclrpat_reg, save_bclrpat);
 617
 618         return status;
 619 }
 620
 621 static enum drm_connector_status
 622 intel_crt_detect(struct drm_connector *connector, bool force)
 623 {
 624         struct drm_device *dev = connector->dev;
 625         struct intel_crt *crt = intel_attached_crt(connector);
 626         enum drm_connector_status status;
 627         struct intel_load_detect_pipe tmp;
 628
 629         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 630                       connector->base.id, drm_get_connector_name(connector),
 631                       force);
 632
 633         if (I915_HAS_HOTPLUG(dev)) {
 634                 /* We can not rely on the HPD pin always being correctly wired
 635                  * up, for example many KVM do not pass it through, and so
 636                  * only trust an assertion that the monitor is connected.
 637                  */
 638                 if (intel_crt_detect_hotplug(connector)) {
 639                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 640                         return connector_status_connected;
 641                 } else
 642                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 643         }
 644
 645         if (intel_crt_detect_ddc(connector))
 646                 return connector_status_connected;
 647
 648         /* Load detection is broken on HPD capable machines. Whoever wants a
 649          * broken monitor (without edid) to work behind a broken kvm (that fails
 650          * to have the right resistors for HP detection) needs to fix this up.
 651          * For now just bail out. */
 652         if (I915_HAS_HOTPLUG(dev))
 653                 return connector_status_disconnected;
 654
 655         if (!force)
 656                 return connector->status;
 657
 658         /* for pre-945g platforms use load detect */
 659         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 660                 if (intel_crt_detect_ddc(connector))
 661                         status = connector_status_connected;
 662                 else
 663                         status = intel_crt_load_detect(crt);
 664                 intel_release_load_detect_pipe(connector, &tmp);
 665         } else
 666                 status = connector_status_unknown;
 667
 668         return status;
 669 }
 670
 671 static void intel_crt_destroy(struct drm_connector *connector)
 672 {
 673         drm_sysfs_connector_remove(connector);
 674         drm_connector_cleanup(connector);
 675         kfree(connector);
 676 }
 677
 678 static int intel_crt_get_modes(struct drm_connector *connector)
 679 {
 680         struct drm_device *dev = connector->dev;
 681         struct drm_i915_private *dev_priv = dev->dev_private;
 682         int ret;
 683         struct i2c_adapter *i2c;
 684
 685         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 686         ret = intel_crt_ddc_get_modes(connector, i2c);
 687         if (ret || !IS_G4X(dev))
 688                 return ret;
 689
 690         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 691         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 692         return intel_crt_ddc_get_modes(connector, i2c);
 693 }
 694
 695 static int intel_crt_set_property(struct drm_connector *connector,
 696                                   struct drm_property *property,
 697                                   uint64_t value)
 698 {
 699         return 0;
 700 }
 701
 702 static void intel_crt_reset(struct drm_connector *connector)
 703 {
 704         struct drm_device *dev = connector->dev;
 705         struct drm_i915_private *dev_priv = dev->dev_private;
 706         struct intel_crt *crt = intel_attached_crt(connector);
 707
 708         if (INTEL_INFO(dev)->gen >= 5) {
 709                 u32 adpa;
 710
 711                 adpa = I915_READ(crt->adpa_reg);
 712                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 713                 adpa |= ADPA_HOTPLUG_BITS;
 714                 I915_WRITE(crt->adpa_reg, adpa);
 715                 POSTING_READ(crt->adpa_reg);
 716
 717                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 718                 crt->force_hotplug_required = 1;
 719         }
 720
 721 }
 722
 723 /*
 724  * Routines for controlling stuff on the analog port
 725  */
 726
 727 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 728         .reset = intel_crt_reset,
 729         .dpms = intel_crt_dpms,
 730         .detect = intel_crt_detect,
 731         .fill_modes = drm_helper_probe_single_connector_modes,
 732         .destroy = intel_crt_destroy,
 733         .set_property = intel_crt_set_property,
 734 };
 735
 736 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 737         .mode_valid = intel_crt_mode_valid,
 738         .get_modes = intel_crt_get_modes,
 739         .best_encoder = intel_best_encoder,
 740 };
 741
 742 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 743         .destroy = intel_encoder_destroy,
 744 };
 745
 746 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 747 {
 748         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 749         return 1;
 750 }
 751
 752 static const struct dmi_system_id intel_no_crt[] = {
 753         {
 754                 .callback = intel_no_crt_dmi_callback,
 755                 .ident = "ACER ZGB",
 756                 .matches = {
 757                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 758                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 759                 },
 760         },
 761         {
 762                 .callback = intel_no_crt_dmi_callback,
 763                 .ident = "DELL XPS 8700",
 764                 .matches = {
 765                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 766                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
 767                 },
 768         },
 769         { }
 770 };
 771
 772 void intel_crt_init(struct drm_device *dev)
 773 {
 774         struct drm_connector *connector;
 775         struct intel_crt *crt;
 776         struct intel_connector *intel_connector;
 777         struct drm_i915_private *dev_priv = dev->dev_private;
 778
 779         /* Skip machines without VGA that falsely report hotplug events */
 780         if (dmi_check_system(intel_no_crt))
 781                 return;
 782
 783         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 784         if (!crt)
 785                 return;
 786
 787         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 788         if (!intel_connector) {
 789                 kfree(crt);
 790                 return;
 791         }
 792
 793         connector = &intel_connector->base;
 794         crt->connector = intel_connector;
 795         drm_connector_init(dev, &intel_connector->base,
 796                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 797
 798         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 799                          DRM_MODE_ENCODER_DAC);
 800
 801         intel_connector_attach_encoder(intel_connector, &crt->base);
 802
 803         crt->base.type = INTEL_OUTPUT_ANALOG;
 804         crt->base.cloneable = true;
 805         if (IS_I830(dev))
 806                 crt->base.crtc_mask = (1 << 0);
 807         else
 808                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 809
 810         if (IS_GEN2(dev))
 811                 connector->interlace_allowed = 0;
 812         else
 813                 connector->interlace_allowed = 1;
 814         connector->doublescan_allowed = 0;
 815
 816         if (HAS_PCH_SPLIT(dev))
 817                 crt->adpa_reg = PCH_ADPA;
 818         else if (IS_VALLEYVIEW(dev))
 819                 crt->adpa_reg = VLV_ADPA;
 820         else
 821                 crt->adpa_reg = ADPA;
 822
 823         crt->base.compute_config = intel_crt_compute_config;
 824         crt->base.mode_set = intel_crt_mode_set;
 825         crt->base.disable = intel_disable_crt;
 826         crt->base.enable = intel_enable_crt;
 827         if (IS_HASWELL(dev))
 828                 crt->base.get_config = hsw_crt_get_config;
 829         else
 830                 crt->base.get_config = intel_crt_get_config;
 831         if (I915_HAS_HOTPLUG(dev))
 832                 crt->base.hpd_pin = HPD_CRT;
 833         if (HAS_DDI(dev))
 834                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 835         else
 836                 crt->base.get_hw_state = intel_crt_get_hw_state;
 837         intel_connector->get_hw_state = intel_connector_get_hw_state;
 838
 839         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 840
 841         drm_sysfs_connector_add(connector);
 842
 843         if (!I915_HAS_HOTPLUG(dev))
 844                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 845
 846         /*
 847          * Configure the automatic hotplug detection stuff
 848          */
 849         crt->force_hotplug_required = 0;
 850
 851         /*
 852          * TODO: find a proper way to discover whether we need to set the the
 853          * polarity and link reversal bits or not, instead of relying on the
 854          * BIOS.
 855          */
 856         if (HAS_PCH_LPT(dev)) {
 857                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 858                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 859
 860                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 861         }
 862 }