drivers/gpu/drm/msm/mdp4/mdp4_dtv_encoder.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <mach/clk.h>
  19
  20 #include "mdp4_kms.h"
  21
  22 #include "drm_crtc.h"
  23 #include "drm_crtc_helper.h"
  24
  25
  26 struct mdp4_dtv_encoder {
  27         struct drm_encoder base;
  28         struct clk *src_clk;
  29         struct clk *hdmi_clk;
  30         struct clk *mdp_clk;
  31         unsigned long int pixclock;
  32         bool enabled;
  33         uint32_t bsc;
  34 };
  35 #define to_mdp4_dtv_encoder(x) container_of(x, struct mdp4_dtv_encoder, base)
  36
  37 static struct mdp4_kms *get_kms(struct drm_encoder *encoder)
  38 {
  39         struct msm_drm_private *priv = encoder->dev->dev_private;
  40         return to_mdp4_kms(priv->kms);
  41 }
  42
  43 #ifdef CONFIG_MSM_BUS_SCALING
  44 #include <mach/board.h>
  45 /* not ironically named at all.. no, really.. */
  46 static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
  47 {
  48         struct drm_device *dev = mdp4_dtv_encoder->base.dev;
  49         struct lcdc_platform_data *dtv_pdata = mdp4_find_pdata("dtv.0");
  50
  51         if (!dtv_pdata) {
  52                 dev_err(dev->dev, "could not find dtv pdata\n");
  53                 return;
  54         }
  55
  56         if (dtv_pdata->bus_scale_table) {
  57                 mdp4_dtv_encoder->bsc = msm_bus_scale_register_client(
  58                                 dtv_pdata->bus_scale_table);
  59                 DBG("bus scale client: %08x", mdp4_dtv_encoder->bsc);
  60                 DBG("lcdc_power_save: %p", dtv_pdata->lcdc_power_save);
  61                 if (dtv_pdata->lcdc_power_save)
  62                         dtv_pdata->lcdc_power_save(1);
  63         }
  64 }
  65
  66 static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder)
  67 {
  68         if (mdp4_dtv_encoder->bsc) {
  69                 msm_bus_scale_unregister_client(mdp4_dtv_encoder->bsc);
  70                 mdp4_dtv_encoder->bsc = 0;
  71         }
  72 }
  73
  74 static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx)
  75 {
  76         if (mdp4_dtv_encoder->bsc) {
  77                 DBG("set bus scaling: %d", idx);
  78                 msm_bus_scale_client_update_request(mdp4_dtv_encoder->bsc, idx);
  79         }
  80 }
  81 #else
  82 static void bs_init(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
  83 static void bs_fini(struct mdp4_dtv_encoder *mdp4_dtv_encoder) {}
  84 static void bs_set(struct mdp4_dtv_encoder *mdp4_dtv_encoder, int idx) {}
  85 #endif
  86
  87 static void mdp4_dtv_encoder_destroy(struct drm_encoder *encoder)
  88 {
  89         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
  90         bs_fini(mdp4_dtv_encoder);
  91         drm_encoder_cleanup(encoder);
  92         kfree(mdp4_dtv_encoder);
  93 }
  94
  95 static const struct drm_encoder_funcs mdp4_dtv_encoder_funcs = {
  96         .destroy = mdp4_dtv_encoder_destroy,
  97 };
  98
  99 static void mdp4_dtv_encoder_dpms(struct drm_encoder *encoder, int mode)
 100 {
 101         struct drm_device *dev = encoder->dev;
 102         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
 103         struct mdp4_kms *mdp4_kms = get_kms(encoder);
 104         bool enabled = (mode == DRM_MODE_DPMS_ON);
 105
 106         DBG("mode=%d", mode);
 107
 108         if (enabled == mdp4_dtv_encoder->enabled)
 109                 return;
 110
 111         if (enabled) {
 112                 unsigned long pc = mdp4_dtv_encoder->pixclock;
 113                 int ret;
 114
 115                 bs_set(mdp4_dtv_encoder, 1);
 116
 117                 DBG("setting src_clk=%lu", pc);
 118
 119                 ret = clk_set_rate(mdp4_dtv_encoder->src_clk, pc);
 120                 if (ret)
 121                         dev_err(dev->dev, "failed to set src_clk to %lu: %d\n", pc, ret);
 122                 clk_prepare_enable(mdp4_dtv_encoder->src_clk);
 123                 ret = clk_prepare_enable(mdp4_dtv_encoder->hdmi_clk);
 124                 if (ret)
 125                         dev_err(dev->dev, "failed to enable hdmi_clk: %d\n", ret);
 126                 ret = clk_prepare_enable(mdp4_dtv_encoder->mdp_clk);
 127                 if (ret)
 128                         dev_err(dev->dev, "failed to enabled mdp_clk: %d\n", ret);
 129
 130                 mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 1);
 131         } else {
 132                 mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
 133
 134                 /*
 135                  * Wait for a vsync so we know the ENABLE=0 latched before
 136                  * the (connector) source of the vsync's gets disabled,
 137                  * otherwise we end up in a funny state if we re-enable
 138                  * before the disable latches, which results that some of
 139                  * the settings changes for the new modeset (like new
 140                  * scanout buffer) don't latch properly..
 141                  */
 142                 mdp4_irq_wait(mdp4_kms, MDP4_IRQ_EXTERNAL_VSYNC);
 143
 144                 clk_disable_unprepare(mdp4_dtv_encoder->src_clk);
 145                 clk_disable_unprepare(mdp4_dtv_encoder->hdmi_clk);
 146                 clk_disable_unprepare(mdp4_dtv_encoder->mdp_clk);
 147
 148                 bs_set(mdp4_dtv_encoder, 0);
 149         }
 150
 151         mdp4_dtv_encoder->enabled = enabled;
 152 }
 153
 154 static bool mdp4_dtv_encoder_mode_fixup(struct drm_encoder *encoder,
 155                 const struct drm_display_mode *mode,
 156                 struct drm_display_mode *adjusted_mode)
 157 {
 158         return true;
 159 }
 160
 161 static void mdp4_dtv_encoder_mode_set(struct drm_encoder *encoder,
 162                 struct drm_display_mode *mode,
 163                 struct drm_display_mode *adjusted_mode)
 164 {
 165         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
 166         struct mdp4_kms *mdp4_kms = get_kms(encoder);
 167         uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol;
 168         uint32_t display_v_start, display_v_end;
 169         uint32_t hsync_start_x, hsync_end_x;
 170
 171         mode = adjusted_mode;
 172
 173         DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
 174                         mode->base.id, mode->name,
 175                         mode->vrefresh, mode->clock,
 176                         mode->hdisplay, mode->hsync_start,
 177                         mode->hsync_end, mode->htotal,
 178                         mode->vdisplay, mode->vsync_start,
 179                         mode->vsync_end, mode->vtotal,
 180                         mode->type, mode->flags);
 181
 182         mdp4_dtv_encoder->pixclock = mode->clock * 1000;
 183
 184         DBG("pixclock=%lu", mdp4_dtv_encoder->pixclock);
 185
 186         ctrl_pol = 0;
 187         if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 188                 ctrl_pol |= MDP4_DTV_CTRL_POLARITY_HSYNC_LOW;
 189         if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 190                 ctrl_pol |= MDP4_DTV_CTRL_POLARITY_VSYNC_LOW;
 191         /* probably need to get DATA_EN polarity from panel.. */
 192
 193         dtv_hsync_skew = 0;  /* get this from panel? */
 194
 195         hsync_start_x = (mode->htotal - mode->hsync_start);
 196         hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1;
 197
 198         vsync_period = mode->vtotal * mode->htotal;
 199         vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal;
 200         display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew;
 201         display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_skew - 1;
 202
 203         mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_CTRL,
 204                         MDP4_DTV_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) |
 205                         MDP4_DTV_HSYNC_CTRL_PERIOD(mode->htotal));
 206         mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_PERIOD, vsync_period);
 207         mdp4_write(mdp4_kms, REG_MDP4_DTV_VSYNC_LEN, vsync_len);
 208         mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_HCTRL,
 209                         MDP4_DTV_DISPLAY_HCTRL_START(hsync_start_x) |
 210                         MDP4_DTV_DISPLAY_HCTRL_END(hsync_end_x));
 211         mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VSTART, display_v_start);
 212         mdp4_write(mdp4_kms, REG_MDP4_DTV_DISPLAY_VEND, display_v_end);
 213         mdp4_write(mdp4_kms, REG_MDP4_DTV_BORDER_CLR, 0);
 214         mdp4_write(mdp4_kms, REG_MDP4_DTV_UNDERFLOW_CLR,
 215                         MDP4_DTV_UNDERFLOW_CLR_ENABLE_RECOVERY |
 216                         MDP4_DTV_UNDERFLOW_CLR_COLOR(0xff));
 217         mdp4_write(mdp4_kms, REG_MDP4_DTV_HSYNC_SKEW, dtv_hsync_skew);
 218         mdp4_write(mdp4_kms, REG_MDP4_DTV_CTRL_POLARITY, ctrl_pol);
 219         mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_HCTL,
 220                         MDP4_DTV_ACTIVE_HCTL_START(0) |
 221                         MDP4_DTV_ACTIVE_HCTL_END(0));
 222         mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VSTART, 0);
 223         mdp4_write(mdp4_kms, REG_MDP4_DTV_ACTIVE_VEND, 0);
 224 }
 225
 226 static void mdp4_dtv_encoder_prepare(struct drm_encoder *encoder)
 227 {
 228         mdp4_dtv_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 229 }
 230
 231 static void mdp4_dtv_encoder_commit(struct drm_encoder *encoder)
 232 {
 233         mdp4_crtc_set_config(encoder->crtc,
 234                         MDP4_DMA_CONFIG_R_BPC(BPC8) |
 235                         MDP4_DMA_CONFIG_G_BPC(BPC8) |
 236                         MDP4_DMA_CONFIG_B_BPC(BPC8) |
 237                         MDP4_DMA_CONFIG_PACK(0x21));
 238         mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV);
 239         mdp4_dtv_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 240 }
 241
 242 static const struct drm_encoder_helper_funcs mdp4_dtv_encoder_helper_funcs = {
 243         .dpms = mdp4_dtv_encoder_dpms,
 244         .mode_fixup = mdp4_dtv_encoder_mode_fixup,
 245         .mode_set = mdp4_dtv_encoder_mode_set,
 246         .prepare = mdp4_dtv_encoder_prepare,
 247         .commit = mdp4_dtv_encoder_commit,
 248 };
 249
 250 long mdp4_dtv_round_pixclk(struct drm_encoder *encoder, unsigned long rate)
 251 {
 252         struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
 253         return clk_round_rate(mdp4_dtv_encoder->src_clk, rate);
 254 }
 255
 256 /* initialize encoder */
 257 struct drm_encoder *mdp4_dtv_encoder_init(struct drm_device *dev)
 258 {
 259         struct drm_encoder *encoder = NULL;
 260         struct mdp4_dtv_encoder *mdp4_dtv_encoder;
 261         int ret;
 262
 263         mdp4_dtv_encoder = kzalloc(sizeof(*mdp4_dtv_encoder), GFP_KERNEL);
 264         if (!mdp4_dtv_encoder) {
 265                 ret = -ENOMEM;
 266                 goto fail;
 267         }
 268
 269         encoder = &mdp4_dtv_encoder->base;
 270
 271         drm_encoder_init(dev, encoder, &mdp4_dtv_encoder_funcs,
 272                          DRM_MODE_ENCODER_TMDS);
 273         drm_encoder_helper_add(encoder, &mdp4_dtv_encoder_helper_funcs);
 274
 275         mdp4_dtv_encoder->src_clk = devm_clk_get(dev->dev, "src_clk");
 276         if (IS_ERR(mdp4_dtv_encoder->src_clk)) {
 277                 dev_err(dev->dev, "failed to get src_clk\n");
 278                 ret = PTR_ERR(mdp4_dtv_encoder->src_clk);
 279                 goto fail;
 280         }
 281
 282         mdp4_dtv_encoder->hdmi_clk = devm_clk_get(dev->dev, "hdmi_clk");
 283         if (IS_ERR(mdp4_dtv_encoder->hdmi_clk)) {
 284                 dev_err(dev->dev, "failed to get hdmi_clk\n");
 285                 ret = PTR_ERR(mdp4_dtv_encoder->hdmi_clk);
 286                 goto fail;
 287         }
 288
 289         mdp4_dtv_encoder->mdp_clk = devm_clk_get(dev->dev, "mdp_clk");
 290         if (IS_ERR(mdp4_dtv_encoder->mdp_clk)) {
 291                 dev_err(dev->dev, "failed to get mdp_clk\n");
 292                 ret = PTR_ERR(mdp4_dtv_encoder->mdp_clk);
 293                 goto fail;
 294         }
 295
 296         bs_init(mdp4_dtv_encoder);
 297
 298         return encoder;
 299
 300 fail:
 301         if (encoder)
 302                 mdp4_dtv_encoder_destroy(encoder);
 303
 304         return ERR_PTR(ret);
 305 }