x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / gpu / drm / msm / msm_drv.c
blobb3a2f16290417cb055a8d7d89dc8f3f876b3a090
1 /*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #include "msm_drv.h"
19 #include "msm_gpu.h"
21 static void msm_fb_output_poll_changed(struct drm_device *dev)
23 struct msm_drm_private *priv = dev->dev_private;
24 if (priv->fbdev)
25 drm_fb_helper_hotplug_event(priv->fbdev);
28 static const struct drm_mode_config_funcs mode_config_funcs = {
29 .fb_create = msm_framebuffer_create,
30 .output_poll_changed = msm_fb_output_poll_changed,
33 static int msm_fault_handler(struct iommu_domain *iommu, struct device *dev,
34 unsigned long iova, int flags, void *arg)
36 DBG("*** fault: iova=%08lx, flags=%d", iova, flags);
37 return 0;
40 int msm_register_iommu(struct drm_device *dev, struct iommu_domain *iommu)
42 struct msm_drm_private *priv = dev->dev_private;
43 int idx = priv->num_iommus++;
45 if (WARN_ON(idx >= ARRAY_SIZE(priv->iommus)))
46 return -EINVAL;
48 priv->iommus[idx] = iommu;
50 iommu_set_fault_handler(iommu, msm_fault_handler, dev);
52 /* need to iommu_attach_device() somewhere?? on resume?? */
54 return idx;
57 int msm_iommu_attach(struct drm_device *dev, struct iommu_domain *iommu,
58 const char **names, int cnt)
60 int i, ret;
62 for (i = 0; i < cnt; i++) {
63 /* TODO maybe some day msm iommu won't require this hack: */
64 struct device *msm_iommu_get_ctx(const char *ctx_name);
65 struct device *ctx = msm_iommu_get_ctx(names[i]);
66 if (!ctx)
67 continue;
68 ret = iommu_attach_device(iommu, ctx);
69 if (ret) {
70 dev_warn(dev->dev, "could not attach iommu to %s", names[i]);
71 return ret;
74 return 0;
77 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
78 static bool reglog = false;
79 MODULE_PARM_DESC(reglog, "Enable register read/write logging");
80 module_param(reglog, bool, 0600);
81 #else
82 #define reglog 0
83 #endif
85 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
86 const char *dbgname)
88 struct resource *res;
89 unsigned long size;
90 void __iomem *ptr;
92 if (name)
93 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
94 else
95 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
97 if (!res) {
98 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
99 return ERR_PTR(-EINVAL);
102 size = resource_size(res);
104 ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
105 if (!ptr) {
106 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
107 return ERR_PTR(-ENOMEM);
110 if (reglog)
111 printk(KERN_DEBUG "IO:region %s %08x %08lx\n", dbgname, (u32)ptr, size);
113 return ptr;
116 void msm_writel(u32 data, void __iomem *addr)
118 if (reglog)
119 printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data);
120 writel(data, addr);
123 u32 msm_readl(const void __iomem *addr)
125 u32 val = readl(addr);
126 if (reglog)
127 printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val);
128 return val;
132 * DRM operations:
135 static int msm_unload(struct drm_device *dev)
137 struct msm_drm_private *priv = dev->dev_private;
138 struct msm_kms *kms = priv->kms;
139 struct msm_gpu *gpu = priv->gpu;
141 drm_kms_helper_poll_fini(dev);
142 drm_mode_config_cleanup(dev);
143 drm_vblank_cleanup(dev);
145 pm_runtime_get_sync(dev->dev);
146 drm_irq_uninstall(dev);
147 pm_runtime_put_sync(dev->dev);
149 flush_workqueue(priv->wq);
150 destroy_workqueue(priv->wq);
152 if (kms) {
153 pm_runtime_disable(dev->dev);
154 kms->funcs->destroy(kms);
157 if (gpu) {
158 mutex_lock(&dev->struct_mutex);
159 gpu->funcs->pm_suspend(gpu);
160 gpu->funcs->destroy(gpu);
161 mutex_unlock(&dev->struct_mutex);
164 dev->dev_private = NULL;
166 kfree(priv);
168 return 0;
171 static int msm_load(struct drm_device *dev, unsigned long flags)
173 struct platform_device *pdev = dev->platformdev;
174 struct msm_drm_private *priv;
175 struct msm_kms *kms;
176 int ret;
178 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
179 if (!priv) {
180 dev_err(dev->dev, "failed to allocate private data\n");
181 return -ENOMEM;
184 dev->dev_private = priv;
186 priv->wq = alloc_ordered_workqueue("msm", 0);
187 init_waitqueue_head(&priv->fence_event);
189 INIT_LIST_HEAD(&priv->inactive_list);
191 drm_mode_config_init(dev);
193 kms = mdp4_kms_init(dev);
194 if (IS_ERR(kms)) {
196 * NOTE: once we have GPU support, having no kms should not
197 * be considered fatal.. ideally we would still support gpu
198 * and (for example) use dmabuf/prime to share buffers with
199 * imx drm driver on iMX5
201 dev_err(dev->dev, "failed to load kms\n");
202 ret = PTR_ERR(kms);
203 goto fail;
206 priv->kms = kms;
208 if (kms) {
209 pm_runtime_enable(dev->dev);
210 ret = kms->funcs->hw_init(kms);
211 if (ret) {
212 dev_err(dev->dev, "kms hw init failed: %d\n", ret);
213 goto fail;
217 dev->mode_config.min_width = 0;
218 dev->mode_config.min_height = 0;
219 dev->mode_config.max_width = 2048;
220 dev->mode_config.max_height = 2048;
221 dev->mode_config.funcs = &mode_config_funcs;
223 ret = drm_vblank_init(dev, 1);
224 if (ret < 0) {
225 dev_err(dev->dev, "failed to initialize vblank\n");
226 goto fail;
229 pm_runtime_get_sync(dev->dev);
230 ret = drm_irq_install(dev);
231 pm_runtime_put_sync(dev->dev);
232 if (ret < 0) {
233 dev_err(dev->dev, "failed to install IRQ handler\n");
234 goto fail;
237 platform_set_drvdata(pdev, dev);
239 #ifdef CONFIG_DRM_MSM_FBDEV
240 priv->fbdev = msm_fbdev_init(dev);
241 #endif
243 drm_kms_helper_poll_init(dev);
245 return 0;
247 fail:
248 msm_unload(dev);
249 return ret;
252 static void load_gpu(struct drm_device *dev)
254 struct msm_drm_private *priv = dev->dev_private;
255 struct msm_gpu *gpu;
257 if (priv->gpu)
258 return;
260 mutex_lock(&dev->struct_mutex);
261 gpu = a3xx_gpu_init(dev);
262 if (IS_ERR(gpu)) {
263 dev_warn(dev->dev, "failed to load a3xx gpu\n");
264 gpu = NULL;
265 /* not fatal */
267 mutex_unlock(&dev->struct_mutex);
269 if (gpu) {
270 int ret;
271 gpu->funcs->pm_resume(gpu);
272 ret = gpu->funcs->hw_init(gpu);
273 if (ret) {
274 dev_err(dev->dev, "gpu hw init failed: %d\n", ret);
275 gpu->funcs->destroy(gpu);
276 gpu = NULL;
280 priv->gpu = gpu;
283 static int msm_open(struct drm_device *dev, struct drm_file *file)
285 struct msm_file_private *ctx;
287 /* For now, load gpu on open.. to avoid the requirement of having
288 * firmware in the initrd.
290 load_gpu(dev);
292 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
293 if (!ctx)
294 return -ENOMEM;
296 file->driver_priv = ctx;
298 return 0;
301 static void msm_preclose(struct drm_device *dev, struct drm_file *file)
303 struct msm_drm_private *priv = dev->dev_private;
304 struct msm_file_private *ctx = file->driver_priv;
305 struct msm_kms *kms = priv->kms;
307 if (kms)
308 kms->funcs->preclose(kms, file);
310 mutex_lock(&dev->struct_mutex);
311 if (ctx == priv->lastctx)
312 priv->lastctx = NULL;
313 mutex_unlock(&dev->struct_mutex);
315 kfree(ctx);
318 static void msm_lastclose(struct drm_device *dev)
320 struct msm_drm_private *priv = dev->dev_private;
321 if (priv->fbdev) {
322 drm_modeset_lock_all(dev);
323 drm_fb_helper_restore_fbdev_mode(priv->fbdev);
324 drm_modeset_unlock_all(dev);
328 static irqreturn_t msm_irq(DRM_IRQ_ARGS)
330 struct drm_device *dev = arg;
331 struct msm_drm_private *priv = dev->dev_private;
332 struct msm_kms *kms = priv->kms;
333 BUG_ON(!kms);
334 return kms->funcs->irq(kms);
337 static void msm_irq_preinstall(struct drm_device *dev)
339 struct msm_drm_private *priv = dev->dev_private;
340 struct msm_kms *kms = priv->kms;
341 BUG_ON(!kms);
342 kms->funcs->irq_preinstall(kms);
345 static int msm_irq_postinstall(struct drm_device *dev)
347 struct msm_drm_private *priv = dev->dev_private;
348 struct msm_kms *kms = priv->kms;
349 BUG_ON(!kms);
350 return kms->funcs->irq_postinstall(kms);
353 static void msm_irq_uninstall(struct drm_device *dev)
355 struct msm_drm_private *priv = dev->dev_private;
356 struct msm_kms *kms = priv->kms;
357 BUG_ON(!kms);
358 kms->funcs->irq_uninstall(kms);
361 static int msm_enable_vblank(struct drm_device *dev, int crtc_id)
363 struct msm_drm_private *priv = dev->dev_private;
364 struct msm_kms *kms = priv->kms;
365 if (!kms)
366 return -ENXIO;
367 DBG("dev=%p, crtc=%d", dev, crtc_id);
368 return kms->funcs->enable_vblank(kms, priv->crtcs[crtc_id]);
371 static void msm_disable_vblank(struct drm_device *dev, int crtc_id)
373 struct msm_drm_private *priv = dev->dev_private;
374 struct msm_kms *kms = priv->kms;
375 if (!kms)
376 return;
377 DBG("dev=%p, crtc=%d", dev, crtc_id);
378 kms->funcs->disable_vblank(kms, priv->crtcs[crtc_id]);
382 * DRM debugfs:
385 #ifdef CONFIG_DEBUG_FS
386 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
388 struct msm_drm_private *priv = dev->dev_private;
389 struct msm_gpu *gpu = priv->gpu;
391 if (gpu) {
392 seq_printf(m, "%s Status:\n", gpu->name);
393 gpu->funcs->show(gpu, m);
396 return 0;
399 static int msm_gem_show(struct drm_device *dev, struct seq_file *m)
401 struct msm_drm_private *priv = dev->dev_private;
402 struct msm_gpu *gpu = priv->gpu;
404 if (gpu) {
405 seq_printf(m, "Active Objects (%s):\n", gpu->name);
406 msm_gem_describe_objects(&gpu->active_list, m);
409 seq_printf(m, "Inactive Objects:\n");
410 msm_gem_describe_objects(&priv->inactive_list, m);
412 return 0;
415 static int msm_mm_show(struct drm_device *dev, struct seq_file *m)
417 return drm_mm_dump_table(m, dev->mm_private);
420 static int msm_fb_show(struct drm_device *dev, struct seq_file *m)
422 struct msm_drm_private *priv = dev->dev_private;
423 struct drm_framebuffer *fb, *fbdev_fb = NULL;
425 if (priv->fbdev) {
426 seq_printf(m, "fbcon ");
427 fbdev_fb = priv->fbdev->fb;
428 msm_framebuffer_describe(fbdev_fb, m);
431 mutex_lock(&dev->mode_config.fb_lock);
432 list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
433 if (fb == fbdev_fb)
434 continue;
436 seq_printf(m, "user ");
437 msm_framebuffer_describe(fb, m);
439 mutex_unlock(&dev->mode_config.fb_lock);
441 return 0;
444 static int show_locked(struct seq_file *m, void *arg)
446 struct drm_info_node *node = (struct drm_info_node *) m->private;
447 struct drm_device *dev = node->minor->dev;
448 int (*show)(struct drm_device *dev, struct seq_file *m) =
449 node->info_ent->data;
450 int ret;
452 ret = mutex_lock_interruptible(&dev->struct_mutex);
453 if (ret)
454 return ret;
456 ret = show(dev, m);
458 mutex_unlock(&dev->struct_mutex);
460 return ret;
463 static struct drm_info_list msm_debugfs_list[] = {
464 {"gpu", show_locked, 0, msm_gpu_show},
465 {"gem", show_locked, 0, msm_gem_show},
466 { "mm", show_locked, 0, msm_mm_show },
467 { "fb", show_locked, 0, msm_fb_show },
470 static int msm_debugfs_init(struct drm_minor *minor)
472 struct drm_device *dev = minor->dev;
473 int ret;
475 ret = drm_debugfs_create_files(msm_debugfs_list,
476 ARRAY_SIZE(msm_debugfs_list),
477 minor->debugfs_root, minor);
479 if (ret) {
480 dev_err(dev->dev, "could not install msm_debugfs_list\n");
481 return ret;
484 return ret;
487 static void msm_debugfs_cleanup(struct drm_minor *minor)
489 drm_debugfs_remove_files(msm_debugfs_list,
490 ARRAY_SIZE(msm_debugfs_list), minor);
492 #endif
495 * Fences:
498 int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
499 struct timespec *timeout)
501 struct msm_drm_private *priv = dev->dev_private;
502 int ret;
504 if (!priv->gpu)
505 return 0;
507 if (fence > priv->gpu->submitted_fence) {
508 DRM_ERROR("waiting on invalid fence: %u (of %u)\n",
509 fence, priv->gpu->submitted_fence);
510 return -EINVAL;
513 if (!timeout) {
514 /* no-wait: */
515 ret = fence_completed(dev, fence) ? 0 : -EBUSY;
516 } else {
517 unsigned long timeout_jiffies = timespec_to_jiffies(timeout);
518 unsigned long start_jiffies = jiffies;
519 unsigned long remaining_jiffies;
521 if (time_after(start_jiffies, timeout_jiffies))
522 remaining_jiffies = 0;
523 else
524 remaining_jiffies = timeout_jiffies - start_jiffies;
526 ret = wait_event_interruptible_timeout(priv->fence_event,
527 fence_completed(dev, fence),
528 remaining_jiffies);
530 if (ret == 0) {
531 DBG("timeout waiting for fence: %u (completed: %u)",
532 fence, priv->completed_fence);
533 ret = -ETIMEDOUT;
534 } else if (ret != -ERESTARTSYS) {
535 ret = 0;
539 return ret;
542 /* call under struct_mutex */
543 void msm_update_fence(struct drm_device *dev, uint32_t fence)
545 struct msm_drm_private *priv = dev->dev_private;
547 if (fence > priv->completed_fence) {
548 priv->completed_fence = fence;
549 wake_up_all(&priv->fence_event);
554 * DRM ioctls:
557 static int msm_ioctl_get_param(struct drm_device *dev, void *data,
558 struct drm_file *file)
560 struct msm_drm_private *priv = dev->dev_private;
561 struct drm_msm_param *args = data;
562 struct msm_gpu *gpu;
564 /* for now, we just have 3d pipe.. eventually this would need to
565 * be more clever to dispatch to appropriate gpu module:
567 if (args->pipe != MSM_PIPE_3D0)
568 return -EINVAL;
570 gpu = priv->gpu;
572 if (!gpu)
573 return -ENXIO;
575 return gpu->funcs->get_param(gpu, args->param, &args->value);
578 static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
579 struct drm_file *file)
581 struct drm_msm_gem_new *args = data;
582 return msm_gem_new_handle(dev, file, args->size,
583 args->flags, &args->handle);
586 #define TS(t) ((struct timespec){ .tv_sec = (t).tv_sec, .tv_nsec = (t).tv_nsec })
588 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
589 struct drm_file *file)
591 struct drm_msm_gem_cpu_prep *args = data;
592 struct drm_gem_object *obj;
593 int ret;
595 obj = drm_gem_object_lookup(dev, file, args->handle);
596 if (!obj)
597 return -ENOENT;
599 ret = msm_gem_cpu_prep(obj, args->op, &TS(args->timeout));
601 drm_gem_object_unreference_unlocked(obj);
603 return ret;
606 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
607 struct drm_file *file)
609 struct drm_msm_gem_cpu_fini *args = data;
610 struct drm_gem_object *obj;
611 int ret;
613 obj = drm_gem_object_lookup(dev, file, args->handle);
614 if (!obj)
615 return -ENOENT;
617 ret = msm_gem_cpu_fini(obj);
619 drm_gem_object_unreference_unlocked(obj);
621 return ret;
624 static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
625 struct drm_file *file)
627 struct drm_msm_gem_info *args = data;
628 struct drm_gem_object *obj;
629 int ret = 0;
631 if (args->pad)
632 return -EINVAL;
634 obj = drm_gem_object_lookup(dev, file, args->handle);
635 if (!obj)
636 return -ENOENT;
638 args->offset = msm_gem_mmap_offset(obj);
640 drm_gem_object_unreference_unlocked(obj);
642 return ret;
645 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
646 struct drm_file *file)
648 struct drm_msm_wait_fence *args = data;
649 return msm_wait_fence_interruptable(dev, args->fence, &TS(args->timeout));
652 static const struct drm_ioctl_desc msm_ioctls[] = {
653 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
654 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
655 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
656 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
657 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
658 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_UNLOCKED|DRM_AUTH),
659 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_UNLOCKED|DRM_AUTH),
662 static const struct vm_operations_struct vm_ops = {
663 .fault = msm_gem_fault,
664 .open = drm_gem_vm_open,
665 .close = drm_gem_vm_close,
668 static const struct file_operations fops = {
669 .owner = THIS_MODULE,
670 .open = drm_open,
671 .release = drm_release,
672 .unlocked_ioctl = drm_ioctl,
673 #ifdef CONFIG_COMPAT
674 .compat_ioctl = drm_compat_ioctl,
675 #endif
676 .poll = drm_poll,
677 .read = drm_read,
678 .llseek = no_llseek,
679 .mmap = msm_gem_mmap,
682 static struct drm_driver msm_driver = {
683 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
684 .load = msm_load,
685 .unload = msm_unload,
686 .open = msm_open,
687 .preclose = msm_preclose,
688 .lastclose = msm_lastclose,
689 .irq_handler = msm_irq,
690 .irq_preinstall = msm_irq_preinstall,
691 .irq_postinstall = msm_irq_postinstall,
692 .irq_uninstall = msm_irq_uninstall,
693 .get_vblank_counter = drm_vblank_count,
694 .enable_vblank = msm_enable_vblank,
695 .disable_vblank = msm_disable_vblank,
696 .gem_free_object = msm_gem_free_object,
697 .gem_vm_ops = &vm_ops,
698 .dumb_create = msm_gem_dumb_create,
699 .dumb_map_offset = msm_gem_dumb_map_offset,
700 .dumb_destroy = drm_gem_dumb_destroy,
701 #ifdef CONFIG_DEBUG_FS
702 .debugfs_init = msm_debugfs_init,
703 .debugfs_cleanup = msm_debugfs_cleanup,
704 #endif
705 .ioctls = msm_ioctls,
706 .num_ioctls = DRM_MSM_NUM_IOCTLS,
707 .fops = &fops,
708 .name = "msm",
709 .desc = "MSM Snapdragon DRM",
710 .date = "20130625",
711 .major = 1,
712 .minor = 0,
715 #ifdef CONFIG_PM_SLEEP
716 static int msm_pm_suspend(struct device *dev)
718 struct drm_device *ddev = dev_get_drvdata(dev);
720 drm_kms_helper_poll_disable(ddev);
722 return 0;
725 static int msm_pm_resume(struct device *dev)
727 struct drm_device *ddev = dev_get_drvdata(dev);
729 drm_kms_helper_poll_enable(ddev);
731 return 0;
733 #endif
735 static const struct dev_pm_ops msm_pm_ops = {
736 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
740 * Platform driver:
743 static int msm_pdev_probe(struct platform_device *pdev)
745 return drm_platform_init(&msm_driver, pdev);
748 static int msm_pdev_remove(struct platform_device *pdev)
750 drm_platform_exit(&msm_driver, pdev);
752 return 0;
755 static const struct platform_device_id msm_id[] = {
756 { "mdp", 0 },
760 static struct platform_driver msm_platform_driver = {
761 .probe = msm_pdev_probe,
762 .remove = msm_pdev_remove,
763 .driver = {
764 .owner = THIS_MODULE,
765 .name = "msm",
766 .pm = &msm_pm_ops,
768 .id_table = msm_id,
771 static int __init msm_drm_register(void)
773 DBG("init");
774 hdmi_register();
775 a3xx_register();
776 return platform_driver_register(&msm_platform_driver);
779 static void __exit msm_drm_unregister(void)
781 DBG("fini");
782 platform_driver_unregister(&msm_platform_driver);
783 hdmi_unregister();
784 a3xx_unregister();
787 module_init(msm_drm_register);
788 module_exit(msm_drm_unregister);
790 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
791 MODULE_DESCRIPTION("MSM DRM Driver");
792 MODULE_LICENSE("GPL");