x86/xen: resume timer irqs early
[linux/fpc-iii.git] / drivers / iio / dac / ad5064.c
bloba3a52be4852cb39fb3791b64f53cdbc285e87158
1 /*
2 * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R,
3 * AD5648, AD5666, AD5668, AD5669R Digital to analog converters driver
5 * Copyright 2011 Analog Devices Inc.
7 * Licensed under the GPL-2.
8 */
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/i2c.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/regulator/consumer.h>
19 #include <asm/unaligned.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
24 #define AD5064_MAX_DAC_CHANNELS 8
25 #define AD5064_MAX_VREFS 4
27 #define AD5064_ADDR(x) ((x) << 20)
28 #define AD5064_CMD(x) ((x) << 24)
30 #define AD5064_ADDR_ALL_DAC 0xF
32 #define AD5064_CMD_WRITE_INPUT_N 0x0
33 #define AD5064_CMD_UPDATE_DAC_N 0x1
34 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
35 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N 0x3
36 #define AD5064_CMD_POWERDOWN_DAC 0x4
37 #define AD5064_CMD_CLEAR 0x5
38 #define AD5064_CMD_LDAC_MASK 0x6
39 #define AD5064_CMD_RESET 0x7
40 #define AD5064_CMD_CONFIG 0x8
42 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1)
43 #define AD5064_CONFIG_INT_VREF_ENABLE BIT(0)
45 #define AD5064_LDAC_PWRDN_NONE 0x0
46 #define AD5064_LDAC_PWRDN_1K 0x1
47 #define AD5064_LDAC_PWRDN_100K 0x2
48 #define AD5064_LDAC_PWRDN_3STATE 0x3
50 /**
51 * struct ad5064_chip_info - chip specific information
52 * @shared_vref: whether the vref supply is shared between channels
53 * @internal_vref: internal reference voltage. 0 if the chip has no internal
54 * vref.
55 * @channel: channel specification
56 * @num_channels: number of channels
59 struct ad5064_chip_info {
60 bool shared_vref;
61 unsigned long internal_vref;
62 const struct iio_chan_spec *channels;
63 unsigned int num_channels;
66 struct ad5064_state;
68 typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
69 unsigned int addr, unsigned int val);
71 /**
72 * struct ad5064_state - driver instance specific data
73 * @dev: the device for this driver instance
74 * @chip_info: chip model specific constants, available modes etc
75 * @vref_reg: vref supply regulators
76 * @pwr_down: whether channel is powered down
77 * @pwr_down_mode: channel's current power down mode
78 * @dac_cache: current DAC raw value (chip does not support readback)
79 * @use_internal_vref: set to true if the internal reference voltage should be
80 * used.
81 * @write: register write callback
82 * @data: i2c/spi transfer buffers
85 struct ad5064_state {
86 struct device *dev;
87 const struct ad5064_chip_info *chip_info;
88 struct regulator_bulk_data vref_reg[AD5064_MAX_VREFS];
89 bool pwr_down[AD5064_MAX_DAC_CHANNELS];
90 u8 pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
91 unsigned int dac_cache[AD5064_MAX_DAC_CHANNELS];
92 bool use_internal_vref;
94 ad5064_write_func write;
97 * DMA (thus cache coherency maintenance) requires the
98 * transfer buffers to live in their own cache lines.
100 union {
101 u8 i2c[3];
102 __be32 spi;
103 } data ____cacheline_aligned;
106 enum ad5064_type {
107 ID_AD5024,
108 ID_AD5025,
109 ID_AD5044,
110 ID_AD5045,
111 ID_AD5064,
112 ID_AD5064_1,
113 ID_AD5065,
114 ID_AD5628_1,
115 ID_AD5628_2,
116 ID_AD5648_1,
117 ID_AD5648_2,
118 ID_AD5666_1,
119 ID_AD5666_2,
120 ID_AD5668_1,
121 ID_AD5668_2,
124 static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
125 unsigned int addr, unsigned int val, unsigned int shift)
127 val <<= shift;
129 return st->write(st, cmd, addr, val);
132 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
133 const struct iio_chan_spec *chan)
135 unsigned int val;
136 int ret;
138 val = (0x1 << chan->address);
140 if (st->pwr_down[chan->channel])
141 val |= st->pwr_down_mode[chan->channel] << 8;
143 ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
145 return ret;
148 static const char * const ad5064_powerdown_modes[] = {
149 "1kohm_to_gnd",
150 "100kohm_to_gnd",
151 "three_state",
154 static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
155 const struct iio_chan_spec *chan)
157 struct ad5064_state *st = iio_priv(indio_dev);
159 return st->pwr_down_mode[chan->channel] - 1;
162 static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
163 const struct iio_chan_spec *chan, unsigned int mode)
165 struct ad5064_state *st = iio_priv(indio_dev);
166 int ret;
168 mutex_lock(&indio_dev->mlock);
169 st->pwr_down_mode[chan->channel] = mode + 1;
171 ret = ad5064_sync_powerdown_mode(st, chan);
172 mutex_unlock(&indio_dev->mlock);
174 return ret;
177 static const struct iio_enum ad5064_powerdown_mode_enum = {
178 .items = ad5064_powerdown_modes,
179 .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
180 .get = ad5064_get_powerdown_mode,
181 .set = ad5064_set_powerdown_mode,
184 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
185 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
187 struct ad5064_state *st = iio_priv(indio_dev);
189 return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
192 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
193 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
194 size_t len)
196 struct ad5064_state *st = iio_priv(indio_dev);
197 bool pwr_down;
198 int ret;
200 ret = strtobool(buf, &pwr_down);
201 if (ret)
202 return ret;
204 mutex_lock(&indio_dev->mlock);
205 st->pwr_down[chan->channel] = pwr_down;
207 ret = ad5064_sync_powerdown_mode(st, chan);
208 mutex_unlock(&indio_dev->mlock);
209 return ret ? ret : len;
212 static int ad5064_get_vref(struct ad5064_state *st,
213 struct iio_chan_spec const *chan)
215 unsigned int i;
217 if (st->use_internal_vref)
218 return st->chip_info->internal_vref;
220 i = st->chip_info->shared_vref ? 0 : chan->channel;
221 return regulator_get_voltage(st->vref_reg[i].consumer);
224 static int ad5064_read_raw(struct iio_dev *indio_dev,
225 struct iio_chan_spec const *chan,
226 int *val,
227 int *val2,
228 long m)
230 struct ad5064_state *st = iio_priv(indio_dev);
231 int scale_uv;
233 switch (m) {
234 case IIO_CHAN_INFO_RAW:
235 *val = st->dac_cache[chan->channel];
236 return IIO_VAL_INT;
237 case IIO_CHAN_INFO_SCALE:
238 scale_uv = ad5064_get_vref(st, chan);
239 if (scale_uv < 0)
240 return scale_uv;
242 scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
243 *val = scale_uv / 100000;
244 *val2 = (scale_uv % 100000) * 10;
245 return IIO_VAL_INT_PLUS_MICRO;
246 default:
247 break;
249 return -EINVAL;
252 static int ad5064_write_raw(struct iio_dev *indio_dev,
253 struct iio_chan_spec const *chan, int val, int val2, long mask)
255 struct ad5064_state *st = iio_priv(indio_dev);
256 int ret;
258 switch (mask) {
259 case IIO_CHAN_INFO_RAW:
260 if (val >= (1 << chan->scan_type.realbits) || val < 0)
261 return -EINVAL;
263 mutex_lock(&indio_dev->mlock);
264 ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
265 chan->address, val, chan->scan_type.shift);
266 if (ret == 0)
267 st->dac_cache[chan->channel] = val;
268 mutex_unlock(&indio_dev->mlock);
269 break;
270 default:
271 ret = -EINVAL;
274 return ret;
277 static const struct iio_info ad5064_info = {
278 .read_raw = ad5064_read_raw,
279 .write_raw = ad5064_write_raw,
280 .driver_module = THIS_MODULE,
283 static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
285 .name = "powerdown",
286 .read = ad5064_read_dac_powerdown,
287 .write = ad5064_write_dac_powerdown,
289 IIO_ENUM("powerdown_mode", false, &ad5064_powerdown_mode_enum),
290 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
291 { },
294 #define AD5064_CHANNEL(chan, addr, bits) { \
295 .type = IIO_VOLTAGE, \
296 .indexed = 1, \
297 .output = 1, \
298 .channel = (chan), \
299 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
300 BIT(IIO_CHAN_INFO_SCALE), \
301 .address = addr, \
302 .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \
303 .ext_info = ad5064_ext_info, \
306 #define DECLARE_AD5064_CHANNELS(name, bits) \
307 const struct iio_chan_spec name[] = { \
308 AD5064_CHANNEL(0, 0, bits), \
309 AD5064_CHANNEL(1, 1, bits), \
310 AD5064_CHANNEL(2, 2, bits), \
311 AD5064_CHANNEL(3, 3, bits), \
312 AD5064_CHANNEL(4, 4, bits), \
313 AD5064_CHANNEL(5, 5, bits), \
314 AD5064_CHANNEL(6, 6, bits), \
315 AD5064_CHANNEL(7, 7, bits), \
318 #define DECLARE_AD5065_CHANNELS(name, bits) \
319 const struct iio_chan_spec name[] = { \
320 AD5064_CHANNEL(0, 0, bits), \
321 AD5064_CHANNEL(1, 3, bits), \
324 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
325 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
326 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
328 static DECLARE_AD5065_CHANNELS(ad5025_channels, 12);
329 static DECLARE_AD5065_CHANNELS(ad5045_channels, 14);
330 static DECLARE_AD5065_CHANNELS(ad5065_channels, 16);
332 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
333 [ID_AD5024] = {
334 .shared_vref = false,
335 .channels = ad5024_channels,
336 .num_channels = 4,
338 [ID_AD5025] = {
339 .shared_vref = false,
340 .channels = ad5025_channels,
341 .num_channels = 2,
343 [ID_AD5044] = {
344 .shared_vref = false,
345 .channels = ad5044_channels,
346 .num_channels = 4,
348 [ID_AD5045] = {
349 .shared_vref = false,
350 .channels = ad5045_channels,
351 .num_channels = 2,
353 [ID_AD5064] = {
354 .shared_vref = false,
355 .channels = ad5064_channels,
356 .num_channels = 4,
358 [ID_AD5064_1] = {
359 .shared_vref = true,
360 .channels = ad5064_channels,
361 .num_channels = 4,
363 [ID_AD5065] = {
364 .shared_vref = false,
365 .channels = ad5065_channels,
366 .num_channels = 2,
368 [ID_AD5628_1] = {
369 .shared_vref = true,
370 .internal_vref = 2500000,
371 .channels = ad5024_channels,
372 .num_channels = 8,
374 [ID_AD5628_2] = {
375 .shared_vref = true,
376 .internal_vref = 5000000,
377 .channels = ad5024_channels,
378 .num_channels = 8,
380 [ID_AD5648_1] = {
381 .shared_vref = true,
382 .internal_vref = 2500000,
383 .channels = ad5044_channels,
384 .num_channels = 8,
386 [ID_AD5648_2] = {
387 .shared_vref = true,
388 .internal_vref = 5000000,
389 .channels = ad5044_channels,
390 .num_channels = 8,
392 [ID_AD5666_1] = {
393 .shared_vref = true,
394 .internal_vref = 2500000,
395 .channels = ad5064_channels,
396 .num_channels = 4,
398 [ID_AD5666_2] = {
399 .shared_vref = true,
400 .internal_vref = 5000000,
401 .channels = ad5064_channels,
402 .num_channels = 4,
404 [ID_AD5668_1] = {
405 .shared_vref = true,
406 .internal_vref = 2500000,
407 .channels = ad5064_channels,
408 .num_channels = 8,
410 [ID_AD5668_2] = {
411 .shared_vref = true,
412 .internal_vref = 5000000,
413 .channels = ad5064_channels,
414 .num_channels = 8,
418 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
420 return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
423 static const char * const ad5064_vref_names[] = {
424 "vrefA",
425 "vrefB",
426 "vrefC",
427 "vrefD",
430 static const char * const ad5064_vref_name(struct ad5064_state *st,
431 unsigned int vref)
433 return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
436 static int ad5064_probe(struct device *dev, enum ad5064_type type,
437 const char *name, ad5064_write_func write)
439 struct iio_dev *indio_dev;
440 struct ad5064_state *st;
441 unsigned int midscale;
442 unsigned int i;
443 int ret;
445 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
446 if (indio_dev == NULL)
447 return -ENOMEM;
449 st = iio_priv(indio_dev);
450 dev_set_drvdata(dev, indio_dev);
452 st->chip_info = &ad5064_chip_info_tbl[type];
453 st->dev = dev;
454 st->write = write;
456 for (i = 0; i < ad5064_num_vref(st); ++i)
457 st->vref_reg[i].supply = ad5064_vref_name(st, i);
459 ret = devm_regulator_bulk_get(dev, ad5064_num_vref(st),
460 st->vref_reg);
461 if (ret) {
462 if (!st->chip_info->internal_vref)
463 return ret;
464 st->use_internal_vref = true;
465 ret = ad5064_write(st, AD5064_CMD_CONFIG, 0,
466 AD5064_CONFIG_INT_VREF_ENABLE, 0);
467 if (ret) {
468 dev_err(dev, "Failed to enable internal vref: %d\n",
469 ret);
470 return ret;
472 } else {
473 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
474 if (ret)
475 return ret;
478 indio_dev->dev.parent = dev;
479 indio_dev->name = name;
480 indio_dev->info = &ad5064_info;
481 indio_dev->modes = INDIO_DIRECT_MODE;
482 indio_dev->channels = st->chip_info->channels;
483 indio_dev->num_channels = st->chip_info->num_channels;
485 midscale = (1 << indio_dev->channels[0].scan_type.realbits) / 2;
487 for (i = 0; i < st->chip_info->num_channels; ++i) {
488 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
489 st->dac_cache[i] = midscale;
492 ret = iio_device_register(indio_dev);
493 if (ret)
494 goto error_disable_reg;
496 return 0;
498 error_disable_reg:
499 if (!st->use_internal_vref)
500 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
502 return ret;
505 static int ad5064_remove(struct device *dev)
507 struct iio_dev *indio_dev = dev_get_drvdata(dev);
508 struct ad5064_state *st = iio_priv(indio_dev);
510 iio_device_unregister(indio_dev);
512 if (!st->use_internal_vref)
513 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
515 return 0;
518 #if IS_ENABLED(CONFIG_SPI_MASTER)
520 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
521 unsigned int addr, unsigned int val)
523 struct spi_device *spi = to_spi_device(st->dev);
525 st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
526 return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
529 static int ad5064_spi_probe(struct spi_device *spi)
531 const struct spi_device_id *id = spi_get_device_id(spi);
533 return ad5064_probe(&spi->dev, id->driver_data, id->name,
534 ad5064_spi_write);
537 static int ad5064_spi_remove(struct spi_device *spi)
539 return ad5064_remove(&spi->dev);
542 static const struct spi_device_id ad5064_spi_ids[] = {
543 {"ad5024", ID_AD5024},
544 {"ad5025", ID_AD5025},
545 {"ad5044", ID_AD5044},
546 {"ad5045", ID_AD5045},
547 {"ad5064", ID_AD5064},
548 {"ad5064-1", ID_AD5064_1},
549 {"ad5065", ID_AD5065},
550 {"ad5628-1", ID_AD5628_1},
551 {"ad5628-2", ID_AD5628_2},
552 {"ad5648-1", ID_AD5648_1},
553 {"ad5648-2", ID_AD5648_2},
554 {"ad5666-1", ID_AD5666_1},
555 {"ad5666-2", ID_AD5666_2},
556 {"ad5668-1", ID_AD5668_1},
557 {"ad5668-2", ID_AD5668_2},
558 {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
561 MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
563 static struct spi_driver ad5064_spi_driver = {
564 .driver = {
565 .name = "ad5064",
566 .owner = THIS_MODULE,
568 .probe = ad5064_spi_probe,
569 .remove = ad5064_spi_remove,
570 .id_table = ad5064_spi_ids,
573 static int __init ad5064_spi_register_driver(void)
575 return spi_register_driver(&ad5064_spi_driver);
578 static void ad5064_spi_unregister_driver(void)
580 spi_unregister_driver(&ad5064_spi_driver);
583 #else
585 static inline int ad5064_spi_register_driver(void) { return 0; }
586 static inline void ad5064_spi_unregister_driver(void) { }
588 #endif
590 #if IS_ENABLED(CONFIG_I2C)
592 static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
593 unsigned int addr, unsigned int val)
595 struct i2c_client *i2c = to_i2c_client(st->dev);
597 st->data.i2c[0] = (cmd << 4) | addr;
598 put_unaligned_be16(val, &st->data.i2c[1]);
599 return i2c_master_send(i2c, st->data.i2c, 3);
602 static int ad5064_i2c_probe(struct i2c_client *i2c,
603 const struct i2c_device_id *id)
605 return ad5064_probe(&i2c->dev, id->driver_data, id->name,
606 ad5064_i2c_write);
609 static int ad5064_i2c_remove(struct i2c_client *i2c)
611 return ad5064_remove(&i2c->dev);
614 static const struct i2c_device_id ad5064_i2c_ids[] = {
615 {"ad5629-1", ID_AD5628_1},
616 {"ad5629-2", ID_AD5628_2},
617 {"ad5629-3", ID_AD5628_2}, /* similar enough to ad5629-2 */
618 {"ad5669-1", ID_AD5668_1},
619 {"ad5669-2", ID_AD5668_2},
620 {"ad5669-3", ID_AD5668_2}, /* similar enough to ad5669-2 */
623 MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
625 static struct i2c_driver ad5064_i2c_driver = {
626 .driver = {
627 .name = "ad5064",
628 .owner = THIS_MODULE,
630 .probe = ad5064_i2c_probe,
631 .remove = ad5064_i2c_remove,
632 .id_table = ad5064_i2c_ids,
635 static int __init ad5064_i2c_register_driver(void)
637 return i2c_add_driver(&ad5064_i2c_driver);
640 static void __exit ad5064_i2c_unregister_driver(void)
642 i2c_del_driver(&ad5064_i2c_driver);
645 #else
647 static inline int ad5064_i2c_register_driver(void) { return 0; }
648 static inline void ad5064_i2c_unregister_driver(void) { }
650 #endif
652 static int __init ad5064_init(void)
654 int ret;
656 ret = ad5064_spi_register_driver();
657 if (ret)
658 return ret;
660 ret = ad5064_i2c_register_driver();
661 if (ret) {
662 ad5064_spi_unregister_driver();
663 return ret;
666 return 0;
668 module_init(ad5064_init);
670 static void __exit ad5064_exit(void)
672 ad5064_i2c_unregister_driver();
673 ad5064_spi_unregister_driver();
675 module_exit(ad5064_exit);
677 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
678 MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
679 MODULE_LICENSE("GPL v2");